From ef6a296f5295932f02a5c500e85da7c8bd7ed84e Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 24 Oct 2017 10:53:39 -0700 Subject: gpu: nvgpu: get intr mask for an active_engine_id This is needed for t19x during eng preempt done polling. E.g. copy engine (CE) stall interrupt should not prevent GR from finishing preemption. In order to check if current stall interrupt is valid for the engine being polled for preemption completion, function to provide engine intr mask is needed. With this, polling code can make sure there are no stall interrupts pending for the engine being polled for preemption done. If stall interrupts are pending for an engine, preemption will never finish. Bug 200277163 Bug 1945121 Change-Id: Ie1ccac52c3e8d453a49084e195f2e7eaafb8f057 Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1584065 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 4c967e80..42ad288f 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -276,6 +276,7 @@ void fifo_gk20a_finish_mmu_fault_handling(struct gk20a *g, int gk20a_fifo_wait_engine_idle(struct gk20a *g); bool gk20a_fifo_is_engine_busy(struct gk20a *g); u32 gk20a_fifo_engine_interrupt_mask(struct gk20a *g); +u32 gk20a_fifo_act_eng_interrupt_mask(struct gk20a *g, u32 act_eng_id); u32 gk20a_fifo_get_pbdma_signature(struct gk20a *g); u32 gk20a_fifo_get_failing_engine_data(struct gk20a *g, int *__id, bool *__is_tsg); -- cgit v1.2.2