From 07f6739285140d7c5335ddcb8996450966bfc175 Mon Sep 17 00:00:00 2001 From: Scott Long Date: Wed, 8 Aug 2018 18:30:09 -0700 Subject: gpu: nvgpu: switch gk20a nonstall ops to #defines Fix MISRA rule 10.1 violations involving gk20a_nonstall_ops enums by replacing them with with corresponding #defines. Because these values can be used in expressions that require unsigned values (e.g. bitwise OR) we cannot use enums. The g->ce2.isr_nonstall() function was previously returning an int that was a combination of gk20a_nonstall_ops enum bits which led to the violations. JIRA NVGPU-650 Change-Id: I6210aacec8829b3c8d339c5fe3db2f3069c67406 Signed-off-by: Scott Long Reviewed-on: https://git-master.nvidia.com/r/1796242 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 120950c1..77030c94 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -31,7 +31,6 @@ struct gk20a_debug_output; struct mmu_fault_info; -enum gk20a_nonstall_ops; enum { NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0, @@ -229,7 +228,7 @@ int gk20a_init_fifo_support(struct gk20a *g); int gk20a_init_fifo_setup_hw(struct gk20a *g); void gk20a_fifo_isr(struct gk20a *g); -enum gk20a_nonstall_ops gk20a_fifo_nonstall_isr(struct gk20a *g); +u32 gk20a_fifo_nonstall_isr(struct gk20a *g); int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid); int gk20a_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); -- cgit v1.2.2