From d9956443820d64ac7f6e2fe7a9d10c1ac4956938 Mon Sep 17 00:00:00 2001 From: Scott Long Date: Mon, 9 Jul 2018 10:32:25 -0700 Subject: gpu: nvgpu: fix MISRA Rule 11.6 issue with fence pool mgmt MISRA Rule 11.6 prohibits the casting of an integer value to a void *. The nvgpu allocator used for the fence pool stores the base address of the associated memory as a u64 and returns it via nvgpu_alloc_base(). In gk20a_free_fence_pool() this u64 value was cast to a void * before being passed to nvgpu_vfree() (leading to the violation). This change modifies gk20a_free_fence_pool() to cast the base address back to the original struct gk20a_fence * to eliminate the violation. JIRA NVGPU-895: MISRA Rule 11.6 violations Change-Id: If89cf2c1bc8ea4b0b59da4cf8b1c167738f6badc Signed-off-by: Scott Long Reviewed-on: https://git-master.nvidia.com/r/1774530 Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fence_gk20a.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/fence_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c index 142663dd..8f585afd 100644 --- a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c @@ -139,11 +139,11 @@ fail: void gk20a_free_fence_pool(struct channel_gk20a *c) { if (nvgpu_alloc_initialized(&c->fence_allocator)) { - void *base = (void *)(uintptr_t) + struct gk20a_fence *fence_pool; + fence_pool = (struct gk20a_fence *)(uintptr_t) nvgpu_alloc_base(&c->fence_allocator); - nvgpu_alloc_destroy(&c->fence_allocator); - nvgpu_vfree(c->g, base); + nvgpu_vfree(c->g, fence_pool); } } -- cgit v1.2.2