From f187e0bf442c3b0a08c46b21196f06a18c8220a0 Mon Sep 17 00:00:00 2001 From: Vinod G Date: Wed, 29 Aug 2018 12:32:25 -0700 Subject: gpu: nvgpu: Move SM_MASK_TYPE setting to TSG level Moved the SM_MASK_TYPE variable from GR to TSG struct. SM error registers are context based. In dbg_session IOCTL to SET_SM_MASK_TYPE, kernel code iterate the TSG associated with first channel and set the mask_type to that context. Bug 200412641 Change-Id: Ic91944037ad2447f403b4803d5266ae6250ba4c9 Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/1809322 Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h index 4d3c4d74..50002557 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h @@ -72,12 +72,6 @@ struct dbg_session_gk20a { bool broadcast_stop_trigger; struct nvgpu_mutex ioctl_lock; - - /* - * sm set exception type mask flag, to check whether - * exception type mask is requested or not. - */ - bool is_sm_exception_type_mask_set; }; struct dbg_session_data { -- cgit v1.2.2