From 37155b65f1dd6039bdef92f513d86640956bc12c Mon Sep 17 00:00:00 2001 From: Peter Daifuku Date: Wed, 9 Mar 2016 19:10:20 -0800 Subject: gpu: nvgpu: support for hwpm context switching Add support for hwpm context switching Bug 1648200 Change-Id: I482899bf165cd2ef24bb8617be16df01218e462f Signed-off-by: Peter Daifuku Reviewed-on: http://git-master/r/1120450 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 47 +++++++++++++++++++++++++++++++-- 1 file changed, 45 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index 1ee0189b..d087d89e 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c @@ -457,6 +457,9 @@ static int nvgpu_ioctl_powergate_gk20a(struct dbg_session_gk20a *dbg_s, static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s, struct nvgpu_dbg_gpu_smpc_ctxsw_mode_args *args); +static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s, + struct nvgpu_dbg_gpu_hwpm_ctxsw_mode_args *args); + static int nvgpu_dbg_gpu_ioctl_suspend_resume_sm( struct dbg_session_gk20a *dbg_s, struct nvgpu_dbg_gpu_suspend_resume_all_sms_args *args); @@ -582,6 +585,11 @@ long gk20a_dbg_gpu_dev_ioctl(struct file *filp, unsigned int cmd, (struct nvgpu_dbg_gpu_smpc_ctxsw_mode_args *)buf); break; + case NVGPU_DBG_GPU_IOCTL_HWPM_CTXSW_MODE: + err = nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(dbg_s, + (struct nvgpu_dbg_gpu_hwpm_ctxsw_mode_args *)buf); + break; + case NVGPU_DBG_GPU_IOCTL_SUSPEND_RESUME_ALL_SMS: err = nvgpu_dbg_gpu_ioctl_suspend_resume_sm(dbg_s, (struct nvgpu_dbg_gpu_suspend_resume_all_sms_args *)buf); @@ -880,7 +888,7 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s, ch_gk20a = dbg_s->ch; if (!ch_gk20a) { - gk20a_err(dev_from_gk20a(dbg_s->g), + gk20a_err(dev_from_gk20a(g), "no bound channel for smpc ctxsw mode update\n"); err = -EINVAL; goto clean_up; @@ -889,13 +897,48 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s, err = gr_gk20a_update_smpc_ctxsw_mode(g, ch_gk20a, args->mode == NVGPU_DBG_GPU_SMPC_CTXSW_MODE_CTXSW); if (err) { - gk20a_err(dev_from_gk20a(dbg_s->g), + gk20a_err(dev_from_gk20a(g), "error (%d) during smpc ctxsw mode update\n", err); goto clean_up; } err = g->ops.regops.apply_smpc_war(dbg_s); + clean_up: + mutex_unlock(&g->dbg_sessions_lock); + return err; +} + +static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s, + struct nvgpu_dbg_gpu_hwpm_ctxsw_mode_args *args) +{ + int err; + struct gk20a *g = get_gk20a(dbg_s->pdev); + struct channel_gk20a *ch_gk20a; + gk20a_dbg_fn("%s pm ctxsw mode = %d", + dev_name(dbg_s->dev), args->mode); + + /* Take the global lock, since we'll be doing global regops */ + mutex_lock(&g->dbg_sessions_lock); + + ch_gk20a = dbg_s->ch; + + if (!ch_gk20a) { + gk20a_err(dev_from_gk20a(g), + "no bound channel for pm ctxsw mode update\n"); + err = -EINVAL; + goto clean_up; + } + + err = gr_gk20a_update_hwpm_ctxsw_mode(g, ch_gk20a, + args->mode == NVGPU_DBG_GPU_HWPM_CTXSW_MODE_CTXSW); + if (err) + gk20a_err(dev_from_gk20a(g), + "error (%d) during pm ctxsw mode update\n", err); + + /* gk20a would require a WAR to set the core PM_ENABLE bit, not + * added here with gk20a being deprecated + */ clean_up: mutex_unlock(&g->dbg_sessions_lock); return err; -- cgit v1.2.2