From e3ae03e17abd452c157545234348692364b4b9f6 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 12 Sep 2018 14:51:40 -0700 Subject: gpu: nvgpu: Add MC APIs for reset masks Add API for querying reset mask corresponding to a unit. The reset masks need to be read from MC HW header, and we do not want all units to access Mc HW headers themselves. JIRA NVGPU-954 Change-Id: I49ebbd891569de634bfc71afcecc8cd2358805c0 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1823384 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c index 00d1b196..28a3d495 100644 --- a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c @@ -34,12 +34,12 @@ #include #include #include +#include #include "gk20a.h" #include "css_gr_gk20a.h" #include -#include /* check client for pointed perfmon ownership */ #define CONTAINS_PERFMON(cl, pm) \ @@ -89,7 +89,7 @@ static void css_hw_reset_streaming(struct gk20a *g) u32 engine_status; /* reset the perfmon */ - g->ops.mc.reset(g, mc_enable_perfmon_enabled_f()); + g->ops.mc.reset(g, g->ops.mc.reset_mask(g, NVGPU_UNIT_PERFMON)); /* RBUFEMPTY must be set -- otherwise we'll pick up */ /* snapshot that have been queued up from earlier */ -- cgit v1.2.2