From d1342b8aa2fc384b2672ffcf9d34249b6ff7868c Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Tue, 14 Apr 2015 19:45:40 -0700 Subject: gpu: nvgpu: Combine delays with GM20B parameters Added delays definitions to GPCPLL parameters structure: - locking timeout delay (applied to locking in fixed frequency mode and to PLL dynamic ramp in any mode) - lock delay for GPCPLL NA mode - IDDQ exit delay in any mode Specified delay parameters for GM20B PLL, and used this data instead of hard-coded numbers. Change-Id: I63ce0abc9ee900c36ec34b8641513db3cbb6f7d5 Signed-off-by: Alex Frid Reviewed-on: http://git-master/r/732094 Reviewed-by: Seshendra Gadagottu Reviewed-by: Yu-Huan Hsu --- drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gk20a/clk_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h index c766fc46..9f5ea39e 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h @@ -25,8 +25,8 @@ enum { }; enum gpc_pll_mode { - GPC_PLL_MODE_F = 0, - GPC_PLL_MODE_DVFS, + GPC_PLL_MODE_F = 0, /* fixed frequency mode a.k.a legacy mode */ + GPC_PLL_MODE_DVFS, /* DVFS mode a.k.a NA mode */ }; struct na_dvfs { @@ -62,6 +62,16 @@ struct pll_parms { int coeff_slope, coeff_offs; /* coeff = slope * V + offs */ int uvdet_slope, uvdet_offs; /* uV = slope * det + offs */ u32 vco_ctrl; + /* + * Timing parameters in us. Lock timeout is applied to locking in fixed + * frequency mode and to dynamic ramp in any mode; does not affect lock + * latency, since lock/ramp done status bit is polled. NA mode lock and + * and IDDQ exit delays set the time of the respective opertaions with + * no status polling. + */ + u32 lock_timeout; + u32 na_lock_delay; + u32 iddq_exit_delay; }; struct clk_gk20a { @@ -70,7 +80,6 @@ struct clk_gk20a { struct pll gpc_pll; struct pll gpc_pll_last; u32 pll_delay; /* default PLL settle time */ - u32 na_pll_delay; /* default PLL settle time in NA mode */ struct mutex clk_mutex; bool sw_ready; bool clk_hw_on; -- cgit v1.2.2