From 5cd313e20221c93008f1d56ac223d6e08966505e Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Thu, 14 Aug 2014 22:44:33 -0700 Subject: gpu: nvgpu: Update GM20b GPCPLL operations Moved detection of idempotent GPCPLL operations from set_pll_freq() function to its callers, e.g., explicitly check when enable operation is called on already enabled PLL, instead of passing same frequency to set_pll_freq() in such case. Similarly explicitly check when disable operation is called on already disabled PLL. Also moved check for GPU powered on from set_pll_freq() to callers, and skip call to set interface if not. Added last GPCPLL configuration structure updated after successful completion of set_pll_freq() function. Bug 1450787 Change-Id: I8c14b8cab2a8548e98c9b2d223c465c68fb87b61 Signed-off-by: Alex Frid Reviewed-on: http://git-master/r/488027 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy --- drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/clk_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h index e6d14f74..274194be 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h @@ -52,6 +52,7 @@ struct clk_gk20a { struct gk20a *g; struct clk *tegra_clk; struct pll gpc_pll; + struct pll gpc_pll_last; u32 pll_delay; /* default PLL settle time */ struct mutex clk_mutex; bool sw_ready; -- cgit v1.2.2