From 4d7711b076acf077b93b8cbac40ab0429b33fce6 Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Fri, 12 May 2017 21:28:00 -0700 Subject: gpu: nvgpu: Add poweron voltage to clock structure Added GPCPLL poweron voltage field to GPU clock structure. Initialized it differently for GPCPLL revisions B1 and C1. Bug 1924194 Change-Id: Ide7a08445afd3ab9aea21f75871b750f45c02c99 Signed-off-by: Alex Frid Reviewed-on: http://git-master/r/1481263 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: Bo Yan --- drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gk20a/clk_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h index eb9ce069..f07efa40 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h @@ -96,6 +96,7 @@ struct clk_gk20a { bool sw_ready; bool clk_hw_on; bool debugfs_set; + int pll_poweron_uv; }; #if defined(CONFIG_COMMON_CLK) -- cgit v1.2.2