From bac51e8081a2ae778bfdccc1c57ee3ef382de077 Mon Sep 17 00:00:00 2001 From: Konsta Holtta Date: Thu, 22 Mar 2018 13:19:34 +0200 Subject: gpu: nvgpu: allow syncfds as prefences on deterministic Accept submits on deterministic channels even when the prefence is a syncfd, but only if it has just one fence inside. Because NVGPU_SUBMIT_GPFIFO_FLAGS_SYNC_FENCE is shared between pre- and postfences, a postfence (SUBMIT_GPFIFO_FLAGS_FENCE_GET) is not allowed at the same time though. The sync framework is problematic for deterministic channels due to certain allocations that are not controlled by nvgpu. However, that only applies for postfences, yet we've disallowed FLAGS_SYNC_FENCE for deterministic channels even when a postfence is not needed. Bug 200390539 Change-Id: I099bbadc11cc2f093fb2c585f3bd909143238d57 Signed-off-by: Konsta Holtta Reviewed-on: https://git-master.nvidia.com/r/1680271 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.h index da8cb251..adbecbe1 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.h @@ -46,7 +46,7 @@ struct gk20a_channel_sync { * Returns a gpu cmdbuf that performs the wait when executed */ int (*wait_fd)(struct gk20a_channel_sync *s, int fd, - struct priv_cmd_entry *entry); + struct priv_cmd_entry *entry, int max_wait_cmds); /* Increment syncpoint/semaphore. * Returns -- cgit v1.2.2