From 5286fd525731d19dfa07d5e6e49e8d0eef233531 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Wed, 17 Aug 2016 17:26:30 -0700 Subject: gpu: nvgpu: fix ctxsw timeout handling for TSGs While collecting failing engine data, id type (is_tsg) was not set for ctxsw and save engine states. This could result in some ctxsw timeout interrupts to be ignored (id reported with wrong is_tsg). For TSGs, check if we made some progress on any of the channels before kicking fifo recovery. Bug 200228310 Jira EVLR-597 Change-Id: I231549ae68317919532de0f87effb78ee9c119c6 Signed-off-by: Thomas Fleury Reviewed-on: http://git-master/r/1204035 (cherry picked from commit 7221d256fd7e9b418f7789b3d81eede8faa16f0b) Reviewed-on: http://git-master/r/1204037 Reviewed-by: Richard Zhao GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/channel_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 41fced99..d4cf6915 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c @@ -1539,16 +1539,19 @@ static inline u32 gp_free_count(struct channel_gk20a *c) } bool gk20a_channel_update_and_check_timeout(struct channel_gk20a *ch, - u32 timeout_delta_ms) + u32 timeout_delta_ms, bool *progress) { u32 gpfifo_get = update_gp_get(ch->g, ch); + /* Count consequent timeout isr */ if (gpfifo_get == ch->timeout_gpfifo_get) { /* we didn't advance since previous channel timeout check */ ch->timeout_accumulated_ms += timeout_delta_ms; + *progress = false; } else { /* first timeout isr encountered */ ch->timeout_accumulated_ms = timeout_delta_ms; + *progress = true; } ch->timeout_gpfifo_get = gpfifo_get; -- cgit v1.2.2