From 403874fa75dbb00e974a8d0f88b6e92be01ba42e Mon Sep 17 00:00:00 2001 From: David Nieto Date: Mon, 6 Feb 2017 15:44:55 -0800 Subject: gpu: nvgpu: refactor interrupt handling JIRA: EVLR-1004 (*) Refactor the non-stalling interrupt path to execute clear on the top half, so on dGPU case processing of stalling interrupts does not block non-stalling one. (*) Use a worker thread to do semaphore wakeups and allow batching of the non-stalling operations. (*) Fix a bug where some gpus will not properly track the completion of interrupts, preventing safe driver unloads Change-Id: Icc90a3acba544c97ec6a9285ab235d337ab9eefa Signed-off-by: David Nieto Reviewed-on: http://git-master/r/1312796 Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Lakshmanan M Reviewed-by: Terje Bergstrom Reviewed-by: Navneet Kumar --- drivers/gpu/nvgpu/gk20a/ce2_gk20a.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gk20a/ce2_gk20a.h') diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h index 1bb25dd1..5cdd233e 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h @@ -26,7 +26,7 @@ void gk20a_init_ce2(struct gpu_ops *gops); void gk20a_ce2_isr(struct gk20a *g, u32 inst_id, u32 pri_base); -void gk20a_ce2_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); +int gk20a_ce2_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); /* CE command utility macros */ #define NVGPU_CE_LOWER_ADDRESS_OFFSET_MASK 0xffffffff -- cgit v1.2.2