From edaf6188d54683bd955f1dc6673b3bb3ba18367e Mon Sep 17 00:00:00 2001 From: Sam Payne Date: Mon, 12 Jan 2015 14:24:55 -0800 Subject: gpu: nvgpu: enable ce2 interrupts enables non-blocking interrupts in ce2 all other ce2 interrupts are cleared and not handled. bug 200036089 Change-Id: I9f47b06c677c72ac523019e6a3f70fedd07830a2 Signed-off-by: Sam Payne Reviewed-on: http://git-master/r/671783 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | 95 +++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 drivers/gpu/nvgpu/gk20a/ce2_gk20a.c (limited to 'drivers/gpu/nvgpu/gk20a/ce2_gk20a.c') diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c new file mode 100644 index 00000000..75df4ce5 --- /dev/null +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c @@ -0,0 +1,95 @@ +/* + * GK20A Graphics Copy Engine (gr host) + * + * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + */ + +/*TODO: remove uncecessary */ +#include +#include +#include +#include +#include +#include + +#include "gk20a.h" +#include "debug_gk20a.h" +#include "semaphore_gk20a.h" +#include "hw_ce2_gk20a.h" +#include "hw_pbdma_gk20a.h" +#include "hw_ccsr_gk20a.h" +#include "hw_ram_gk20a.h" +#include "hw_proj_gk20a.h" +#include "hw_top_gk20a.h" +#include "hw_mc_gk20a.h" +#include "hw_gr_gk20a.h" + +static u32 ce2_nonblockpipe_isr(struct gk20a *g, u32 fifo_intr) +{ + gk20a_dbg(gpu_dbg_intr, "ce2 non-blocking pipe interrupt\n"); + + /* wake theads waiting in this channel */ + gk20a_channel_semaphore_wakeup(g); + return ce2_intr_status_nonblockpipe_pending_f(); +} + +static u32 ce2_blockpipe_isr(struct gk20a *g, u32 fifo_intr) +{ + gk20a_dbg(gpu_dbg_intr, "ce2 blocking pipe interrupt\n"); + + return ce2_intr_status_blockpipe_pending_f(); +} + +static u32 ce2_launcherr_isr(struct gk20a *g, u32 fifo_intr) +{ + gk20a_dbg(gpu_dbg_intr, "ce2 launch error interrupt\n"); + + return ce2_intr_status_launcherr_pending_f(); +} + +void gk20a_ce2_isr(struct gk20a *g) +{ + u32 ce2_intr = gk20a_readl(g, ce2_intr_status_r()); + u32 clear_intr = 0; + + gk20a_dbg(gpu_dbg_intr, "ce2 isr %08x\n", ce2_intr); + + /* clear blocking interrupts: they exibit broken behavior */ + if (ce2_intr & ce2_intr_status_blockpipe_pending_f()) + clear_intr |= ce2_blockpipe_isr(g, ce2_intr); + + if (ce2_intr & ce2_intr_status_launcherr_pending_f()) + clear_intr |= ce2_launcherr_isr(g, ce2_intr); + + gk20a_writel(g, ce2_intr_status_r(), clear_intr); + return; +} + +void gk20a_ce2_nonstall_isr(struct gk20a *g) +{ + u32 ce2_intr = gk20a_readl(g, ce2_intr_status_r()); + u32 clear_intr = 0; + + gk20a_dbg(gpu_dbg_intr, "ce2 nonstall isr %08x\n", ce2_intr); + + if (ce2_intr & ce2_intr_status_nonblockpipe_pending_f()) + clear_intr |= ce2_nonblockpipe_isr(g, ce2_intr); + + gk20a_writel(g, ce2_intr_status_r(), clear_intr); + + return; +} + -- cgit v1.2.2