From 2114869a4084809be18a489dc44d1b8f28e66598 Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Wed, 8 Nov 2017 15:26:23 +0530 Subject: gpu: nvgpu: Update clk_fll interface as per chips_a Two new members added to fll struct and code modified to support GV100 VBIOS NAFLL tables Add g->ops for getting vbios clk domains JIRA NVGPUGV100-39 Change-Id: Iaabea893d55d44a272e2bce2b1d525b122cd36f5 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1594289 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Mahantesh Kumbar Tested-by: Mahantesh Kumbar Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h') diff --git a/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h b/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h index cfc6538a..59a542c8 100644 --- a/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h +++ b/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -79,7 +79,7 @@ BIT(CTRL_CLK_FLL_ID_GPC4) | \ BIT(CTRL_CLK_FLL_ID_GPC5)) /*! - * Mask of all FLL IDs supported by RM + * Mask of all FLL IDs supported by Nvgpu driver */ #define CTRL_CLK_FLL_ID_ALL_MASK (BIT(CTRL_CLK_FLL_ID_SYS) | \ BIT(CTRL_CLK_FLL_ID_LTC) | \ @@ -96,4 +96,7 @@ #define CTRL_CLK_FLL_REGIME_ID_FFR (0x00000001) #define CTRL_CLK_FLL_REGIME_ID_FR (0x00000002) +#define CTRL_CLK_FLL_LUT_VSELECT_LOGIC (0x00000000) +#define CTRL_CLK_FLL_LUT_VSELECT_MIN (0x00000001) +#define CTRL_CLK_FLL_LUT_VSELECT_SRAM (0x00000002) #endif -- cgit v1.2.2