From 2114869a4084809be18a489dc44d1b8f28e66598 Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Wed, 8 Nov 2017 15:26:23 +0530 Subject: gpu: nvgpu: Update clk_fll interface as per chips_a Two new members added to fll struct and code modified to support GV100 VBIOS NAFLL tables Add g->ops for getting vbios clk domains JIRA NVGPUGV100-39 Change-Id: Iaabea893d55d44a272e2bce2b1d525b122cd36f5 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1594289 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Mahantesh Kumbar Tested-by: Mahantesh Kumbar Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/pmu/pmu_fw.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/common') diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c index ea5b21ab..cac5079e 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c @@ -1305,6 +1305,8 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) nvgpu_volt_rail_get_voltage_gv10x; g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu = nvgpu_volt_send_load_cmd_to_pmu_gv10x; + g->ops.pmu_ver.clk.get_vbios_clk_domain = + nvgpu_clk_get_vbios_clk_domain_gv10x; } else { g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = get_pmu_init_msg_pmu_queue_params_v4; @@ -1470,6 +1472,8 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) nvgpu_volt_rail_get_voltage_gp10x; g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu = nvgpu_volt_send_load_cmd_to_pmu_gp10x; + g->ops.pmu_ver.clk.get_vbios_clk_domain = + nvgpu_clk_get_vbios_clk_domain_gp10x; break; case APP_VERSION_GM20B: g->ops.pmu_ver.pg_cmd_eng_buf_load_size = -- cgit v1.2.2