From 3fbaee7099039eee84343027dd1ce20679c0c113 Mon Sep 17 00:00:00 2001 From: Srirangan Date: Mon, 20 Aug 2018 14:43:41 +0530 Subject: gpu: nvgpu: common: Fix MISRA 15.6 violations MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces, introducing the braces. JIRA NVGPU-671 Change-Id: I4d9933c51a297a725f48cbb15520a70494d74aeb Signed-off-by: Srirangan Reviewed-on: https://git-master.nvidia.com/r/1800833 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/therm/therm_gv11b.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/common/therm/therm_gv11b.c') diff --git a/drivers/gpu/nvgpu/common/therm/therm_gv11b.c b/drivers/gpu/nvgpu/common/therm/therm_gv11b.c index 77edd7e1..419dd75e 100644 --- a/drivers/gpu/nvgpu/common/therm/therm_gv11b.c +++ b/drivers/gpu/nvgpu/common/therm/therm_gv11b.c @@ -143,8 +143,9 @@ int gv11b_elcg_init_idle_filters(struct gk20a *g) u32 active_engine_id = 0; struct fifo_gk20a *f = &g->fifo; - if (nvgpu_platform_is_simulation(g)) + if (nvgpu_platform_is_simulation(g)) { return 0; + } nvgpu_log_info(g, "init clock/power gate reg"); -- cgit v1.2.2