From 63e6e8ee3ee9ce01b1f7d4c0014bb589df105d71 Mon Sep 17 00:00:00 2001 From: Srirangan Date: Wed, 1 Aug 2018 13:02:14 +0530 Subject: gpu: nvgpu: common: Fix MISRA 15.6 violations This fixes errors due to single statement loop bodies without braces, which is part of Rule 15.6 of MISRA. This patch covers in gpu/nvgpu/common/ JIRA NVGPU-989 Change-Id: Ic6a98a1cd04e4524dabf650e2f6e73c6b5a1db9d Signed-off-by: Srirangan Reviewed-on: https://git-master.nvidia.com/r/1786207 Reviewed-by: svc-misra-checker Reviewed-by: Adeel Raza GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/common/pmu/pmu_ipc.c') diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c index f34e942d..cb7c10a3 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c @@ -39,8 +39,9 @@ void nvgpu_pmu_seq_init(struct nvgpu_pmu *pmu) memset(pmu->pmu_seq_tbl, 0, sizeof(pmu->pmu_seq_tbl)); - for (i = 0; i < PMU_MAX_NUM_SEQUENCES; i++) + for (i = 0; i < PMU_MAX_NUM_SEQUENCES; i++) { pmu->seq[i].id = i; + } } static int pmu_seq_acquire(struct nvgpu_pmu *pmu, -- cgit v1.2.2