From 855d8f2379f3a157977c17ba125a422b9f74c365 Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Tue, 27 Feb 2018 09:34:21 -0800 Subject: gpu: nvgpu: Check for all sysmem apertures in GMMU Allow a potential IOMMU'ed GMMU mapping for all SYSMEM buffers inlcuding coherent sysmem. Typically this won't actually happen since IO coherent mappings will also often be accessed over NVLINK which is physically addressed. Also update the comments surrounding this code to take into account the new NVLINK nuances. Since NVLINK buffers are directly mapped even when the IOMMU is enabled this is very deserving of a comment explaining what's going on. Lastly add some simple functions for checking if an nvgpu_mem (or a particular aperture field) is a sysmem aperture. Currently this includes SYSMEM and SYSMEM_COH. JIRA EVLR-2333 Change-Id: I992d3c25d433778eaad9eef338aa5aa42afe597e Signed-off-by: Alex Waterman Reviewed-on: https://git-master.nvidia.com/r/1665185 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/mm/gmmu.c | 22 +++++++++++++++------- drivers/gpu/nvgpu/common/mm/nvgpu_mem.c | 9 +++++++++ 2 files changed, 24 insertions(+), 7 deletions(-) (limited to 'drivers/gpu/nvgpu/common/mm') diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c index 89d71b3b..0b57b88d 100644 --- a/drivers/gpu/nvgpu/common/mm/gmmu.c +++ b/drivers/gpu/nvgpu/common/mm/gmmu.c @@ -515,12 +515,20 @@ static int __nvgpu_gmmu_do_update_page_table(struct vm_gk20a *vm, /* * At this point we have a scatter-gather list pointing to some number * of discontiguous chunks of memory. We must iterate over that list and - * generate a GMMU map call for each chunk. There are two possibilities: - * either an IOMMU is enabled or not. When an IOMMU is enabled the - * mapping is simple since the "physical" address is actually a virtual - * IO address and will be contiguous. + * generate a GMMU map call for each chunk. There are several + * possibilities: + * + * 1. IOMMU enabled, IOMMU addressing (typical iGPU) + * 2. IOMMU enabled, IOMMU bypass (NVLINK bypasses SMMU) + * 3. IOMMU disabled (less common but still supported) + * 4. VIDMEM + * + * For (1) we can assume that there's really only one actual SG chunk + * since the IOMMU gives us a single contiguous address range. However, + * for (2), (3) and (4) we have to actually go through each SG entry and + * map each chunk individually. */ - if (attrs->aperture == APERTURE_SYSMEM && + if (nvgpu_aperture_is_sysmem(attrs->aperture) && nvgpu_iommuable(g) && nvgpu_sgt_iommuable(g, sgt)) { u64 io_addr = nvgpu_sgt_get_gpu_addr(g, sgt, sgt->sgl, attrs); @@ -538,8 +546,8 @@ static int __nvgpu_gmmu_do_update_page_table(struct vm_gk20a *vm, } /* - * Finally: last possible case: do the no-IOMMU mapping. In this case we - * really are mapping physical pages directly. + * Handle cases (2), (3), and (4): do the no-IOMMU mapping. In this case + * we really are mapping physical pages directly. */ nvgpu_sgt_for_each_sgl(sgl, sgt) { u64 phys_addr; diff --git a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c index 4def4938..855d455d 100644 --- a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c @@ -74,6 +74,15 @@ u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, sysmem_mask, sysmem_coh_mask, vidmem_mask); } +bool nvgpu_aperture_is_sysmem(enum nvgpu_aperture ap) +{ + return ap == __APERTURE_SYSMEM_COH || ap == APERTURE_SYSMEM; +} + +bool nvgpu_mem_is_sysmem(struct nvgpu_mem *mem) +{ + return nvgpu_aperture_is_sysmem(mem->aperture); +} struct nvgpu_sgl *nvgpu_sgt_get_next(struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl) -- cgit v1.2.2