From 2f97e683feed3c3ba3c8722c4f6ab7466bcef0c0 Mon Sep 17 00:00:00 2001 From: Sai Nikhil Date: Fri, 17 Aug 2018 10:50:17 +0530 Subject: gpu: nvgpu: common: fix MISRA Rule 10.4 MISRA Rule 10.4 only allows the usage of arithmetic operations on operands of the same essential type category. Adding "U" at the end of the integer literals to have same type of operands when an arithmetic operation is performed. This fix violations where an arithmetic operation is performed on signed and unsigned int types. In balloc_get_order_list() the argument "int order" has been changed to a u64 because all callers of this function pass a u64 argument. JIRA NVGPU-992 Change-Id: Ie2964f9f1dfb2865a9bd6e6cdd65e7cda6c1f638 Signed-off-by: Sai Nikhil Reviewed-on: https://git-master.nvidia.com/r/1784419 Reviewed-by: svc-misra-checker Reviewed-by: Adeel Raza GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h') diff --git a/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h b/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h index c9e332a5..fe3926b9 100644 --- a/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h +++ b/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h @@ -159,7 +159,7 @@ struct nvgpu_buddy_allocator { /* * Impose an upper bound on the maximum order. */ -#define GPU_BALLOC_ORDER_LIST_LEN (GPU_BALLOC_MAX_ORDER + 1) +#define GPU_BALLOC_ORDER_LIST_LEN (GPU_BALLOC_MAX_ORDER + 1U) struct nvgpu_list_node buddy_list[GPU_BALLOC_ORDER_LIST_LEN]; u64 buddy_list_len[GPU_BALLOC_ORDER_LIST_LEN]; @@ -190,7 +190,7 @@ static inline struct nvgpu_buddy_allocator *buddy_allocator( } static inline struct nvgpu_list_node *balloc_get_order_list( - struct nvgpu_buddy_allocator *a, int order) + struct nvgpu_buddy_allocator *a, u64 order) { return &a->buddy_list[order]; } -- cgit v1.2.2