From 968d8cd3e543b951714d9a86373bd721d08c8482 Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Sat, 30 Dec 2017 16:51:52 -0800 Subject: gpu: nvgpu: gv11b: enable devfreq Enable devfreq for gv11b by enabling ""nvhost_podgov" governor in platform data. Reuse scaling functions from gp10b/gk20a. Remove emc floor on railgate for power saving and make max emc frequency as floor in rail-ungate for faster gpu boot. Bug 2039013 Bug 200377508 Change-Id: I65ee7735202e3decbe3451157f7fc1f1f273c3ff Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1639752 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- .../gpu/nvgpu/common/linux/platform_gv11b_tegra.c | 30 +++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c') diff --git a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c index a452896f..81b6204d 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c @@ -1,7 +1,7 @@ /* * GV11B Tegra Platform Interface * - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -35,6 +36,7 @@ #include "gk20a/gk20a.h" #include "platform_gk20a.h" #include "clk.h" +#include "scale.h" #include "gp10b/platform_gp10b.h" #include "platform_gp10b_tegra.h" @@ -130,9 +132,16 @@ static int gv11b_tegra_railgate(struct device *dev) { #ifdef TEGRA194_POWER_DOMAIN_GPU struct gk20a_platform *platform = gk20a_get_platform(dev); + struct gk20a_scale_profile *profile = platform->g->scale_profile; struct gk20a *g = get_gk20a(dev); int i; + /* remove emc frequency floor */ + if (profile) + tegra_bwmgr_set_emc( + (struct tegra_bwmgr_client *)profile->private_data, + 0, TEGRA_BWMGR_SET_EMC_FLOOR); + if (tegra_bpmp_running()) { nvgpu_log(g, gpu_dbg_info, "bpmp running"); if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) { @@ -159,6 +168,7 @@ static int gv11b_tegra_unrailgate(struct device *dev) #ifdef TEGRA194_POWER_DOMAIN_GPU struct gk20a_platform *platform = gk20a_get_platform(dev); struct gk20a *g = get_gk20a(dev); + struct gk20a_scale_profile *profile = platform->g->scale_profile; int i; if (tegra_bpmp_running()) { @@ -177,6 +187,13 @@ static int gv11b_tegra_unrailgate(struct device *dev) } else { nvgpu_log(g, gpu_dbg_info, "bpmp not running"); } + + /* to start with set emc frequency floor to max rate*/ + if (profile) + tegra_bwmgr_set_emc( + (struct tegra_bwmgr_client *)profile->private_data, + tegra_bwmgr_get_max_emc_rate(), + TEGRA_BWMGR_SET_EMC_FLOOR); #endif return ret; } @@ -200,6 +217,7 @@ struct gk20a_platform t19x_gpu_tegra_platform = { .ch_wdt_timeout_ms = 5000, .probe = gv11b_tegra_probe, + .late_probe = gp10b_tegra_late_probe, .remove = gv11b_tegra_remove, .enable_slcg = false, @@ -219,6 +237,16 @@ struct gk20a_platform t19x_gpu_tegra_platform = { .busy = gk20a_tegra_busy, .idle = gk20a_tegra_idle, + .clk_round_rate = gp10b_round_clk_rate, + .get_clk_freqs = gp10b_clk_get_freqs, + + /* frequency scaling configuration */ + .prescale = gp10b_tegra_prescale, + .postscale = gp10b_tegra_postscale, + .devfreq_governor = "nvhost_podgov", + + .qos_notify = gk20a_scale_qos_notify, + .dump_platform_dependencies = gk20a_tegra_debug_dump, .soc_name = "tegra19x", -- cgit v1.2.2