From 942029a433390f3385ed9d6fc35476bbf9eafd98 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 5 Jun 2017 14:25:35 -0700 Subject: gpu: nvgpu: Split non-stall interrupt handling Split handling of stalling interrupt to Linux specific chip agnostic and OS independent chip specific parts. Linux specific chip independent part contains handler for ISR and passing the control to a bottom half worker. It uses the new MC HALs intr_nonstall (query interrupt status), intr_nonstall_pause (pause interrupts), intr_nonstall_resume (resume interrupts), and is_intr1_pending (query per-engine interrupt bit). MC HAL isr_nonstall is removed, because its work is now handled in chip independent code. JIRA NVGPU-26 Change-Id: I3e4c9905ef6eef7f1cc9f71b0278518ae663f87e Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1497048 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/linux/module.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/common/linux/module.c') diff --git a/drivers/gpu/nvgpu/common/linux/module.c b/drivers/gpu/nvgpu/common/linux/module.c index 4f7fc3fa..34a0ded6 100644 --- a/drivers/gpu/nvgpu/common/linux/module.c +++ b/drivers/gpu/nvgpu/common/linux/module.c @@ -162,6 +162,13 @@ int gk20a_pm_finalize_poweron(struct device *dev) nice_value = task_nice(current); set_user_nice(current, -20); + /* Enable interrupt workqueue */ + if (!g->nonstall_work_queue) { + g->nonstall_work_queue = alloc_workqueue("%s", + WQ_HIGHPRI, 1, "mc_nonstall"); + INIT_WORK(&g->nonstall_fn_work, nvgpu_intr_nonstall_cb); + } + err = gk20a_finalize_poweron(g); set_user_nice(current, nice_value); if (err) @@ -492,7 +499,7 @@ static irqreturn_t gk20a_intr_isr_nonstall(int irq, void *dev_id) { struct gk20a *g = dev_id; - return g->ops.mc.isr_nonstall(g); + return nvgpu_intr_nonstall(g); } static irqreturn_t gk20a_intr_thread_stall(int irq, void *dev_id) -- cgit v1.2.2