From dd71ad91b941d0159ae7758e2a3dd6627d7c7da2 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 16 Aug 2018 13:29:51 -0700 Subject: gpu: nvgpu: Implement own ACR code for scrubber Implement HW scrubber specific code for filling in ACR header. The PMU code relied on PMU debug mode for choosing between dbg/prod signature, and also introduced a direct dependency from FB to ACR. Change-Id: I08fa31538bec3dcb5d161a6e7076ffad76129a97 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1801418 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/fb/fb_gv100.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/common/fb/fb_gv100.c') diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv100.c b/drivers/gpu/nvgpu/common/fb/fb_gv100.c index 859a3f9b..d092ff4a 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gv100.c +++ b/drivers/gpu/nvgpu/common/fb/fb_gv100.c @@ -40,7 +40,6 @@ #include #include "gk20a/gk20a.h" -#include "gm20b/acr_gm20b.h" #include "fb_gv100.h" @@ -101,6 +100,23 @@ void gv100_fb_disable_hub_intr(struct gk20a *g) mask); } +/* + * @brief Patch signatures into ucode image + */ +static int gv100_fb_acr_ucode_patch_sig(struct gk20a *g, + unsigned int *p_img, + unsigned int *p_sig, + unsigned int *p_patch_loc, + unsigned int *p_patch_ind) +{ + /* Patching logic. We have just one location to patch. */ + p_img[(*p_patch_loc>>2)] = p_sig[(*p_patch_ind<<2)]; + p_img[(*p_patch_loc>>2)+1U] = p_sig[(*p_patch_ind<<2)+1U]; + p_img[(*p_patch_loc>>2)+2U] = p_sig[(*p_patch_ind<<2)+2U]; + p_img[(*p_patch_loc>>2)+3U] = p_sig[(*p_patch_ind<<2)+3U]; + return 0; +} + int gv100_fb_memory_unlock(struct gk20a *g) { struct nvgpu_firmware *mem_unlock_fw = NULL; @@ -143,9 +159,8 @@ int gv100_fb_memory_unlock(struct gk20a *g) hsbin_hdr->data_offset); /* Patch Ucode singnatures */ - if (acr_ucode_patch_sig(g, mem_unlock_ucode, + if (gv100_fb_acr_ucode_patch_sig(g, mem_unlock_ucode, (u32 *)(mem_unlock_fw->data + fw_hdr->sig_prod_offset), - (u32 *)(mem_unlock_fw->data + fw_hdr->sig_dbg_offset), (u32 *)(mem_unlock_fw->data + fw_hdr->patch_loc), (u32 *)(mem_unlock_fw->data + fw_hdr->patch_sig)) < 0) { nvgpu_err(g, "mem unlock patch signatures fail"); -- cgit v1.2.2