From 7a033af6602258b2f2c738a7836d17562b17d8b8 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 28 Sep 2018 14:06:15 +0530 Subject: gpu: nvgpu: remove VPR HALs from dGPUs gops.fb.dump_vpr_wpr_info() accesses both VPR and WPR registers. Split this into two different HALs gops.fb.dump_vpr_info() and gops.fb.dump_wpr_info() Also unset HALs accessing VPR registers on dGPUs We don't support VPR on dGPUs Remove fb_mmu_vpr_info_r() register and all its accessors from dGPU headers Bug 2173122 Change-Id: I5b2712f8c5389e422a84c375a7e836add48bfd1c Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1850947 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/fb/fb_gm20b.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/common/fb/fb_gm20b.h') diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.h b/drivers/gpu/nvgpu/common/fb/fb_gm20b.h index cb5b5d9a..d69f8618 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.h +++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.h @@ -43,7 +43,8 @@ u32 gm20b_fb_mmu_debug_rd(struct gk20a *g); unsigned int gm20b_fb_compression_page_size(struct gk20a *g); unsigned int gm20b_fb_compressible_page_size(struct gk20a *g); u32 gm20b_fb_compression_align_mask(struct gk20a *g); -void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g); +void gm20b_fb_dump_vpr_info(struct gk20a *g); +void gm20b_fb_dump_wpr_info(struct gk20a *g); void gm20b_fb_read_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf); int gm20b_fb_vpr_info_fetch(struct gk20a *g); bool gm20b_fb_debug_mode_enabled(struct gk20a *g); -- cgit v1.2.2