From 0f81c5616b04dea9772f490636d0a1959a42774e Mon Sep 17 00:00:00 2001 From: Vinod G Date: Fri, 18 May 2018 16:38:55 -0700 Subject: gpu: nvgpu: Code updates for MISRA violations Regenerated the gating_reglist.c files for various chips after fixing the script for MISRA C-2012 violations Rule 15.5: Multiple points of exit detected Rule 15.6: "if" body without compound statement Rule 10.3: Implicit conversions of 64bit to 32bit int Rule 7.2: Const must be declared with "U" Rule 5.7: Tags with name xxx already declared Add preprocessor conditional gaurds in gating_reglist header files JIRA NVGPU-671 JIRA NVGPU-656 JIRA NVGPU-688 JIRA NVGPU-686 JIRA NVGPU-644 Change-Id: Ie5a688cb8c39f072d2a15d86fb0ee0f2039a2cf1 Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/1724444 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- .../gpu/nvgpu/common/clock_gating/gating_reglist.h | 35 + .../common/clock_gating/gm20b_gating_reglist.c | 817 ++++++------- .../common/clock_gating/gm20b_gating_reglist.h | 13 +- .../common/clock_gating/gp106_gating_reglist.c | 769 ++++++------- .../common/clock_gating/gp106_gating_reglist.h | 9 +- .../common/clock_gating/gp10b_gating_reglist.c | 812 ++++++------- .../common/clock_gating/gp10b_gating_reglist.h | 9 +- .../common/clock_gating/gv100_gating_reglist.c | 1214 +++++++++----------- .../common/clock_gating/gv100_gating_reglist.h | 7 +- .../common/clock_gating/gv11b_gating_reglist.c | 821 ++++++------- .../common/clock_gating/gv11b_gating_reglist.h | 9 +- 11 files changed, 2110 insertions(+), 2405 deletions(-) create mode 100644 drivers/gpu/nvgpu/common/clock_gating/gating_reglist.h (limited to 'drivers/gpu/nvgpu/common/clock_gating') diff --git a/drivers/gpu/nvgpu/common/clock_gating/gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gating_reglist.h new file mode 100644 index 00000000..30638717 --- /dev/null +++ b/drivers/gpu/nvgpu/common/clock_gating/gating_reglist.h @@ -0,0 +1,35 @@ +/* + * + * Copyright (c) 2018, NVIDIA Corporation. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef GATING_REGLIST_H +#define GATING_REGLIST_H + +struct gating_desc { + u32 addr; + u32 prod; + u32 disable; +}; + +#endif /* GATING_REGLIST_H */ + diff --git a/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.c index 0ebb2d0d..4caa343e 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,156 +22,154 @@ * This file is autogenerated. Do not edit. */ -#ifndef __gm20b_gating_reglist_h__ -#define __gm20b_gating_reglist_h__ +#include +#include +#include +#include "gating_reglist.h" #include "gm20b_gating_reglist.h" -#include -struct gating_desc { - u32 addr; - u32 prod; - u32 disable; -}; +#define GATING_DESC_SIZE (u32)(sizeof(struct gating_desc)) + /* slcg bus */ static const struct gating_desc gm20b_slcg_bus[] = { - {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, + {.addr = 0x00001c04U, .prod = 0x00000000U, .disable = 0x000003feU}, }; /* slcg ce2 */ static const struct gating_desc gm20b_slcg_ce2[] = { - {.addr = 0x00106f28, .prod = 0x00000000, .disable = 0x000007fe}, + {.addr = 0x00106f28U, .prod = 0x00000000U, .disable = 0x000007feU}, }; /* slcg chiplet */ static const struct gating_desc gm20b_slcg_chiplet[] = { - {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010c07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e17cU, .prod = 0x00000000U, .disable = 0x00000007U}, }; /* slcg fb */ static const struct gating_desc gm20b_slcg_fb[] = { - {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00100d14U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x00100c9cU, .prod = 0x00000000U, .disable = 0x000001feU}, }; /* slcg fifo */ static const struct gating_desc gm20b_slcg_fifo[] = { - {.addr = 0x000026ac, .prod = 0x00000100, .disable = 0x0001fffe}, + {.addr = 0x000026acU, .prod = 0x00000100U, .disable = 0x0001fffeU}, }; /* slcg gr */ static const struct gating_desc gm20b_slcg_gr[] = { - {.addr = 0x004041f4, .prod = 0x00000002, .disable = 0x03fffffe}, - {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00409894, .prod = 0x00000040, .disable = 0x0003fffe}, - {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00406004, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, - {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x0000007e}, - {.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0041a894, .prod = 0x00000040, .disable = 0x0003fffe}, - {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, - {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, - {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, - {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418c74, .prod = 0xffffffc0, .disable = 0xfffffffe}, - {.addr = 0x00418cf4, .prod = 0xfffffffc, .disable = 0xfffffffe}, - {.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe}, - {.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe}, - {.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419d64, .prod = 0x00000000, .disable = 0x000001ff}, - {.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a6c, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a74, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, - {.addr = 0x00419cd8, .prod = 0x00000000, .disable = 0x001ffffe}, - {.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe}, - {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, - {.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe}, - {.addr = 0x00419fdc, .prod = 0xffedff00, .disable = 0xfffffffe}, - {.addr = 0x00419fe4, .prod = 0x00001b00, .disable = 0x00001ffe}, - {.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe}, - {.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, - {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x0041bed4, .prod = 0xfffffff6, .disable = 0xfffffffe}, - {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x0040881c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a8c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a94, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a9c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408aa4, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408aac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000001ff}, + {.addr = 0x004041f4U, .prod = 0x00000000U, .disable = 0x03fffffeU}, + {.addr = 0x0040917cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00409894U, .prod = 0x00000040U, .disable = 0x0003fffeU}, + {.addr = 0x004078c4U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00406004U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00405864U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00405910U, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x00408044U, .prod = 0x00000000U, .disable = 0x000007feU}, + {.addr = 0x00407004U, .prod = 0x00000000U, .disable = 0x0000007eU}, + {.addr = 0x0041a17cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0041a894U, .prod = 0x00000040U, .disable = 0x0003fffeU}, + {.addr = 0x00418504U, .prod = 0x00000000U, .disable = 0x0007fffeU}, + {.addr = 0x0041860cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x0041868cU, .prod = 0x00000000U, .disable = 0x0000001eU}, + {.addr = 0x0041871cU, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00418388U, .prod = 0x00000000U, .disable = 0x00000001U}, + {.addr = 0x0041882cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418bc0U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00418974U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418c74U, .prod = 0xffffffc0U, .disable = 0xfffffffeU}, + {.addr = 0x00418cf4U, .prod = 0xfffffffcU, .disable = 0xfffffffeU}, + {.addr = 0x00418d74U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418f10U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418e10U, .prod = 0xfffffffeU, .disable = 0xfffffffeU}, + {.addr = 0x00419024U, .prod = 0x000001feU, .disable = 0x000001feU}, + {.addr = 0x0041889cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419d64U, .prod = 0x00000000U, .disable = 0x000001ffU}, + {.addr = 0x00419a44U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a4cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419a54U, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00419a5cU, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a64U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419a6cU, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a74U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a7cU, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00419a84U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x0041986cU, .prod = 0x00000104U, .disable = 0x00fffffeU}, + {.addr = 0x00419cd8U, .prod = 0x00000000U, .disable = 0x001ffffeU}, + {.addr = 0x00419ce0U, .prod = 0x00000000U, .disable = 0x001ffffeU}, + {.addr = 0x00419c74U, .prod = 0x0000001eU, .disable = 0x0000001eU}, + {.addr = 0x00419fd4U, .prod = 0x00000000U, .disable = 0x0003fffeU}, + {.addr = 0x00419fdcU, .prod = 0xffedff00U, .disable = 0xfffffffeU}, + {.addr = 0x00419fe4U, .prod = 0x00001b00U, .disable = 0x00001ffeU}, + {.addr = 0x00419ff4U, .prod = 0x00000000U, .disable = 0x00003ffeU}, + {.addr = 0x00419ffcU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x0041be2cU, .prod = 0x04115fc0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bfecU, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bed4U, .prod = 0xfffffff6U, .disable = 0xfffffffeU}, + {.addr = 0x00408814U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x0040881cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a84U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a8cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a94U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a9cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408aa4U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408aacU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x004089acU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a24U, .prod = 0x00000000U, .disable = 0x000001ffU}, }; /* slcg ltc */ static const struct gating_desc gm20b_slcg_ltc[] = { - {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x0017e050U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0017e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, }; /* slcg perf */ static const struct gating_desc gm20b_slcg_perf[] = { - {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001bc018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001b8018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000}, + {.addr = 0x001be018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001bc018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001b8018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001b4124U, .prod = 0x00000001U, .disable = 0x00000000U}, }; /* slcg PriRing */ static const struct gating_desc gm20b_slcg_priring[] = { - {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, + {.addr = 0x001200a8U, .prod = 0x00000000U, .disable = 0x00000001U}, }; /* slcg pwr_csb */ static const struct gating_desc gm20b_slcg_pwr_csb[] = { - {.addr = 0x0000017c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, - {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe}, - {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x0000017cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00000e74U, .prod = 0x00000000U, .disable = 0x0000000fU}, + {.addr = 0x00000a74U, .prod = 0x00000000U, .disable = 0x00007ffeU}, + {.addr = 0x000016b8U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* slcg pmu */ static const struct gating_desc gm20b_slcg_pmu[] = { - {.addr = 0x0010a17c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, - {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x0010a17cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0010aa74U, .prod = 0x00000000U, .disable = 0x00007ffeU}, + {.addr = 0x0010ae74U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* therm gr */ static const struct gating_desc gm20b_slcg_therm[] = { - {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x000206b8U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* slcg Xbar */ static const struct gating_desc gm20b_slcg_xbar[] = { - {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, + {.addr = 0x0013cbe4U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc04U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, }; /* blcg bus */ static const struct gating_desc gm20b_blcg_bus[] = { - {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* blcg ctxsw prog */ @@ -180,105 +178,107 @@ static const struct gating_desc gm20b_blcg_ctxsw_prog[] = { /* blcg fb */ static const struct gating_desc gm20b_blcg_fb[] = { - {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100c98, .prod = 0x00000242, .disable = 0x00000000}, + {.addr = 0x00100d10U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d30U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d3cU, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00100d48U, .prod = 0x0000c242U, .disable = 0x00000000U}, + /* fix priv error */ + /*{.addr = 0x00100d1cU, .prod = 0x00000042U, .disable = 0x00000000U},*/ + {.addr = 0x00100c98U, .prod = 0x00000242U, .disable = 0x00000000U}, }; /* blcg fifo */ static const struct gating_desc gm20b_blcg_fifo[] = { - {.addr = 0x000026a4, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x000026a4U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg gr */ static const struct gating_desc gm20b_blcg_gr[] = { - {.addr = 0x004041f0, .prod = 0x00004046, .disable = 0x00000000}, - {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004078c0, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00406000, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00405860, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x0040590c, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00408040, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00407000, .prod = 0x00004041, .disable = 0x00000000}, - {.addr = 0x00405bf0, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x0041a890, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x00418500, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00418608, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00418688, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418828, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00418bbc, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00418970, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00418c70, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00418cf0, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00418d70, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00418f0c, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00418e0c, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00419020, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418898, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00419a40, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00419a48, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419a50, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419a58, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419a60, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419a68, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419a70, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419a78, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419a80, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00419868, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00419cd4, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419cdc, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419c70, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00419fd0, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00419fd8, .prod = 0x00004046, .disable = 0x00000000}, - {.addr = 0x00419fe0, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00419fe8, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00419ff0, .prod = 0x00004045, .disable = 0x00000000}, - {.addr = 0x00419ff8, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419f90, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x0041be28, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0041bfe8, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x0041bed0, .prod = 0x00004044, .disable = 0x00000000}, - {.addr = 0x00408810, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00408818, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00408a80, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00408a88, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00408a90, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00408a98, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00408aa0, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x00408aa8, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x004089a8, .prod = 0x00004042, .disable = 0x00000000}, - {.addr = 0x004089b0, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x004089b8, .prod = 0x00004042, .disable = 0x00000000}, + {.addr = 0x004041f0U, .prod = 0x00004046U, .disable = 0x00000000U}, + {.addr = 0x00409890U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004098b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004078c0U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00406000U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00405860U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x0040590cU, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00408040U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00407000U, .prod = 0x00004041U, .disable = 0x00000000U}, + {.addr = 0x00405bf0U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x0041a890U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x0041a8b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x00418500U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00418608U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00418688U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00418718U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418828U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00418bbcU, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00418970U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00418c70U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00418cf0U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00418d70U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00418f0cU, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00418e0cU, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00419020U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419038U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418898U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00419a40U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00419a48U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419a50U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419a58U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419a60U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419a68U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419a70U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419a78U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419a80U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00419868U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00419cd4U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419cdcU, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419c70U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00419fd0U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00419fd8U, .prod = 0x00004046U, .disable = 0x00000000U}, + {.addr = 0x00419fe0U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00419fe8U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00419ff0U, .prod = 0x00004045U, .disable = 0x00000000U}, + {.addr = 0x00419ff8U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419f90U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x0041be28U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0041bfe8U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x0041bed0U, .prod = 0x00004044U, .disable = 0x00000000U}, + {.addr = 0x00408810U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00408818U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00408a80U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00408a88U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00408a90U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00408a98U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00408aa0U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x00408aa8U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x004089a8U, .prod = 0x00004042U, .disable = 0x00000000U}, + {.addr = 0x004089b0U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x004089b8U, .prod = 0x00004042U, .disable = 0x00000000U}, }; /* blcg ltc */ static const struct gating_desc gm20b_blcg_ltc[] = { - {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x0017e030U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e040U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3c8U, .prod = 0x00000044U, .disable = 0x00000000U}, }; /* blcg pwr_csb */ static const struct gating_desc gm20b_blcg_pwr_csb[] = { - {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x00000a70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg pmu */ static const struct gating_desc gm20b_blcg_pmu[] = { - {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x0010aa70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg Xbar */ static const struct gating_desc gm20b_blcg_xbar[] = { - {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x0013cbe0U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* pg gr */ @@ -290,18 +290,15 @@ void gm20b_slcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_bus[i].addr, - gm20b_slcg_bus[i].prod); - else - gk20a_writel(g, gm20b_slcg_bus[i].addr, - gm20b_slcg_bus[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_bus[i].addr; + u32 val = prod ? gm20b_slcg_bus[i].prod : + gm20b_slcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -309,18 +306,15 @@ void gm20b_slcg_ce2_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_ce2) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_ce2[i].addr, - gm20b_slcg_ce2[i].prod); - else - gk20a_writel(g, gm20b_slcg_ce2[i].addr, - gm20b_slcg_ce2[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_ce2) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_ce2[i].addr; + u32 val = prod ? gm20b_slcg_ce2[i].prod : + gm20b_slcg_ce2[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -328,42 +322,38 @@ void gm20b_slcg_chiplet_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_chiplet) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_chiplet[i].addr, - gm20b_slcg_chiplet[i].prod); - else - gk20a_writel(g, gm20b_slcg_chiplet[i].addr, - gm20b_slcg_chiplet[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_chiplet) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_chiplet[i].addr; + u32 val = prod ? gm20b_slcg_chiplet[i].prod : + gm20b_slcg_chiplet[i].disable; + gk20a_writel(g, reg, val); + } } } void gm20b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + } } void gm20b_slcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_fb[i].addr, - gm20b_slcg_fb[i].prod); - else - gk20a_writel(g, gm20b_slcg_fb[i].addr, - gm20b_slcg_fb[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_fb[i].addr; + u32 val = prod ? gm20b_slcg_fb[i].prod : + gm20b_slcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -371,18 +361,15 @@ void gm20b_slcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_fifo[i].addr, - gm20b_slcg_fifo[i].prod); - else - gk20a_writel(g, gm20b_slcg_fifo[i].addr, - gm20b_slcg_fifo[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_fifo) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_fifo[i].addr; + u32 val = prod ? gm20b_slcg_fifo[i].prod : + gm20b_slcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -390,18 +377,15 @@ void gr_gm20b_slcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_gr[i].addr, - gm20b_slcg_gr[i].prod); - else - gk20a_writel(g, gm20b_slcg_gr[i].addr, - gm20b_slcg_gr[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_gr[i].addr; + u32 val = prod ? gm20b_slcg_gr[i].prod : + gm20b_slcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -409,18 +393,15 @@ void ltc_gm20b_slcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; + u32 size = (u32)(sizeof(gm20b_slcg_ltc) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_ltc[i].addr, - gm20b_slcg_ltc[i].prod); - else - gk20a_writel(g, gm20b_slcg_ltc[i].addr, - gm20b_slcg_ltc[i].disable); + u32 reg = gm20b_slcg_ltc[i].addr; + u32 val = prod ? gm20b_slcg_ltc[i].prod : + gm20b_slcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -428,18 +409,15 @@ void gm20b_slcg_perf_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_perf) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_perf[i].addr, - gm20b_slcg_perf[i].prod); - else - gk20a_writel(g, gm20b_slcg_perf[i].addr, - gm20b_slcg_perf[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_perf) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_perf[i].addr; + u32 val = prod ? gm20b_slcg_perf[i].prod : + gm20b_slcg_perf[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -447,18 +425,15 @@ void gm20b_slcg_priring_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_priring) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_priring[i].addr, - gm20b_slcg_priring[i].prod); - else - gk20a_writel(g, gm20b_slcg_priring[i].addr, - gm20b_slcg_priring[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_priring) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_priring[i].addr; + u32 val = prod ? gm20b_slcg_priring[i].prod : + gm20b_slcg_priring[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -466,18 +441,15 @@ void gm20b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr, - gm20b_slcg_pwr_csb[i].prod); - else - gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr, - gm20b_slcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_pwr_csb[i].addr; + u32 val = prod ? gm20b_slcg_pwr_csb[i].prod : + gm20b_slcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -485,18 +457,15 @@ void gm20b_slcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_pmu[i].addr, - gm20b_slcg_pmu[i].prod); - else - gk20a_writel(g, gm20b_slcg_pmu[i].addr, - gm20b_slcg_pmu[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_pmu[i].addr; + u32 val = prod ? gm20b_slcg_pmu[i].prod : + gm20b_slcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -504,18 +473,15 @@ void gm20b_slcg_therm_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_therm) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_therm[i].addr, - gm20b_slcg_therm[i].prod); - else - gk20a_writel(g, gm20b_slcg_therm[i].addr, - gm20b_slcg_therm[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_therm) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_therm[i].addr; + u32 val = prod ? gm20b_slcg_therm[i].prod : + gm20b_slcg_therm[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -523,18 +489,15 @@ void gm20b_slcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_slcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_xbar[i].addr, - gm20b_slcg_xbar[i].prod); - else - gk20a_writel(g, gm20b_slcg_xbar[i].addr, - gm20b_slcg_xbar[i].disable); + u32 size = (u32)(sizeof(gm20b_slcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_slcg_xbar[i].addr; + u32 val = prod ? gm20b_slcg_xbar[i].prod : + gm20b_slcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -542,18 +505,15 @@ void gm20b_blcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_bus[i].addr, - gm20b_blcg_bus[i].prod); - else - gk20a_writel(g, gm20b_blcg_bus[i].addr, - gm20b_blcg_bus[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_bus[i].addr; + u32 val = prod ? gm20b_blcg_bus[i].prod : + gm20b_blcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -561,18 +521,15 @@ void gm20b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_ctxsw_prog) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_ctxsw_prog[i].addr, - gm20b_blcg_ctxsw_prog[i].prod); - else - gk20a_writel(g, gm20b_blcg_ctxsw_prog[i].addr, - gm20b_blcg_ctxsw_prog[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_ctxsw_prog) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_ctxsw_prog[i].addr; + u32 val = prod ? gm20b_blcg_ctxsw_prog[i].prod : + gm20b_blcg_ctxsw_prog[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -580,18 +537,15 @@ void gm20b_blcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_fb[i].addr, - gm20b_blcg_fb[i].prod); - else - gk20a_writel(g, gm20b_blcg_fb[i].addr, - gm20b_blcg_fb[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_fb[i].addr; + u32 val = prod ? gm20b_blcg_fb[i].prod : + gm20b_blcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -599,18 +553,15 @@ void gm20b_blcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; + u32 size = (u32)(sizeof(gm20b_blcg_fifo) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_fifo[i].addr, - gm20b_blcg_fifo[i].prod); - else - gk20a_writel(g, gm20b_blcg_fifo[i].addr, - gm20b_blcg_fifo[i].disable); + u32 reg = gm20b_blcg_fifo[i].addr; + u32 val = prod ? gm20b_blcg_fifo[i].prod : + gm20b_blcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -618,18 +569,15 @@ void gm20b_blcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_gr[i].addr, - gm20b_blcg_gr[i].prod); - else - gk20a_writel(g, gm20b_blcg_gr[i].addr, - gm20b_blcg_gr[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_gr[i].addr; + u32 val = prod ? gm20b_blcg_gr[i].prod : + gm20b_blcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -637,18 +585,15 @@ void gm20b_blcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_ltc[i].addr, - gm20b_blcg_ltc[i].prod); - else - gk20a_writel(g, gm20b_blcg_ltc[i].addr, - gm20b_blcg_ltc[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_ltc) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_ltc[i].addr; + u32 val = prod ? gm20b_blcg_ltc[i].prod : + gm20b_blcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -656,18 +601,15 @@ void gm20b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_pwr_csb[i].addr, - gm20b_blcg_pwr_csb[i].prod); - else - gk20a_writel(g, gm20b_blcg_pwr_csb[i].addr, - gm20b_blcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_pwr_csb[i].addr; + u32 val = prod ? gm20b_blcg_pwr_csb[i].prod : + gm20b_blcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -675,18 +617,15 @@ void gm20b_blcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_pmu[i].addr, - gm20b_blcg_pmu[i].prod); - else - gk20a_writel(g, gm20b_blcg_pmu[i].addr, - gm20b_blcg_pmu[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_pmu[i].addr; + u32 val = prod ? gm20b_blcg_pmu[i].prod : + gm20b_blcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -694,18 +633,15 @@ void gm20b_blcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_blcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_xbar[i].addr, - gm20b_blcg_xbar[i].prod); - else - gk20a_writel(g, gm20b_blcg_xbar[i].addr, - gm20b_blcg_xbar[i].disable); + u32 size = (u32)(sizeof(gm20b_blcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_blcg_xbar[i].addr; + u32 val = prod ? gm20b_blcg_xbar[i].prod : + gm20b_blcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -713,19 +649,14 @@ void gr_gm20b_pg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gm20b_pg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_pg_gr[i].addr, - gm20b_pg_gr[i].prod); - else - gk20a_writel(g, gm20b_pg_gr[i].addr, - gm20b_pg_gr[i].disable); + u32 size = (u32)(sizeof(gm20b_pg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gm20b_pg_gr[i].addr; + u32 val = prod ? gm20b_pg_gr[i].prod : + gm20b_pg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } - -#endif /* __gm20b_gating_reglist_h__ */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.h index 557f5689..0c8c3b55 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gm20b_gating_reglist.h @@ -1,7 +1,5 @@ /* - * drivers/video/tegra/host/gm20b/gm20b_gating_reglist.h - * - * Copyright (c) 2014-2015, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2014-2018, NVIDIA Corporation. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,11 +18,12 @@ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. - * - * This file is autogenerated. Do not edit. */ -#include "gk20a/gk20a.h" +#ifndef GM20B_GATING_REGLIST_H +#define GM20B_GATING_REGLIST_H + +struct gk20a; void gm20b_slcg_bus_load_gating_prod(struct gk20a *g, bool prod); @@ -97,4 +96,4 @@ void gm20b_blcg_xbar_load_gating_prod(struct gk20a *g, void gr_gm20b_pg_gr_load_gating_prod(struct gk20a *g, bool prod); - +#endif /* GM20B_GATING_REGLIST_H */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.c index 169a1fee..7a01200f 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,249 +22,241 @@ * This file is autogenerated. Do not edit. */ -#ifndef __gp106_gating_reglist_h__ -#define __gp106_gating_reglist_h__ +#include +#include +#include +#include "gating_reglist.h" #include "gp106_gating_reglist.h" -#include -struct gating_desc { - u32 addr; - u32 prod; - u32 disable; -}; +#define GATING_DESC_SIZE (u32)(sizeof(struct gating_desc)) + /* slcg bus */ static const struct gating_desc gp106_slcg_bus[] = { - {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, + {.addr = 0x00001c04U, .prod = 0x00000000U, .disable = 0x000003feU}, }; /* slcg ce2 */ static const struct gating_desc gp106_slcg_ce2[] = { - {.addr = 0x00104204, .prod = 0x00000000, .disable = 0x000007fe}, + {.addr = 0x00104204U, .prod = 0x00000040U, .disable = 0x000007feU}, }; /* slcg chiplet */ static const struct gating_desc gp106_slcg_chiplet[] = { - {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010c0fc, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d0fc, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010c07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e17cU, .prod = 0x00000000U, .disable = 0x00000007U}, }; /* slcg fb */ static const struct gating_desc gp106_slcg_fb[] = { - {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00100d14U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x00100c9cU, .prod = 0x00000000U, .disable = 0x000001feU}, }; /* slcg fifo */ static const struct gating_desc gp106_slcg_fifo[] = { - {.addr = 0x000026ac, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x000026acU, .prod = 0x00000f40U, .disable = 0x0001fffeU}, }; /* slcg gr */ static const struct gating_desc gp106_slcg_gr[] = { - {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x07fffffe}, - {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00409894, .prod = 0x00000040, .disable = 0x03fffffe}, - {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00406004, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, - {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0041a894, .prod = 0x00000040, .disable = 0x03fffffe}, - {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, - {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, - {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x000003fe}, - {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, - {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418c74, .prod = 0xffffff80, .disable = 0xfffffffe}, - {.addr = 0x00418cf4, .prod = 0xfffffff8, .disable = 0xfffffffe}, - {.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe}, - {.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe}, - {.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x0000ffff}, - {.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a6c, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a74, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, - {.addr = 0x00419cd8, .prod = 0x00000000, .disable = 0x001ffffe}, - {.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe}, - {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, - {.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe}, - {.addr = 0x00419fdc, .prod = 0xffedff00, .disable = 0xfffffffe}, - {.addr = 0x00419fe4, .prod = 0x00001b00, .disable = 0x00001ffe}, - {.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe}, - {.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, - {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, - {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x0000ffff}, + {.addr = 0x004041f4U, .prod = 0x00000002U, .disable = 0x03fffffeU}, + {.addr = 0x0040917cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00409894U, .prod = 0x00000040U, .disable = 0x03fffffeU}, + {.addr = 0x004078c4U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00406004U, .prod = 0x00000200U, .disable = 0x0001fffeU}, + {.addr = 0x00405864U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00405910U, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x00408044U, .prod = 0x00000000U, .disable = 0x000007feU}, + {.addr = 0x00407004U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x0041a17cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0041a894U, .prod = 0x00000040U, .disable = 0x03fffffeU}, + {.addr = 0x00418504U, .prod = 0x00000000U, .disable = 0x0007fffeU}, + {.addr = 0x0041860cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x0041868cU, .prod = 0x00000000U, .disable = 0x0000001eU}, + {.addr = 0x0041871cU, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00418388U, .prod = 0x00000000U, .disable = 0x00000001U}, + {.addr = 0x0041882cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418bc0U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00418974U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418c74U, .prod = 0xffffffc0U, .disable = 0xfffffffeU}, + {.addr = 0x00418cf4U, .prod = 0xfffffffcU, .disable = 0xfffffffeU}, + {.addr = 0x00418d74U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418f10U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418e10U, .prod = 0xfffffffeU, .disable = 0xfffffffeU}, + {.addr = 0x00419024U, .prod = 0x000001feU, .disable = 0x000001feU}, + {.addr = 0x0041889cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419d24U, .prod = 0x00000000U, .disable = 0x0000ffffU}, + {.addr = 0x00419a44U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a4cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419a54U, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00419a5cU, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a64U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419a6cU, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a74U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a7cU, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00419a84U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x0041986cU, .prod = 0x00000104U, .disable = 0x00fffffeU}, + {.addr = 0x00419cd8U, .prod = 0x00000000U, .disable = 0x001ffffeU}, + {.addr = 0x00419ce0U, .prod = 0x00000000U, .disable = 0x001ffffeU}, + {.addr = 0x00419c74U, .prod = 0x0000001eU, .disable = 0x0000001eU}, + {.addr = 0x00419fd4U, .prod = 0x00000000U, .disable = 0x0003fffeU}, + {.addr = 0x00419fdcU, .prod = 0xffedff00U, .disable = 0xfffffffeU}, + {.addr = 0x00419fe4U, .prod = 0x00001b00U, .disable = 0x00001ffeU}, + {.addr = 0x00419ff4U, .prod = 0x00000000U, .disable = 0x00003ffeU}, + {.addr = 0x00419ffcU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x0041be2cU, .prod = 0x04115fc0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bfecU, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bed4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU}, + {.addr = 0x00408814U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a84U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x004089acU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a24U, .prod = 0x00000000U, .disable = 0x0000ffffU}, }; /* slcg ltc */ static const struct gating_desc gp106_slcg_ltc[] = { - {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x0017e050U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0017e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, }; /* slcg perf */ static const struct gating_desc gp106_slcg_perf[] = { - {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001bc018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001bc218, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001b8018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001b8218, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000}, + {.addr = 0x001be018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001bc018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001b8018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001b4124U, .prod = 0x00000001U, .disable = 0x00000000U}, }; /* slcg PriRing */ static const struct gating_desc gp106_slcg_priring[] = { - {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, + {.addr = 0x001200a8U, .prod = 0x00000000U, .disable = 0x00000001U}, }; /* slcg pmu */ static const struct gating_desc gp106_slcg_pmu[] = { - {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, - {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x0010a134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0010aa74U, .prod = 0x00004000U, .disable = 0x00007ffeU}, + {.addr = 0x0010ae74U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* therm gr */ static const struct gating_desc gp106_slcg_therm[] = { - {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x000206b8U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* slcg Xbar */ static const struct gating_desc gp106_slcg_xbar[] = { - {.addr = 0x0013c824, .prod = 0x00000000, .disable = 0x7ffffffe}, - {.addr = 0x0013dc08, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0013c924, .prod = 0x00000000, .disable = 0x7ffffffe}, - {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc24, .prod = 0x00000000, .disable = 0x1ffffffe}, + {.addr = 0x0013cbe4U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc04U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, }; /* blcg bus */ static const struct gating_desc gp106_blcg_bus[] = { - {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* blcg ce */ static const struct gating_desc gp106_blcg_ce[] = { - {.addr = 0x00104200, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00104200U, .prod = 0x00008242U, .disable = 0x00000000U}, +}; + +/* blcg ctxsw prog */ +static const struct gating_desc gp106_blcg_ctxsw_prog[] = { }; /* blcg fb */ static const struct gating_desc gp106_blcg_fb[] = { - {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000}, + {.addr = 0x00100d10U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d30U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d3cU, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00100d48U, .prod = 0x0000c242U, .disable = 0x00000000U}, + /* fix priv error */ + /*{.addr = 0x00100d1cU, .prod = 0x00000042U, .disable = 0x00000000U},*/ + {.addr = 0x00100c98U, .prod = 0x00004242U, .disable = 0x00000000U}, }; /* blcg fifo */ static const struct gating_desc gp106_blcg_fifo[] = { - {.addr = 0x000026a4, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x000026a4U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg gr */ static const struct gating_desc gp106_blcg_gr[] = { - {.addr = 0x004041f0, .prod = 0x0000c646, .disable = 0x00000000}, - {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004078c0, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00406000, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00407000, .prod = 0x4000c242, .disable = 0x00000000}, - {.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, - {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x00418500, .prod = 0x0000c244, .disable = 0x00000000}, - {.addr = 0x00418608, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418688, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418828, .prod = 0x00008444, .disable = 0x00000000}, - {.addr = 0x00418bbc, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418970, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418cf0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418d70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418f0c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418e0c, .prod = 0x00008444, .disable = 0x00000000}, - {.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00419a40, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a48, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a50, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a58, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a60, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a68, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a70, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a78, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419868, .prod = 0x00008242, .disable = 0x00000000}, - {.addr = 0x00419cd4, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419cdc, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419fd0, .prod = 0x0000c044, .disable = 0x00000000}, - {.addr = 0x00419fd8, .prod = 0x0000c046, .disable = 0x00000000}, - {.addr = 0x00419fe0, .prod = 0x0000c044, .disable = 0x00000000}, - {.addr = 0x00419fe8, .prod = 0x0000c042, .disable = 0x00000000}, - {.addr = 0x00419ff0, .prod = 0x0000c045, .disable = 0x00000000}, - {.addr = 0x00419ff8, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419f90, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, - {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00408810, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00408a80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x004089a8, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x004041f0U, .prod = 0x0000c646U, .disable = 0x00000000U}, + {.addr = 0x00409890U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004098b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004078c0U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00406000U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00405860U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x0040590cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00408040U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00407000U, .prod = 0x4000c242U, .disable = 0x00000000U}, + {.addr = 0x00405bf0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x0041a890U, .prod = 0x0000427fU, .disable = 0x00000000U}, + {.addr = 0x0041a8b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x00418500U, .prod = 0x0000c244U, .disable = 0x00000000U}, + {.addr = 0x00418608U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418688U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418718U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418828U, .prod = 0x00008444U, .disable = 0x00000000U}, + {.addr = 0x00418bbcU, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418970U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418cf0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418d70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418f0cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418e0cU, .prod = 0x00008444U, .disable = 0x00000000U}, + {.addr = 0x00419020U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419038U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418898U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00419a40U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a48U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a50U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a58U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a60U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a68U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a70U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a78U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419868U, .prod = 0x00008242U, .disable = 0x00000000U}, + {.addr = 0x00419cd4U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419cdcU, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00419fd0U, .prod = 0x0000c044U, .disable = 0x00000000U}, + {.addr = 0x00419fd8U, .prod = 0x0000c046U, .disable = 0x00000000U}, + {.addr = 0x00419fe0U, .prod = 0x0000c044U, .disable = 0x00000000U}, + {.addr = 0x00419fe8U, .prod = 0x0000c042U, .disable = 0x00000000U}, + {.addr = 0x00419ff0U, .prod = 0x0000c045U, .disable = 0x00000000U}, + {.addr = 0x00419ff8U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419f90U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x0041be28U, .prod = 0x00008242U, .disable = 0x00000000U}, + {.addr = 0x0041bfe8U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x0041bed0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00408810U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00408a80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x004089a8U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg ltc */ static const struct gating_desc gp106_blcg_ltc[] = { - {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x0017e030U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e040U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3c8U, .prod = 0x00000044U, .disable = 0x00000000U}, }; /* blcg pmu */ static const struct gating_desc gp106_blcg_pmu[] = { - {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x0010aa70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg Xbar */ static const struct gating_desc gp106_blcg_xbar[] = { - {.addr = 0x0013c820, .prod = 0x0001004a, .disable = 0x00000000}, - {.addr = 0x0013dc04, .prod = 0x0001004a, .disable = 0x00000000}, - {.addr = 0x0013c920, .prod = 0x0000004a, .disable = 0x00000000}, - {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc20, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x0013cbe0U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* pg gr */ @@ -276,18 +268,15 @@ void gp106_slcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_bus[i].addr, - gp106_slcg_bus[i].prod); - else - gk20a_writel(g, gp106_slcg_bus[i].addr, - gp106_slcg_bus[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_bus[i].addr; + u32 val = prod ? gp106_slcg_bus[i].prod : + gp106_slcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -295,18 +284,15 @@ void gp106_slcg_ce2_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_ce2) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_ce2[i].addr, - gp106_slcg_ce2[i].prod); - else - gk20a_writel(g, gp106_slcg_ce2[i].addr, - gp106_slcg_ce2[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_ce2) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_ce2[i].addr; + u32 val = prod ? gp106_slcg_ce2[i].prod : + gp106_slcg_ce2[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -314,42 +300,38 @@ void gp106_slcg_chiplet_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_chiplet) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_chiplet[i].addr, - gp106_slcg_chiplet[i].prod); - else - gk20a_writel(g, gp106_slcg_chiplet[i].addr, - gp106_slcg_chiplet[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_chiplet) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_chiplet[i].addr; + u32 val = prod ? gp106_slcg_chiplet[i].prod : + gp106_slcg_chiplet[i].disable; + gk20a_writel(g, reg, val); + } } } void gp106_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + } } void gp106_slcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_fb[i].addr, - gp106_slcg_fb[i].prod); - else - gk20a_writel(g, gp106_slcg_fb[i].addr, - gp106_slcg_fb[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_fb[i].addr; + u32 val = prod ? gp106_slcg_fb[i].prod : + gp106_slcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -357,18 +339,15 @@ void gp106_slcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_fifo[i].addr, - gp106_slcg_fifo[i].prod); - else - gk20a_writel(g, gp106_slcg_fifo[i].addr, - gp106_slcg_fifo[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_fifo) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_fifo[i].addr; + u32 val = prod ? gp106_slcg_fifo[i].prod : + gp106_slcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -376,18 +355,15 @@ void gr_gp106_slcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_gr[i].addr, - gp106_slcg_gr[i].prod); - else - gk20a_writel(g, gp106_slcg_gr[i].addr, - gp106_slcg_gr[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_gr[i].addr; + u32 val = prod ? gp106_slcg_gr[i].prod : + gp106_slcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -395,18 +371,15 @@ void ltc_gp106_slcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; + u32 size = (u32)(sizeof(gp106_slcg_ltc) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_ltc[i].addr, - gp106_slcg_ltc[i].prod); - else - gk20a_writel(g, gp106_slcg_ltc[i].addr, - gp106_slcg_ltc[i].disable); + u32 reg = gp106_slcg_ltc[i].addr; + u32 val = prod ? gp106_slcg_ltc[i].prod : + gp106_slcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -414,18 +387,15 @@ void gp106_slcg_perf_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_perf) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_perf[i].addr, - gp106_slcg_perf[i].prod); - else - gk20a_writel(g, gp106_slcg_perf[i].addr, - gp106_slcg_perf[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_perf) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_perf[i].addr; + u32 val = prod ? gp106_slcg_perf[i].prod : + gp106_slcg_perf[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -433,18 +403,15 @@ void gp106_slcg_priring_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_priring) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_priring[i].addr, - gp106_slcg_priring[i].prod); - else - gk20a_writel(g, gp106_slcg_priring[i].addr, - gp106_slcg_priring[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_priring) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_priring[i].addr; + u32 val = prod ? gp106_slcg_priring[i].prod : + gp106_slcg_priring[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -452,18 +419,15 @@ void gp106_slcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_pmu[i].addr, - gp106_slcg_pmu[i].prod); - else - gk20a_writel(g, gp106_slcg_pmu[i].addr, - gp106_slcg_pmu[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_pmu[i].addr; + u32 val = prod ? gp106_slcg_pmu[i].prod : + gp106_slcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -471,18 +435,15 @@ void gp106_slcg_therm_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_therm) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_therm[i].addr, - gp106_slcg_therm[i].prod); - else - gk20a_writel(g, gp106_slcg_therm[i].addr, - gp106_slcg_therm[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_therm) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_therm[i].addr; + u32 val = prod ? gp106_slcg_therm[i].prod : + gp106_slcg_therm[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -490,18 +451,15 @@ void gp106_slcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_slcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_slcg_xbar[i].addr, - gp106_slcg_xbar[i].prod); - else - gk20a_writel(g, gp106_slcg_xbar[i].addr, - gp106_slcg_xbar[i].disable); + u32 size = (u32)(sizeof(gp106_slcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_slcg_xbar[i].addr; + u32 val = prod ? gp106_slcg_xbar[i].prod : + gp106_slcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -509,18 +467,15 @@ void gp106_blcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_bus[i].addr, - gp106_blcg_bus[i].prod); - else - gk20a_writel(g, gp106_blcg_bus[i].addr, - gp106_blcg_bus[i].disable); + u32 size = (u32)(sizeof(gp106_blcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_bus[i].addr; + u32 val = prod ? gp106_blcg_bus[i].prod : + gp106_blcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -528,18 +483,31 @@ void gp106_blcg_ce_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_ce) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; + u32 size = (u32)(sizeof(gp106_blcg_ce) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_ce[i].addr; + u32 val = prod ? gp106_blcg_ce[i].prod : + gp106_blcg_ce[i].disable; + gk20a_writel(g, reg, val); + } + } +} - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_ce[i].addr, - gp106_blcg_ce[i].prod); - else - gk20a_writel(g, gp106_blcg_ce[i].addr, - gp106_blcg_ce[i].disable); +void gp106_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = (u32)(sizeof(gp106_blcg_ctxsw_prog) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_ctxsw_prog[i].addr; + u32 val = prod ? gp106_blcg_ctxsw_prog[i].prod : + gp106_blcg_ctxsw_prog[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -547,18 +515,15 @@ void gp106_blcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_fb[i].addr, - gp106_blcg_fb[i].prod); - else - gk20a_writel(g, gp106_blcg_fb[i].addr, - gp106_blcg_fb[i].disable); + u32 size = (u32)(sizeof(gp106_blcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_fb[i].addr; + u32 val = prod ? gp106_blcg_fb[i].prod : + gp106_blcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -566,18 +531,15 @@ void gp106_blcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; + u32 size = (u32)(sizeof(gp106_blcg_fifo) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_fifo[i].addr, - gp106_blcg_fifo[i].prod); - else - gk20a_writel(g, gp106_blcg_fifo[i].addr, - gp106_blcg_fifo[i].disable); + u32 reg = gp106_blcg_fifo[i].addr; + u32 val = prod ? gp106_blcg_fifo[i].prod : + gp106_blcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -585,18 +547,15 @@ void gp106_blcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_gr[i].addr, - gp106_blcg_gr[i].prod); - else - gk20a_writel(g, gp106_blcg_gr[i].addr, - gp106_blcg_gr[i].disable); + u32 size = (u32)(sizeof(gp106_blcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_gr[i].addr; + u32 val = prod ? gp106_blcg_gr[i].prod : + gp106_blcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -604,18 +563,15 @@ void gp106_blcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_ltc[i].addr, - gp106_blcg_ltc[i].prod); - else - gk20a_writel(g, gp106_blcg_ltc[i].addr, - gp106_blcg_ltc[i].disable); + u32 size = (u32)(sizeof(gp106_blcg_ltc) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_ltc[i].addr; + u32 val = prod ? gp106_blcg_ltc[i].prod : + gp106_blcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -623,18 +579,15 @@ void gp106_blcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_pmu[i].addr, - gp106_blcg_pmu[i].prod); - else - gk20a_writel(g, gp106_blcg_pmu[i].addr, - gp106_blcg_pmu[i].disable); + u32 size = (u32)(sizeof(gp106_blcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_pmu[i].addr; + u32 val = prod ? gp106_blcg_pmu[i].prod : + gp106_blcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -642,18 +595,15 @@ void gp106_blcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_blcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_blcg_xbar[i].addr, - gp106_blcg_xbar[i].prod); - else - gk20a_writel(g, gp106_blcg_xbar[i].addr, - gp106_blcg_xbar[i].disable); + u32 size = (u32)(sizeof(gp106_blcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_blcg_xbar[i].addr; + u32 val = prod ? gp106_blcg_xbar[i].prod : + gp106_blcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -661,19 +611,14 @@ void gr_gp106_pg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp106_pg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp106_pg_gr[i].addr, - gp106_pg_gr[i].prod); - else - gk20a_writel(g, gp106_pg_gr[i].addr, - gp106_pg_gr[i].disable); + u32 size = (u32)(sizeof(gp106_pg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp106_pg_gr[i].addr; + u32 val = prod ? gp106_pg_gr[i].prod : + gp106_pg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } - -#endif /* __gp106_gating_reglist_h__ */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.h index 773abde6..a29a2b91 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gp106_gating_reglist.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2015-2018, NVIDIA Corporation. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,7 +20,10 @@ * DEALINGS IN THE SOFTWARE. */ -#include "gk20a/gk20a.h" +#ifndef GP106_GATING_REGLIST_H +#define GP106_GATING_REGLIST_H + +struct gk20a; void gp106_slcg_bus_load_gating_prod(struct gk20a *g, bool prod); @@ -90,4 +93,4 @@ void gp106_blcg_xbar_load_gating_prod(struct gk20a *g, void gr_gp106_pg_gr_load_gating_prod(struct gk20a *g, bool prod); - +#endif /* GP106_GATING_REGLIST_H */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.c index 4355f698..70acd7db 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,155 +22,153 @@ * This file is autogenerated. Do not edit. */ -#ifndef __gp10b_gating_reglist_h__ -#define __gp10b_gating_reglist_h__ +#include +#include +#include +#include "gating_reglist.h" #include "gp10b_gating_reglist.h" -#include -struct gating_desc { - u32 addr; - u32 prod; - u32 disable; -}; +#define GATING_DESC_SIZE (u32)(sizeof(struct gating_desc)) + /* slcg bus */ static const struct gating_desc gp10b_slcg_bus[] = { - {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, + {.addr = 0x00001c04U, .prod = 0x00000000U, .disable = 0x000003feU}, }; /* slcg ce2 */ static const struct gating_desc gp10b_slcg_ce2[] = { - {.addr = 0x00104204, .prod = 0x00000000, .disable = 0x000007fe}, + {.addr = 0x00104204U, .prod = 0x00000040U, .disable = 0x000007feU}, }; /* slcg chiplet */ static const struct gating_desc gp10b_slcg_chiplet[] = { - {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010c07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e17cU, .prod = 0x00000000U, .disable = 0x00000007U}, }; /* slcg fb */ static const struct gating_desc gp10b_slcg_fb[] = { - {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00100d14U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x00100c9cU, .prod = 0x00000000U, .disable = 0x000001feU}, }; /* slcg fifo */ static const struct gating_desc gp10b_slcg_fifo[] = { - {.addr = 0x000026ac, .prod = 0x00000f40, .disable = 0x0001fffe}, + {.addr = 0x000026acU, .prod = 0x00000f40U, .disable = 0x0001fffeU}, }; /* slcg gr */ static const struct gating_desc gp10b_slcg_gr[] = { - {.addr = 0x004041f4, .prod = 0x00000002, .disable = 0x03fffffe}, - {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00409894, .prod = 0x00000040, .disable = 0x03fffffe}, - {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00406004, .prod = 0x00000200, .disable = 0x0001fffe}, - {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, - {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0041a894, .prod = 0x00000040, .disable = 0x03fffffe}, - {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, - {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, - {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, - {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418c74, .prod = 0xffffffc0, .disable = 0xfffffffe}, - {.addr = 0x00418cf4, .prod = 0xfffffffc, .disable = 0xfffffffe}, - {.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe}, - {.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe}, - {.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x0000ffff}, - {.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a6c, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a74, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, - {.addr = 0x00419cd8, .prod = 0x00000000, .disable = 0x001ffffe}, - {.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe}, - {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, - {.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe}, - {.addr = 0x00419fdc, .prod = 0xffedff00, .disable = 0xfffffffe}, - {.addr = 0x00419fe4, .prod = 0x00001b00, .disable = 0x00001ffe}, - {.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe}, - {.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, - {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, - {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x0000ffff}, + {.addr = 0x004041f4U, .prod = 0x00000002U, .disable = 0x03fffffeU}, + {.addr = 0x0040917cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00409894U, .prod = 0x00000040U, .disable = 0x03fffffeU}, + {.addr = 0x004078c4U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00406004U, .prod = 0x00000200U, .disable = 0x0001fffeU}, + {.addr = 0x00405864U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00405910U, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x00408044U, .prod = 0x00000000U, .disable = 0x000007feU}, + {.addr = 0x00407004U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x0041a17cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0041a894U, .prod = 0x00000040U, .disable = 0x03fffffeU}, + {.addr = 0x00418504U, .prod = 0x00000000U, .disable = 0x0007fffeU}, + {.addr = 0x0041860cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x0041868cU, .prod = 0x00000000U, .disable = 0x0000001eU}, + {.addr = 0x0041871cU, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00418388U, .prod = 0x00000000U, .disable = 0x00000001U}, + {.addr = 0x0041882cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418bc0U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00418974U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418c74U, .prod = 0xffffffc0U, .disable = 0xfffffffeU}, + {.addr = 0x00418cf4U, .prod = 0xfffffffcU, .disable = 0xfffffffeU}, + {.addr = 0x00418d74U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418f10U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418e10U, .prod = 0xfffffffeU, .disable = 0xfffffffeU}, + {.addr = 0x00419024U, .prod = 0x000001feU, .disable = 0x000001feU}, + {.addr = 0x0041889cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419d24U, .prod = 0x00000000U, .disable = 0x0000ffffU}, + {.addr = 0x00419a44U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a4cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419a54U, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00419a5cU, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a64U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419a6cU, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a74U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x00419a7cU, .prod = 0x00000000U, .disable = 0x0000003eU}, + {.addr = 0x00419a84U, .prod = 0x00000000U, .disable = 0x0000000eU}, + {.addr = 0x0041986cU, .prod = 0x00000104U, .disable = 0x00fffffeU}, + {.addr = 0x00419cd8U, .prod = 0x00000000U, .disable = 0x001ffffeU}, + {.addr = 0x00419ce0U, .prod = 0x00000000U, .disable = 0x001ffffeU}, + {.addr = 0x00419c74U, .prod = 0x0000001eU, .disable = 0x0000001eU}, + {.addr = 0x00419fd4U, .prod = 0x00000000U, .disable = 0x0003fffeU}, + {.addr = 0x00419fdcU, .prod = 0xffedff00U, .disable = 0xfffffffeU}, + {.addr = 0x00419fe4U, .prod = 0x00001b00U, .disable = 0x00001ffeU}, + {.addr = 0x00419ff4U, .prod = 0x00000000U, .disable = 0x00003ffeU}, + {.addr = 0x00419ffcU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x0041be2cU, .prod = 0x04115fc0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bfecU, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bed4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU}, + {.addr = 0x00408814U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a84U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x004089acU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a24U, .prod = 0x00000000U, .disable = 0x0000ffffU}, }; /* slcg ltc */ static const struct gating_desc gp10b_slcg_ltc[] = { - {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x0017e050U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0017e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, }; /* slcg perf */ static const struct gating_desc gp10b_slcg_perf[] = { - {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001bc018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001b8018, .prod = 0x000001ff, .disable = 0x00000000}, - {.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000}, + {.addr = 0x001be018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001bc018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001b8018U, .prod = 0x000001ffU, .disable = 0x00000000U}, + {.addr = 0x001b4124U, .prod = 0x00000001U, .disable = 0x00000000U}, }; /* slcg PriRing */ static const struct gating_desc gp10b_slcg_priring[] = { - {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, + {.addr = 0x001200a8U, .prod = 0x00000000U, .disable = 0x00000001U}, }; /* slcg pwr_csb */ static const struct gating_desc gp10b_slcg_pwr_csb[] = { - {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, - {.addr = 0x00000a74, .prod = 0x00004000, .disable = 0x00007ffe}, - {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x00000134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00000e74U, .prod = 0x00000000U, .disable = 0x0000000fU}, + {.addr = 0x00000a74U, .prod = 0x00004000U, .disable = 0x00007ffeU}, + {.addr = 0x000016b8U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* slcg pmu */ static const struct gating_desc gp10b_slcg_pmu[] = { - {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0010aa74, .prod = 0x00004000, .disable = 0x00007ffe}, - {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x0010a134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0010aa74U, .prod = 0x00004000U, .disable = 0x00007ffeU}, + {.addr = 0x0010ae74U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* therm gr */ static const struct gating_desc gp10b_slcg_therm[] = { - {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x000206b8U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* slcg Xbar */ static const struct gating_desc gp10b_slcg_xbar[] = { - {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, + {.addr = 0x0013cbe4U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc04U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, }; /* blcg bus */ static const struct gating_desc gp10b_blcg_bus[] = { - {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* blcg ce */ static const struct gating_desc gp10b_blcg_ce[] = { - {.addr = 0x00104200, .prod = 0x00008242, .disable = 0x00000000}, + {.addr = 0x00104200U, .prod = 0x00008242U, .disable = 0x00000000U}, }; /* blcg ctxsw prog */ @@ -179,98 +177,100 @@ static const struct gating_desc gp10b_blcg_ctxsw_prog[] = { /* blcg fb */ static const struct gating_desc gp10b_blcg_fb[] = { - {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000}, + {.addr = 0x00100d10U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d30U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d3cU, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00100d48U, .prod = 0x0000c242U, .disable = 0x00000000U}, + /* fix priv error */ + /*{.addr = 0x00100d1cU, .prod = 0x00000042U, .disable = 0x00000000U},*/ + {.addr = 0x00100c98U, .prod = 0x00004242U, .disable = 0x00000000U}, }; /* blcg fifo */ static const struct gating_desc gp10b_blcg_fifo[] = { - {.addr = 0x000026a4, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x000026a4U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg gr */ static const struct gating_desc gp10b_blcg_gr[] = { - {.addr = 0x004041f0, .prod = 0x0000c646, .disable = 0x00000000}, - {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004078c0, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00406000, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00407000, .prod = 0x4000c242, .disable = 0x00000000}, + {.addr = 0x004041f0U, .prod = 0x0000c646U, .disable = 0x00000000U}, + {.addr = 0x00409890U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004098b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004078c0U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00406000U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00405860U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x0040590cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00408040U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00407000U, .prod = 0x4000c242U, .disable = 0x00000000U}, /* fix priv error */ - /*{.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000},*/ - {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, - {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x00418500, .prod = 0x0000c244, .disable = 0x00000000}, - {.addr = 0x00418608, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418688, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418828, .prod = 0x00008444, .disable = 0x00000000}, - {.addr = 0x00418bbc, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418970, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418cf0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418d70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418f0c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418e0c, .prod = 0x00008444, .disable = 0x00000000}, - {.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00419a40, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a48, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a50, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a58, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a60, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a68, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a70, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a78, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419a80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419868, .prod = 0x00008242, .disable = 0x00000000}, - {.addr = 0x00419cd4, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419cdc, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419fd0, .prod = 0x0000c044, .disable = 0x00000000}, - {.addr = 0x00419fd8, .prod = 0x0000c046, .disable = 0x00000000}, - {.addr = 0x00419fe0, .prod = 0x0000c044, .disable = 0x00000000}, - {.addr = 0x00419fe8, .prod = 0x0000c042, .disable = 0x00000000}, - {.addr = 0x00419ff0, .prod = 0x0000c045, .disable = 0x00000000}, - {.addr = 0x00419ff8, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419f90, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, - {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00408810, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00408a80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x004089a8, .prod = 0x0000c242, .disable = 0x00000000}, + /*{.addr = 0x00405bf0U, .prod = 0x0000c444U, .disable = 0x00000000U},*/ + {.addr = 0x0041a890U, .prod = 0x0000427fU, .disable = 0x00000000U}, + {.addr = 0x0041a8b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x00418500U, .prod = 0x0000c244U, .disable = 0x00000000U}, + {.addr = 0x00418608U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418688U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418718U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418828U, .prod = 0x00008444U, .disable = 0x00000000U}, + {.addr = 0x00418bbcU, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418970U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418cf0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418d70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418f0cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418e0cU, .prod = 0x00008444U, .disable = 0x00000000U}, + {.addr = 0x00419020U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419038U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418898U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00419a40U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a48U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a50U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a58U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a60U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a68U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a70U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a78U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419a80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419868U, .prod = 0x00008242U, .disable = 0x00000000U}, + {.addr = 0x00419cd4U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419cdcU, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00419fd0U, .prod = 0x0000c044U, .disable = 0x00000000U}, + {.addr = 0x00419fd8U, .prod = 0x0000c046U, .disable = 0x00000000U}, + {.addr = 0x00419fe0U, .prod = 0x0000c044U, .disable = 0x00000000U}, + {.addr = 0x00419fe8U, .prod = 0x0000c042U, .disable = 0x00000000U}, + {.addr = 0x00419ff0U, .prod = 0x0000c045U, .disable = 0x00000000U}, + {.addr = 0x00419ff8U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419f90U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x0041be28U, .prod = 0x00008242U, .disable = 0x00000000U}, + {.addr = 0x0041bfe8U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x0041bed0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00408810U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00408a80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x004089a8U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg ltc */ static const struct gating_desc gp10b_blcg_ltc[] = { - {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x0017e030U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e040U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3c8U, .prod = 0x00000044U, .disable = 0x00000000U}, }; /* blcg pwr_csb */ static const struct gating_desc gp10b_blcg_pwr_csb[] = { - {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x00000a70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg pmu */ static const struct gating_desc gp10b_blcg_pmu[] = { - {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x0010aa70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg Xbar */ static const struct gating_desc gp10b_blcg_xbar[] = { - {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x0013cbe0U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* pg gr */ @@ -282,18 +282,15 @@ void gp10b_slcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_bus[i].addr, - gp10b_slcg_bus[i].prod); - else - gk20a_writel(g, gp10b_slcg_bus[i].addr, - gp10b_slcg_bus[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_bus[i].addr; + u32 val = prod ? gp10b_slcg_bus[i].prod : + gp10b_slcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -301,18 +298,15 @@ void gp10b_slcg_ce2_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_ce2) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_ce2[i].addr, - gp10b_slcg_ce2[i].prod); - else - gk20a_writel(g, gp10b_slcg_ce2[i].addr, - gp10b_slcg_ce2[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_ce2) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_ce2[i].addr; + u32 val = prod ? gp10b_slcg_ce2[i].prod : + gp10b_slcg_ce2[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -320,42 +314,38 @@ void gp10b_slcg_chiplet_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_chiplet) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_chiplet[i].addr, - gp10b_slcg_chiplet[i].prod); - else - gk20a_writel(g, gp10b_slcg_chiplet[i].addr, - gp10b_slcg_chiplet[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_chiplet) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_chiplet[i].addr; + u32 val = prod ? gp10b_slcg_chiplet[i].prod : + gp10b_slcg_chiplet[i].disable; + gk20a_writel(g, reg, val); + } } } void gp10b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + } } void gp10b_slcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_fb[i].addr, - gp10b_slcg_fb[i].prod); - else - gk20a_writel(g, gp10b_slcg_fb[i].addr, - gp10b_slcg_fb[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_fb[i].addr; + u32 val = prod ? gp10b_slcg_fb[i].prod : + gp10b_slcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -363,18 +353,15 @@ void gp10b_slcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_fifo[i].addr, - gp10b_slcg_fifo[i].prod); - else - gk20a_writel(g, gp10b_slcg_fifo[i].addr, - gp10b_slcg_fifo[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_fifo) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_fifo[i].addr; + u32 val = prod ? gp10b_slcg_fifo[i].prod : + gp10b_slcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -382,18 +369,15 @@ void gr_gp10b_slcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_gr[i].addr, - gp10b_slcg_gr[i].prod); - else - gk20a_writel(g, gp10b_slcg_gr[i].addr, - gp10b_slcg_gr[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_gr[i].addr; + u32 val = prod ? gp10b_slcg_gr[i].prod : + gp10b_slcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -401,18 +385,15 @@ void ltc_gp10b_slcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; + u32 size = (u32)(sizeof(gp10b_slcg_ltc) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_ltc[i].addr, - gp10b_slcg_ltc[i].prod); - else - gk20a_writel(g, gp10b_slcg_ltc[i].addr, - gp10b_slcg_ltc[i].disable); + u32 reg = gp10b_slcg_ltc[i].addr; + u32 val = prod ? gp10b_slcg_ltc[i].prod : + gp10b_slcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -420,18 +401,15 @@ void gp10b_slcg_perf_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_perf) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_perf[i].addr, - gp10b_slcg_perf[i].prod); - else - gk20a_writel(g, gp10b_slcg_perf[i].addr, - gp10b_slcg_perf[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_perf) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_perf[i].addr; + u32 val = prod ? gp10b_slcg_perf[i].prod : + gp10b_slcg_perf[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -439,18 +417,15 @@ void gp10b_slcg_priring_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_priring) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_priring[i].addr, - gp10b_slcg_priring[i].prod); - else - gk20a_writel(g, gp10b_slcg_priring[i].addr, - gp10b_slcg_priring[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_priring) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_priring[i].addr; + u32 val = prod ? gp10b_slcg_priring[i].prod : + gp10b_slcg_priring[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -458,18 +433,15 @@ void gp10b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_pwr_csb[i].addr, - gp10b_slcg_pwr_csb[i].prod); - else - gk20a_writel(g, gp10b_slcg_pwr_csb[i].addr, - gp10b_slcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_pwr_csb[i].addr; + u32 val = prod ? gp10b_slcg_pwr_csb[i].prod : + gp10b_slcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -477,18 +449,15 @@ void gp10b_slcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_pmu[i].addr, - gp10b_slcg_pmu[i].prod); - else - gk20a_writel(g, gp10b_slcg_pmu[i].addr, - gp10b_slcg_pmu[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_pmu[i].addr; + u32 val = prod ? gp10b_slcg_pmu[i].prod : + gp10b_slcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -496,18 +465,15 @@ void gp10b_slcg_therm_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_therm) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_therm[i].addr, - gp10b_slcg_therm[i].prod); - else - gk20a_writel(g, gp10b_slcg_therm[i].addr, - gp10b_slcg_therm[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_therm) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_therm[i].addr; + u32 val = prod ? gp10b_slcg_therm[i].prod : + gp10b_slcg_therm[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -515,18 +481,15 @@ void gp10b_slcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_slcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_slcg_xbar[i].addr, - gp10b_slcg_xbar[i].prod); - else - gk20a_writel(g, gp10b_slcg_xbar[i].addr, - gp10b_slcg_xbar[i].disable); + u32 size = (u32)(sizeof(gp10b_slcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_slcg_xbar[i].addr; + u32 val = prod ? gp10b_slcg_xbar[i].prod : + gp10b_slcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -534,18 +497,15 @@ void gp10b_blcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_bus[i].addr, - gp10b_blcg_bus[i].prod); - else - gk20a_writel(g, gp10b_blcg_bus[i].addr, - gp10b_blcg_bus[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_bus[i].addr; + u32 val = prod ? gp10b_blcg_bus[i].prod : + gp10b_blcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -553,18 +513,15 @@ void gp10b_blcg_ce_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_ce) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_ce[i].addr, - gp10b_blcg_ce[i].prod); - else - gk20a_writel(g, gp10b_blcg_ce[i].addr, - gp10b_blcg_ce[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_ce) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_ce[i].addr; + u32 val = prod ? gp10b_blcg_ce[i].prod : + gp10b_blcg_ce[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -572,18 +529,15 @@ void gp10b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_ctxsw_prog) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_ctxsw_prog[i].addr, - gp10b_blcg_ctxsw_prog[i].prod); - else - gk20a_writel(g, gp10b_blcg_ctxsw_prog[i].addr, - gp10b_blcg_ctxsw_prog[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_ctxsw_prog) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_ctxsw_prog[i].addr; + u32 val = prod ? gp10b_blcg_ctxsw_prog[i].prod : + gp10b_blcg_ctxsw_prog[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -591,18 +545,15 @@ void gp10b_blcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_fb[i].addr, - gp10b_blcg_fb[i].prod); - else - gk20a_writel(g, gp10b_blcg_fb[i].addr, - gp10b_blcg_fb[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_fb[i].addr; + u32 val = prod ? gp10b_blcg_fb[i].prod : + gp10b_blcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -610,18 +561,15 @@ void gp10b_blcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; + u32 size = (u32)(sizeof(gp10b_blcg_fifo) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_fifo[i].addr, - gp10b_blcg_fifo[i].prod); - else - gk20a_writel(g, gp10b_blcg_fifo[i].addr, - gp10b_blcg_fifo[i].disable); + u32 reg = gp10b_blcg_fifo[i].addr; + u32 val = prod ? gp10b_blcg_fifo[i].prod : + gp10b_blcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -629,18 +577,15 @@ void gp10b_blcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_gr[i].addr, - gp10b_blcg_gr[i].prod); - else - gk20a_writel(g, gp10b_blcg_gr[i].addr, - gp10b_blcg_gr[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_gr[i].addr; + u32 val = prod ? gp10b_blcg_gr[i].prod : + gp10b_blcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -648,18 +593,15 @@ void gp10b_blcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_ltc[i].addr, - gp10b_blcg_ltc[i].prod); - else - gk20a_writel(g, gp10b_blcg_ltc[i].addr, - gp10b_blcg_ltc[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_ltc) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_ltc[i].addr; + u32 val = prod ? gp10b_blcg_ltc[i].prod : + gp10b_blcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -667,18 +609,15 @@ void gp10b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_pwr_csb[i].addr, - gp10b_blcg_pwr_csb[i].prod); - else - gk20a_writel(g, gp10b_blcg_pwr_csb[i].addr, - gp10b_blcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_pwr_csb[i].addr; + u32 val = prod ? gp10b_blcg_pwr_csb[i].prod : + gp10b_blcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -686,18 +625,15 @@ void gp10b_blcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_pmu[i].addr, - gp10b_blcg_pmu[i].prod); - else - gk20a_writel(g, gp10b_blcg_pmu[i].addr, - gp10b_blcg_pmu[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_pmu[i].addr; + u32 val = prod ? gp10b_blcg_pmu[i].prod : + gp10b_blcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -705,18 +641,15 @@ void gp10b_blcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_blcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_blcg_xbar[i].addr, - gp10b_blcg_xbar[i].prod); - else - gk20a_writel(g, gp10b_blcg_xbar[i].addr, - gp10b_blcg_xbar[i].disable); + u32 size = (u32)(sizeof(gp10b_blcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_blcg_xbar[i].addr; + u32 val = prod ? gp10b_blcg_xbar[i].prod : + gp10b_blcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -724,19 +657,14 @@ void gr_gp10b_pg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gp10b_pg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gp10b_pg_gr[i].addr, - gp10b_pg_gr[i].prod); - else - gk20a_writel(g, gp10b_pg_gr[i].addr, - gp10b_pg_gr[i].disable); + u32 size = (u32)(sizeof(gp10b_pg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gp10b_pg_gr[i].addr; + u32 val = prod ? gp10b_pg_gr[i].prod : + gp10b_pg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } - -#endif /* __gp10b_gating_reglist_h__ */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.h index 7dbc6cac..2256ce4a 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gp10b_gating_reglist.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2015-2018, NVIDIA Corporation. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,7 +20,10 @@ * DEALINGS IN THE SOFTWARE. */ -#include "gk20a/gk20a.h" +#ifndef GP10B_GATING_REGLIST_H +#define GP10B_GATING_REGLIST_H + +struct gk20a; void gp10b_slcg_bus_load_gating_prod(struct gk20a *g, bool prod); @@ -96,4 +99,4 @@ void gp10b_blcg_xbar_load_gating_prod(struct gk20a *g, void gr_gp10b_pg_gr_load_gating_prod(struct gk20a *g, bool prod); - +#endif /* GP10B_GATING_REGLIST_H */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.c index 18703a23..8624f633 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.c @@ -18,269 +18,268 @@ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. + * * This file is autogenerated. Do not edit. */ -#ifndef __gv100_gating_reglist_h__ -#define __gv100_gating_reglist_h__ - #include +#include +#include + +#include "gating_reglist.h" #include "gv100_gating_reglist.h" -struct gating_desc { - u32 addr; - u32 prod; - u32 disable; -}; +#define GATING_DESC_SIZE (u32)(sizeof(struct gating_desc)) + /* slcg bus */ static const struct gating_desc gv100_slcg_bus[] = { - {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, + {.addr = 0x00001c04U, .prod = 0x00000000U, .disable = 0x000003feU}, }; /* slcg ce2 */ static const struct gating_desc gv100_slcg_ce2[] = { - {.addr = 0x00104204, .prod = 0x00000040, .disable = 0x000007fe}, + {.addr = 0x00104204U, .prod = 0x00000040U, .disable = 0x000007feU}, }; /* slcg chiplet */ static const struct gating_desc gv100_slcg_chiplet[] = { - {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010c17c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010c27c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010c37c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010c47c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010c57c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d17c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d27c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d37c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d47c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d57c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010c07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010c17cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010c27cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010c37cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010c47cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010c57cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d17cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d27cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d37cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d47cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d57cU, .prod = 0x00000000U, .disable = 0x00000007U}, /* fix priv error */ - /*{.addr = 0x0010d67c, .prod = 0x00000000, .disable = 0x00000007},*/ - /*{.addr = 0x0010d77c, .prod = 0x00000000, .disable = 0x00000007},*/ - {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007}, + /*{.addr = 0x0010d67cU, .prod = 0x00000000U, .disable = 0x00000007U},*/ + /*{.addr = 0x0010d77cU, .prod = 0x00000000U, .disable = 0x00000007U},*/ + {.addr = 0x0010e17cU, .prod = 0x00000000U, .disable = 0x00000007U}, }; /* slcg fb */ static const struct gating_desc gv100_slcg_fb[] = { - {.addr = 0x00100d14, .prod = 0x00000020, .disable = 0xfffffffe}, - {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x001facb4, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00100d14U, .prod = 0x00000020U, .disable = 0xfffffffeU}, + {.addr = 0x00100c9cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x001facb4U, .prod = 0x00000000U, .disable = 0x000001feU}, }; /* slcg fifo */ static const struct gating_desc gv100_slcg_fifo[] = { - {.addr = 0x000026ec, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x000026ecU, .prod = 0x00000000U, .disable = 0x0001fffeU}, }; /* slcg gr */ static const struct gating_desc gv100_slcg_gr[] = { - {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x07fffffe}, - {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00409894, .prod = 0x00000000, .disable = 0x0000fffe}, - {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00406004, .prod = 0x00000200, .disable = 0x0001fffe}, - {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, - {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00405bf4, .prod = 0x00000000, .disable = 0x00000002}, - {.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0041a894, .prod = 0x00000000, .disable = 0x0000fffe}, - {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, - {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, - {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x000003fe}, - {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, - {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418c74, .prod = 0xffffff80, .disable = 0xfffffffe}, - {.addr = 0x00418cf4, .prod = 0xfffffff8, .disable = 0xfffffffe}, - {.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe}, - {.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe}, - {.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x000000ff}, - {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, - {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, + {.addr = 0x004041f4U, .prod = 0x00000000U, .disable = 0x07fffffeU}, + {.addr = 0x0040917cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00409894U, .prod = 0x00000000U, .disable = 0x0000fffeU}, + {.addr = 0x004078c4U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00406004U, .prod = 0x00000200U, .disable = 0x0001fffeU}, + {.addr = 0x00405864U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00405910U, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x00408044U, .prod = 0x00000000U, .disable = 0x000007feU}, + {.addr = 0x00407004U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00405bf4U, .prod = 0x00000000U, .disable = 0x00000002U}, + {.addr = 0x0041a17cU, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0041a894U, .prod = 0x00000000U, .disable = 0x0000fffeU}, + {.addr = 0x00418504U, .prod = 0x00000000U, .disable = 0x0007fffeU}, + {.addr = 0x0041860cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x0041868cU, .prod = 0x00000000U, .disable = 0x0000001eU}, + {.addr = 0x0041871cU, .prod = 0x00000000U, .disable = 0x000003feU}, + {.addr = 0x00418388U, .prod = 0x00000000U, .disable = 0x00000001U}, + {.addr = 0x0041882cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418bc0U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00418974U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418c74U, .prod = 0xffffff80U, .disable = 0xfffffffeU}, + {.addr = 0x00418cf4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU}, + {.addr = 0x00418d74U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418f10U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418e10U, .prod = 0xfffffffeU, .disable = 0xfffffffeU}, + {.addr = 0x00419024U, .prod = 0x000001feU, .disable = 0x000001feU}, + {.addr = 0x0041889cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419d24U, .prod = 0x00000000U, .disable = 0x000000ffU}, + {.addr = 0x0041986cU, .prod = 0x00000104U, .disable = 0x00fffffeU}, + {.addr = 0x00419c74U, .prod = 0x0000001eU, .disable = 0x0000001eU}, /* fix priv error */ - /*{.addr = 0x00419c84, .prod = 0x0003fffe, .disable = 0x0003fffe},*/ - {.addr = 0x00419c8c, .prod = 0xffffff84, .disable = 0xfffffffe}, - {.addr = 0x00419c94, .prod = 0x00000240, .disable = 0x00007ffe}, - {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, - {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, - {.addr = 0x00419a44, .prod = 0x00000008, .disable = 0x0000000e}, - {.addr = 0x00419a4c, .prod = 0x000001f8, .disable = 0x000001fe}, - {.addr = 0x00419a54, .prod = 0x0000003c, .disable = 0x0000003e}, - {.addr = 0x00419a5c, .prod = 0x0000000c, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x00000186, .disable = 0x000001fe}, - {.addr = 0x00419a7c, .prod = 0x0000003c, .disable = 0x0000003e}, - {.addr = 0x00419a84, .prod = 0x0000000c, .disable = 0x0000000e}, - {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, - {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, - {.addr = 0x00412814, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00412a84, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x004129ac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00412a24, .prod = 0x00000000, .disable = 0x000000ff}, - {.addr = 0x00412c14, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00412e84, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00412dac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00412e24, .prod = 0x00000000, .disable = 0x000000ff}, + /*{.addr = 0x00419c84U, .prod = 0x0003fffeU, .disable = 0x0003fffeU},*/ + {.addr = 0x00419c8cU, .prod = 0xffffff84U, .disable = 0xfffffffeU}, + {.addr = 0x00419c94U, .prod = 0x00000240U, .disable = 0x00007ffeU}, + {.addr = 0x00419ca4U, .prod = 0x00003ffeU, .disable = 0x00003ffeU}, + {.addr = 0x00419cacU, .prod = 0x0001fffeU, .disable = 0x0001fffeU}, + {.addr = 0x00419a44U, .prod = 0x00000008U, .disable = 0x0000000eU}, + {.addr = 0x00419a4cU, .prod = 0x000001f8U, .disable = 0x000001feU}, + {.addr = 0x00419a54U, .prod = 0x0000003cU, .disable = 0x0000003eU}, + {.addr = 0x00419a5cU, .prod = 0x0000000cU, .disable = 0x0000000eU}, + {.addr = 0x00419a64U, .prod = 0x00000186U, .disable = 0x000001feU}, + {.addr = 0x00419a7cU, .prod = 0x0000003cU, .disable = 0x0000003eU}, + {.addr = 0x00419a84U, .prod = 0x0000000cU, .disable = 0x0000000eU}, + {.addr = 0x0041be2cU, .prod = 0x04115fc0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bfecU, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bed4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU}, + {.addr = 0x00412814U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00412a84U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x004129acU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00412a24U, .prod = 0x00000000U, .disable = 0x000000ffU}, + {.addr = 0x00412c14U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00412e84U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00412dacU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00412e24U, .prod = 0x00000000U, .disable = 0x000000ffU}, /* fix priv error */ - /*{.addr = 0x00413014, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413284, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x004131ac, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413224, .prod = 0x00000000, .disable = 0x000000ff},*/ - /*{.addr = 0x00413414, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413684, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x004135ac, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413624, .prod = 0x00000000, .disable = 0x000000ff},*/ - /*{.addr = 0x00413814, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413a84, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x004139ac, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413a24, .prod = 0x00000000, .disable = 0x000000ff},*/ - /*{.addr = 0x00413c14, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413e84, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413dac, .prod = 0x00000000, .disable = 0x0001fffe},*/ - /*{.addr = 0x00413e24, .prod = 0x00000000, .disable = 0x000000ff},*/ - {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000000ff}, + /*{.addr = 0x00413014U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413284U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x004131acU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413224U, .prod = 0x00000000U, .disable = 0x000000ffU},*/ + /*{.addr = 0x00413414U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413684U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x004135acU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413624U, .prod = 0x00000000U, .disable = 0x000000ffU},*/ + /*{.addr = 0x00413814U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413a84U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x004139acU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413a24U, .prod = 0x00000000U, .disable = 0x000000ffU},*/ + /*{.addr = 0x00413c14U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413e84U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413dacU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/ + /*{.addr = 0x00413e24U, .prod = 0x00000000U, .disable = 0x000000ffU},*/ + {.addr = 0x00408814U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a84U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x004089acU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a24U, .prod = 0x00000000U, .disable = 0x000000ffU}, }; /* slcg ltc */ static const struct gating_desc gv100_slcg_ltc[] = { - {.addr = 0x00154050, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015455c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015475c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015495c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x00154b5c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015435c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x00156050, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015655c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015675c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015695c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x00156b5c, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0015635c, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x00154050U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015455cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015475cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015495cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x00154b5cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015435cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x00156050U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015655cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015675cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015695cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x00156b5cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0015635cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, /* fix priv error */ - /*{.addr = 0x00158050, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015855c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015875c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015895c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x00158b5c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015835c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015a050, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015a55c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015a75c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015a95c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015ab5c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015a35c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015c050, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015c55c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015c75c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015c95c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015cb5c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015c35c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015e050, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015e55c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015e75c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015e95c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015eb5c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - /*{.addr = 0x0015e35c, .prod = 0x00000000, .disable = 0xfffffffe},*/ - {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, + /*{.addr = 0x00158050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015855cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015875cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015895cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x00158b5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015835cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015a050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015a55cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015a75cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015a95cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015ab5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015a35cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015c050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015c55cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015c75cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015c95cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015cb5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015c35cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015e050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015e55cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015e75cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015e95cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015eb5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + /*{.addr = 0x0015e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/ + {.addr = 0x0017e050U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0017e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, }; /* slcg perf */ static const struct gating_desc gv100_slcg_perf[] = { - {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246218, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246418, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246618, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246818, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246a18, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00248018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00248018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246218U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246418U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246618U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246818U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246a18U, .prod = 0xffffffffU, .disable = 0x00000000U}, /* fix priv error */ - /*{.addr = 0x00246c18, .prod = 0xffffffff, .disable = 0x00000000},*/ - /*{.addr = 0x00246e18, .prod = 0xffffffff, .disable = 0x00000000},*/ - {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246218, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246418, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246618, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246818, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246a18, .prod = 0xffffffff, .disable = 0x00000000}, + /*{.addr = 0x00246c18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/ + /*{.addr = 0x00246e18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/ + {.addr = 0x00246018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246218U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246418U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246618U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246818U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246a18U, .prod = 0xffffffffU, .disable = 0x00000000U}, /* fix priv error */ - /*{.addr = 0x00246c18, .prod = 0xffffffff, .disable = 0x00000000},*/ - /*{.addr = 0x00246e18, .prod = 0xffffffff, .disable = 0x00000000},*/ - {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244218, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244418, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244618, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244818, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244a18, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244218, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244418, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244618, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244818, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244a18, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x0024a124, .prod = 0x00000001, .disable = 0x00000000}, + /*{.addr = 0x00246c18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/ + /*{.addr = 0x00246e18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/ + {.addr = 0x00244018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244218U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244418U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244618U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244818U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244a18U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244218U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244418U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244618U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244818U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244a18U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x0024a124U, .prod = 0x00000001U, .disable = 0x00000000U}, }; /* slcg PriRing */ static const struct gating_desc gv100_slcg_priring[] = { - {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, + {.addr = 0x001200a8U, .prod = 0x00000000U, .disable = 0x00000001U}, }; /* slcg pwr_csb */ static const struct gating_desc gv100_slcg_pwr_csb[] = { - {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, - {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe}, - {.addr = 0x000016b8, .prod = 0x00000008, .disable = 0x0000000f}, + {.addr = 0x00000134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00000e74U, .prod = 0x00000000U, .disable = 0x0000000fU}, + {.addr = 0x00000a74U, .prod = 0x00000000U, .disable = 0x00007ffeU}, + {.addr = 0x000016b8U, .prod = 0x00000008U, .disable = 0x0000000fU}, }; /* slcg pmu */ static const struct gating_desc gv100_slcg_pmu[] = { - {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, - {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x0010a134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0010aa74U, .prod = 0x00000000U, .disable = 0x00007ffeU}, + {.addr = 0x0010ae74U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* therm gr */ static const struct gating_desc gv100_slcg_therm[] = { - {.addr = 0x000206b8, .prod = 0x00000008, .disable = 0x0000000f}, + {.addr = 0x000206b8U, .prod = 0x00000008U, .disable = 0x0000000fU}, }; /* slcg Xbar */ static const struct gating_desc gv100_slcg_xbar[] = { - {.addr = 0x0013c824, .prod = 0x00000000, .disable = 0x7ffffffe}, - {.addr = 0x0013dc08, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0013c924, .prod = 0x00000000, .disable = 0x7ffffffe}, - {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc24, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc44, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc64, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc84, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cca4, .prod = 0x00000000, .disable = 0x1ffffffe}, + {.addr = 0x0013c824U, .prod = 0x00000000U, .disable = 0x7ffffffeU}, + {.addr = 0x0013dc08U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0013c924U, .prod = 0x00000000U, .disable = 0x7ffffffeU}, + {.addr = 0x0013cbe4U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc04U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc24U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc44U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc64U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc84U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cca4U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, }; /* blcg bus */ static const struct gating_desc gv100_blcg_bus[] = { - {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* blcg ce */ static const struct gating_desc gv100_blcg_ce[] = { - {.addr = 0x00104200, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00104200U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg ctxsw prog */ @@ -289,197 +288,196 @@ static const struct gating_desc gv100_blcg_ctxsw_prog[] = { /* blcg fb */ static const struct gating_desc gv100_blcg_fb[] = { - {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, - /* fix priv error */ - /*{.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000},*/ - {.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x001facb0, .prod = 0x00004242, .disable = 0x00000000}, + {.addr = 0x00100d10U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d30U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d3cU, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00100d48U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d1cU, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00100c98U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x001facb0U, .prod = 0x00004242U, .disable = 0x00000000U}, }; /* blcg fifo */ static const struct gating_desc gv100_blcg_fifo[] = { - {.addr = 0x000026e0, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x000026e0U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg gr */ static const struct gating_desc gv100_blcg_gr[] = { - {.addr = 0x004041f0, .prod = 0x0000c646, .disable = 0x00000000}, - {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004078c0, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00406000, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00407000, .prod = 0x4000c242, .disable = 0x00000000}, - {.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, - {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x00418500, .prod = 0x0000c244, .disable = 0x00000000}, - {.addr = 0x00418608, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418688, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418828, .prod = 0x00008444, .disable = 0x00000000}, - {.addr = 0x00418bbc, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418970, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418cf0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418d70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418f0c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418e0c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00419868, .prod = 0x00008243, .disable = 0x00000000}, - {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419c80, .prod = 0x00004048, .disable = 0x00000000}, - {.addr = 0x00419c88, .prod = 0x00004048, .disable = 0x00000000}, - {.addr = 0x00419c90, .prod = 0x0000004a, .disable = 0x00000000}, - {.addr = 0x00419c98, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00419ca0, .prod = 0x00000043, .disable = 0x00000000}, - {.addr = 0x00419ca8, .prod = 0x00000003, .disable = 0x00000000}, - {.addr = 0x00419cb0, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419a40, .prod = 0x00000545, .disable = 0x00000000}, - {.addr = 0x00419a48, .prod = 0x00004545, .disable = 0x00000000}, - {.addr = 0x00419a50, .prod = 0x00004545, .disable = 0x00000000}, - {.addr = 0x00419a58, .prod = 0x00004545, .disable = 0x00000000}, - {.addr = 0x00419a60, .prod = 0x00000505, .disable = 0x00000000}, - {.addr = 0x00419a68, .prod = 0x00000505, .disable = 0x00000000}, - {.addr = 0x00419a78, .prod = 0x00000505, .disable = 0x00000000}, - {.addr = 0x00419a80, .prod = 0x00004545, .disable = 0x00000000}, - {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, - {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00412810, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00412a80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x004129a8, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00412c10, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00412e80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00412da8, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x004041f0U, .prod = 0x0000c646U, .disable = 0x00000000U}, + {.addr = 0x00409890U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004098b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004078c0U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00406000U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00405860U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x0040590cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00408040U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00407000U, .prod = 0x4000c242U, .disable = 0x00000000U}, + {.addr = 0x00405bf0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x0041a890U, .prod = 0x0000427fU, .disable = 0x00000000U}, + {.addr = 0x0041a8b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x00418500U, .prod = 0x0000c244U, .disable = 0x00000000U}, + {.addr = 0x00418608U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418688U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418718U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418828U, .prod = 0x00008444U, .disable = 0x00000000U}, + {.addr = 0x00418bbcU, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418970U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418cf0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418d70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418f0cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418e0cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00419020U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419038U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418898U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00419868U, .prod = 0x00008243U, .disable = 0x00000000U}, + {.addr = 0x00419c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00419c80U, .prod = 0x00004048U, .disable = 0x00000000U}, + {.addr = 0x00419c88U, .prod = 0x00004048U, .disable = 0x00000000U}, + {.addr = 0x00419c90U, .prod = 0x0000004aU, .disable = 0x00000000U}, + {.addr = 0x00419c98U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00419ca0U, .prod = 0x00000043U, .disable = 0x00000000U}, + {.addr = 0x00419ca8U, .prod = 0x00000003U, .disable = 0x00000000U}, + {.addr = 0x00419cb0U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419a40U, .prod = 0x00000545U, .disable = 0x00000000U}, + {.addr = 0x00419a48U, .prod = 0x00004545U, .disable = 0x00000000U}, + {.addr = 0x00419a50U, .prod = 0x00004545U, .disable = 0x00000000U}, + {.addr = 0x00419a58U, .prod = 0x00004545U, .disable = 0x00000000U}, + {.addr = 0x00419a60U, .prod = 0x00000505U, .disable = 0x00000000U}, + {.addr = 0x00419a68U, .prod = 0x00000505U, .disable = 0x00000000U}, + {.addr = 0x00419a78U, .prod = 0x00000505U, .disable = 0x00000000U}, + {.addr = 0x00419a80U, .prod = 0x00004545U, .disable = 0x00000000U}, + {.addr = 0x0041be28U, .prod = 0x00008242U, .disable = 0x00000000U}, + {.addr = 0x0041bfe8U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x0041bed0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00412810U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00412a80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x004129a8U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00412c10U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00412e80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00412da8U, .prod = 0x0000c242U, .disable = 0x00000000U}, /* fix priv error */ - /*{.addr = 0x00413010, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413280, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x004131a8, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413410, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413680, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x004135a8, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413810, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413a80, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x004139a8, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413c10, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413e80, .prod = 0x0000c242, .disable = 0x00000000},*/ - /*{.addr = 0x00413da8, .prod = 0x0000c242, .disable = 0x00000000},*/ - {.addr = 0x00408810, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00408a80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x004089a8, .prod = 0x0000c242, .disable = 0x00000000}, + /*{.addr = 0x00413010U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413280U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x004131a8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413410U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413680U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x004135a8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413810U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413a80U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x004139a8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413c10U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413e80U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + /*{.addr = 0x00413da8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/ + {.addr = 0x00408810U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00408a80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x004089a8U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg ltc */ static const struct gating_desc gv100_blcg_ltc[] = { - {.addr = 0x00154030, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00154040, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001545e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001545c8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001547e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001547c8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001549e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001549c8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00154be0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00154bc8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001543e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001543c8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00156030, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00156040, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001565e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001565c8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001567e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001567c8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001569e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001569c8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00156be0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x00156bc8, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001563e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x001563c8, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x00154030U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00154040U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001545e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001545c8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001547e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001547c8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001549e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001549c8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00154be0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00154bc8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001543e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001543c8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00156030U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00156040U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001565e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001565c8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001567e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001567c8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001569e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001569c8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00156be0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x00156bc8U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001563e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x001563c8U, .prod = 0x00000044U, .disable = 0x00000000U}, /* fix priv error */ - /*{.addr = 0x00158030, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x00158040, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001585e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001585c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001587e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001587c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001589e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001589c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x00158be0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x00158bc8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001583e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x001583c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a030, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a040, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a5e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a5c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a7e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a7c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a9e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a9c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015abe0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015abc8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a3e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015a3c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c030, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c040, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c5e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c5c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c7e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c7c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c9e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c9c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015cbe0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015cbc8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c3e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015c3c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e030, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e040, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e5e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e5c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e7e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e7c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e9e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e9c8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015ebe0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015ebc8, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e3e0, .prod = 0x00000044, .disable = 0x00000000},*/ - /*{.addr = 0x0015e3c8, .prod = 0x00000044, .disable = 0x00000000},*/ - {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000}, + /*{.addr = 0x00158030U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x00158040U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001585e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001585c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001587e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001587c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001589e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001589c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x00158be0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x00158bc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001583e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x001583c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a030U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a040U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a5e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a5c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a7e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a7c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a9e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a9c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015abe0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015abc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a3e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015a3c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c030U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c040U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c5e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c5c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c7e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c7c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c9e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c9c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015cbe0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015cbc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c3e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015c3c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e030U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e040U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e5e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e5c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e7e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e7c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e9e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e9c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015ebe0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015ebc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e3e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + /*{.addr = 0x0015e3c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/ + {.addr = 0x0017e030U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e040U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3c8U, .prod = 0x00000044U, .disable = 0x00000000U}, }; /* blcg pwr_csb */ static const struct gating_desc gv100_blcg_pwr_csb[] = { - {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x00000a70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg pmu */ static const struct gating_desc gv100_blcg_pmu[] = { - {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x0010aa70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg Xbar */ static const struct gating_desc gv100_blcg_xbar[] = { - {.addr = 0x0013c820, .prod = 0x0001004a, .disable = 0x00000000}, - {.addr = 0x0013dc04, .prod = 0x0001004a, .disable = 0x00000000}, - {.addr = 0x0013c920, .prod = 0x0000004a, .disable = 0x00000000}, - {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc20, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc40, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc60, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc80, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cca0, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x0013c820U, .prod = 0x0001004aU, .disable = 0x00000000U}, + {.addr = 0x0013dc04U, .prod = 0x0001004aU, .disable = 0x00000000U}, + {.addr = 0x0013c920U, .prod = 0x0000004aU, .disable = 0x00000000U}, + {.addr = 0x0013cbe0U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc00U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc20U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc40U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc60U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc80U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cca0U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* pg gr */ @@ -491,18 +489,15 @@ void gv100_slcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_bus[i].addr, - gv100_slcg_bus[i].prod); - else - gk20a_writel(g, gv100_slcg_bus[i].addr, - gv100_slcg_bus[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_bus[i].addr; + u32 val = prod ? gv100_slcg_bus[i].prod : + gv100_slcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -510,18 +505,15 @@ void gv100_slcg_ce2_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_ce2) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_ce2[i].addr, - gv100_slcg_ce2[i].prod); - else - gk20a_writel(g, gv100_slcg_ce2[i].addr, - gv100_slcg_ce2[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_ce2) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_ce2[i].addr; + u32 val = prod ? gv100_slcg_ce2[i].prod : + gv100_slcg_ce2[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -529,42 +521,38 @@ void gv100_slcg_chiplet_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_chiplet) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_chiplet[i].addr, - gv100_slcg_chiplet[i].prod); - else - gk20a_writel(g, gv100_slcg_chiplet[i].addr, - gv100_slcg_chiplet[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_chiplet) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_chiplet[i].addr; + u32 val = prod ? gv100_slcg_chiplet[i].prod : + gv100_slcg_chiplet[i].disable; + gk20a_writel(g, reg, val); + } } } void gv100_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + } } void gv100_slcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_fb[i].addr, - gv100_slcg_fb[i].prod); - else - gk20a_writel(g, gv100_slcg_fb[i].addr, - gv100_slcg_fb[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_fb[i].addr; + u32 val = prod ? gv100_slcg_fb[i].prod : + gv100_slcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -572,18 +560,15 @@ void gv100_slcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_fifo[i].addr, - gv100_slcg_fifo[i].prod); - else - gk20a_writel(g, gv100_slcg_fifo[i].addr, - gv100_slcg_fifo[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_fifo) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_fifo[i].addr; + u32 val = prod ? gv100_slcg_fifo[i].prod : + gv100_slcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -591,18 +576,15 @@ void gr_gv100_slcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_gr[i].addr, - gv100_slcg_gr[i].prod); - else - gk20a_writel(g, gv100_slcg_gr[i].addr, - gv100_slcg_gr[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_gr[i].addr; + u32 val = prod ? gv100_slcg_gr[i].prod : + gv100_slcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -610,18 +592,15 @@ void ltc_gv100_slcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; + u32 size = (u32)(sizeof(gv100_slcg_ltc) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_ltc[i].addr, - gv100_slcg_ltc[i].prod); - else - gk20a_writel(g, gv100_slcg_ltc[i].addr, - gv100_slcg_ltc[i].disable); + u32 reg = gv100_slcg_ltc[i].addr; + u32 val = prod ? gv100_slcg_ltc[i].prod : + gv100_slcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -629,18 +608,15 @@ void gv100_slcg_perf_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_perf) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_perf[i].addr, - gv100_slcg_perf[i].prod); - else - gk20a_writel(g, gv100_slcg_perf[i].addr, - gv100_slcg_perf[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_perf) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_perf[i].addr; + u32 val = prod ? gv100_slcg_perf[i].prod : + gv100_slcg_perf[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -648,18 +624,15 @@ void gv100_slcg_priring_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_priring) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_priring[i].addr, - gv100_slcg_priring[i].prod); - else - gk20a_writel(g, gv100_slcg_priring[i].addr, - gv100_slcg_priring[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_priring) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_priring[i].addr; + u32 val = prod ? gv100_slcg_priring[i].prod : + gv100_slcg_priring[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -667,18 +640,15 @@ void gv100_slcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_pwr_csb[i].addr, - gv100_slcg_pwr_csb[i].prod); - else - gk20a_writel(g, gv100_slcg_pwr_csb[i].addr, - gv100_slcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_pwr_csb[i].addr; + u32 val = prod ? gv100_slcg_pwr_csb[i].prod : + gv100_slcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -686,18 +656,15 @@ void gv100_slcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_pmu[i].addr, - gv100_slcg_pmu[i].prod); - else - gk20a_writel(g, gv100_slcg_pmu[i].addr, - gv100_slcg_pmu[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_pmu[i].addr; + u32 val = prod ? gv100_slcg_pmu[i].prod : + gv100_slcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -705,18 +672,15 @@ void gv100_slcg_therm_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_therm) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_therm[i].addr, - gv100_slcg_therm[i].prod); - else - gk20a_writel(g, gv100_slcg_therm[i].addr, - gv100_slcg_therm[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_therm) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_therm[i].addr; + u32 val = prod ? gv100_slcg_therm[i].prod : + gv100_slcg_therm[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -724,18 +688,15 @@ void gv100_slcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_slcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_slcg_xbar[i].addr, - gv100_slcg_xbar[i].prod); - else - gk20a_writel(g, gv100_slcg_xbar[i].addr, - gv100_slcg_xbar[i].disable); + u32 size = (u32)(sizeof(gv100_slcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_slcg_xbar[i].addr; + u32 val = prod ? gv100_slcg_xbar[i].prod : + gv100_slcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -743,18 +704,15 @@ void gv100_blcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_bus[i].addr, - gv100_blcg_bus[i].prod); - else - gk20a_writel(g, gv100_blcg_bus[i].addr, - gv100_blcg_bus[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_bus[i].addr; + u32 val = prod ? gv100_blcg_bus[i].prod : + gv100_blcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -762,18 +720,15 @@ void gv100_blcg_ce_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_ce) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_ce[i].addr, - gv100_blcg_ce[i].prod); - else - gk20a_writel(g, gv100_blcg_ce[i].addr, - gv100_blcg_ce[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_ce) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_ce[i].addr; + u32 val = prod ? gv100_blcg_ce[i].prod : + gv100_blcg_ce[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -781,18 +736,15 @@ void gv100_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_ctxsw_prog) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_ctxsw_prog[i].addr, - gv100_blcg_ctxsw_prog[i].prod); - else - gk20a_writel(g, gv100_blcg_ctxsw_prog[i].addr, - gv100_blcg_ctxsw_prog[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_ctxsw_prog) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_ctxsw_prog[i].addr; + u32 val = prod ? gv100_blcg_ctxsw_prog[i].prod : + gv100_blcg_ctxsw_prog[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -800,18 +752,15 @@ void gv100_blcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_fb[i].addr, - gv100_blcg_fb[i].prod); - else - gk20a_writel(g, gv100_blcg_fb[i].addr, - gv100_blcg_fb[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_fb[i].addr; + u32 val = prod ? gv100_blcg_fb[i].prod : + gv100_blcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -819,18 +768,15 @@ void gv100_blcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; + u32 size = (u32)(sizeof(gv100_blcg_fifo) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_fifo[i].addr, - gv100_blcg_fifo[i].prod); - else - gk20a_writel(g, gv100_blcg_fifo[i].addr, - gv100_blcg_fifo[i].disable); + u32 reg = gv100_blcg_fifo[i].addr; + u32 val = prod ? gv100_blcg_fifo[i].prod : + gv100_blcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -838,18 +784,15 @@ void gv100_blcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_gr[i].addr, - gv100_blcg_gr[i].prod); - else - gk20a_writel(g, gv100_blcg_gr[i].addr, - gv100_blcg_gr[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_gr[i].addr; + u32 val = prod ? gv100_blcg_gr[i].prod : + gv100_blcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -857,18 +800,15 @@ void gv100_blcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_ltc[i].addr, - gv100_blcg_ltc[i].prod); - else - gk20a_writel(g, gv100_blcg_ltc[i].addr, - gv100_blcg_ltc[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_ltc) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_ltc[i].addr; + u32 val = prod ? gv100_blcg_ltc[i].prod : + gv100_blcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -876,18 +816,15 @@ void gv100_blcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_pwr_csb[i].addr, - gv100_blcg_pwr_csb[i].prod); - else - gk20a_writel(g, gv100_blcg_pwr_csb[i].addr, - gv100_blcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_pwr_csb[i].addr; + u32 val = prod ? gv100_blcg_pwr_csb[i].prod : + gv100_blcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -895,18 +832,15 @@ void gv100_blcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_pmu[i].addr, - gv100_blcg_pmu[i].prod); - else - gk20a_writel(g, gv100_blcg_pmu[i].addr, - gv100_blcg_pmu[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_pmu[i].addr; + u32 val = prod ? gv100_blcg_pmu[i].prod : + gv100_blcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -914,18 +848,15 @@ void gv100_blcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_blcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_blcg_xbar[i].addr, - gv100_blcg_xbar[i].prod); - else - gk20a_writel(g, gv100_blcg_xbar[i].addr, - gv100_blcg_xbar[i].disable); + u32 size = (u32)(sizeof(gv100_blcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_blcg_xbar[i].addr; + u32 val = prod ? gv100_blcg_xbar[i].prod : + gv100_blcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -933,19 +864,14 @@ void gr_gv100_pg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv100_pg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv100_pg_gr[i].addr, - gv100_pg_gr[i].prod); - else - gk20a_writel(g, gv100_pg_gr[i].addr, - gv100_pg_gr[i].disable); + u32 size = (u32)(sizeof(gv100_pg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv100_pg_gr[i].addr; + u32 val = prod ? gv100_pg_gr[i].prod : + gv100_pg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } - -#endif /* __gv100_gating_reglist_h__ */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.h index fa231d26..279bc4d2 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gv100_gating_reglist.h @@ -20,7 +20,10 @@ * DEALINGS IN THE SOFTWARE. */ -#include "gk20a/gk20a.h" +#ifndef GV100_GATING_REGLIST_H +#define GV100_GATING_REGLIST_H + +struct gk20a; void gv100_slcg_bus_load_gating_prod(struct gk20a *g, bool prod); @@ -96,4 +99,4 @@ void gv100_blcg_xbar_load_gating_prod(struct gk20a *g, void gr_gv100_pg_gr_load_gating_prod(struct gk20a *g, bool prod); - +#endif /* GV100_GATING_REGLIST_H */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c index 998783e4..418f2c12 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c @@ -22,164 +22,163 @@ * This file is autogenerated. Do not edit. */ -#ifndef __gv11b_gating_reglist_h__ -#define __gv11b_gating_reglist_h__ - #include -#include "gv11b_gating_reglist.h" +#include #include -struct gating_desc { - u32 addr; - u32 prod; - u32 disable; -}; +#include "gating_reglist.h" +#include "gv11b_gating_reglist.h" + +#define GATING_DESC_SIZE (u32)(sizeof(struct gating_desc)) + /* slcg bus */ static const struct gating_desc gv11b_slcg_bus[] = { - {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, + {.addr = 0x00001c04U, .prod = 0x00000000U, .disable = 0x000003feU}, }; /* slcg ce2 */ static const struct gating_desc gv11b_slcg_ce2[] = { - {.addr = 0x00104204, .prod = 0x00000040, .disable = 0x000007fe}, + {.addr = 0x00104204U, .prod = 0x00000040U, .disable = 0x000007feU}, }; /* slcg chiplet */ static const struct gating_desc gv11b_slcg_chiplet[] = { - {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, - {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010c07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010d07cU, .prod = 0x00000000U, .disable = 0x00000007U}, + {.addr = 0x0010e17cU, .prod = 0x00000000U, .disable = 0x00000007U}, }; /* slcg fb */ static const struct gating_desc gv11b_slcg_fb[] = { - {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00100d14U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x00100c9cU, .prod = 0x00000000U, .disable = 0x000001feU}, }; /* slcg fifo */ static const struct gating_desc gv11b_slcg_fifo[] = { - {.addr = 0x000026ec, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x000026ecU, .prod = 0x00000000U, .disable = 0x0001fffeU}, }; /* slcg gr */ static const struct gating_desc gv11b_slcg_gr[] = { - {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x07fffffe}, - {.addr = 0x00409134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00409894, .prod = 0x00000000, .disable = 0x0000fffe}, - {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00406004, .prod = 0x00000200, .disable = 0x0001fffe}, - {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, - {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, + {.addr = 0x004041f4U, .prod = 0x00000000U, .disable = 0x07fffffeU}, + {.addr = 0x00409134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00409894U, .prod = 0x00000000U, .disable = 0x0000fffeU}, + {.addr = 0x004078c4U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00406004U, .prod = 0x00000200U, .disable = 0x0001fffeU}, + {.addr = 0x00405864U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00405910U, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, + {.addr = 0x00408044U, .prod = 0x00000000U, .disable = 0x000007feU}, + /* fix priv error */ + /*{.addr = 0x00407004U, .prod = 0x00000000U, .disable = 0x000001feU},*/ + /*{.addr = 0x00405bf4U, .prod = 0x00000000U, .disable = 0x00000002U},*/ + {.addr = 0x0041a134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0041a894U, .prod = 0x00000000U, .disable = 0x0000fffeU}, + {.addr = 0x00418504U, .prod = 0x00000000U, .disable = 0x0007fffeU}, /* fix priv error */ - /*{.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe},*/ - /*{.addr = 0x00405bf4, .prod = 0x00000000, .disable = 0x00000002},*/ - {.addr = 0x0041a134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0041a894, .prod = 0x00000000, .disable = 0x0000fffe}, - {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, + /*{.addr = 0x0041860cU, .prod = 0x00000000U, .disable = 0x000001feU},*/ + {.addr = 0x0041868cU, .prod = 0x00000000U, .disable = 0x0000001eU}, + {.addr = 0x0041871cU, .prod = 0x00000000U, .disable = 0x000003feU}, + {.addr = 0x00418388U, .prod = 0x00000000U, .disable = 0x00000001U}, + {.addr = 0x0041882cU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00418bc0U, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00418974U, .prod = 0x00000000U, .disable = 0x0001fffeU}, /* fix priv error */ - /*{.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe},*/ - {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, - {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x000003fe}, - {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, - {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, + /*{.addr = 0x00418c74U, .prod = 0xffffff80U, .disable = 0xfffffffeU},*/ + {.addr = 0x00418cf4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU}, + {.addr = 0x00418d74U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418f10U, .prod = 0xffffffe0U, .disable = 0xfffffffeU}, + {.addr = 0x00418e10U, .prod = 0xfffffffeU, .disable = 0xfffffffeU}, + {.addr = 0x00419024U, .prod = 0x000001feU, .disable = 0x000001feU}, + {.addr = 0x0041889cU, .prod = 0x00000000U, .disable = 0x000001feU}, + {.addr = 0x00419d24U, .prod = 0x00000000U, .disable = 0x000000ffU}, + {.addr = 0x0041986cU, .prod = 0x00000104U, .disable = 0x00fffffeU}, + {.addr = 0x00419c74U, .prod = 0x0000001eU, .disable = 0x0000001eU}, /* fix priv error */ - /*{.addr = 0x00418c74, .prod = 0xffffff80, .disable = 0xfffffffe},*/ - {.addr = 0x00418cf4, .prod = 0xfffffff8, .disable = 0xfffffffe}, - {.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe}, - {.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe}, - {.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe}, - {.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x000000ff}, - {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, - {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, - {.addr = 0x00419c8c, .prod = 0xffffff84, .disable = 0xfffffffe}, - {.addr = 0x00419c94, .prod = 0x00080040, .disable = 0x000ffffe}, - {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, - {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, - {.addr = 0x00419a44, .prod = 0x00000008, .disable = 0x0000000e}, - {.addr = 0x00419a4c, .prod = 0x000001f8, .disable = 0x000001fe}, - {.addr = 0x00419a54, .prod = 0x0000003c, .disable = 0x0000003e}, - {.addr = 0x00419a5c, .prod = 0x0000000c, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x000001ba, .disable = 0x000001fe}, - {.addr = 0x00419a7c, .prod = 0x0000003c, .disable = 0x0000003e}, - {.addr = 0x00419a84, .prod = 0x0000000c, .disable = 0x0000000e}, - {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, - {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, + /*{.addr = 0x00419c84U, .prod = 0x0003fff8U, .disable = 0x0003fffeU},*/ + {.addr = 0x00419c8cU, .prod = 0xffffff84U, .disable = 0xfffffffeU}, + {.addr = 0x00419c94U, .prod = 0x00080040U, .disable = 0x000ffffeU}, + {.addr = 0x00419ca4U, .prod = 0x00003ffeU, .disable = 0x00003ffeU}, + {.addr = 0x00419cacU, .prod = 0x0001fffeU, .disable = 0x0001fffeU}, + {.addr = 0x00419a44U, .prod = 0x00000008U, .disable = 0x0000000eU}, + {.addr = 0x00419a4cU, .prod = 0x000001f8U, .disable = 0x000001feU}, + {.addr = 0x00419a54U, .prod = 0x0000003cU, .disable = 0x0000003eU}, + {.addr = 0x00419a5cU, .prod = 0x0000000cU, .disable = 0x0000000eU}, + {.addr = 0x00419a64U, .prod = 0x000001baU, .disable = 0x000001feU}, + {.addr = 0x00419a7cU, .prod = 0x0000003cU, .disable = 0x0000003eU}, + {.addr = 0x00419a84U, .prod = 0x0000000cU, .disable = 0x0000000eU}, + {.addr = 0x0041be2cU, .prod = 0x04115fc0U, .disable = 0xfffffffeU}, + {.addr = 0x0041bfecU, .prod = 0xfffffff0U, .disable = 0xfffffffeU}, /* fix priv error */ - /*{.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe},*/ - {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, - {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000000ff}, + /*{.addr = 0x0041bed4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU},*/ + {.addr = 0x00408814U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a84U, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x004089acU, .prod = 0x00000000U, .disable = 0x0001fffeU}, + {.addr = 0x00408a24U, .prod = 0x00000000U, .disable = 0x000000ffU}, }; /* slcg ltc */ static const struct gating_desc gv11b_slcg_ltc[] = { - {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x0017e050U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0017e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU}, }; /* slcg perf */ static const struct gating_desc gv11b_slcg_perf[] = { - {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, - {.addr = 0x0024a124, .prod = 0x00000001, .disable = 0x00000000}, + {.addr = 0x00248018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00248018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00246018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x00244018U, .prod = 0xffffffffU, .disable = 0x00000000U}, + {.addr = 0x0024a124U, .prod = 0x00000001U, .disable = 0x00000000U}, }; /* slcg PriRing */ static const struct gating_desc gv11b_slcg_priring[] = { - {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, + {.addr = 0x001200a8U, .prod = 0x00000000U, .disable = 0x00000001U}, }; /* slcg pwr_csb */ static const struct gating_desc gv11b_slcg_pwr_csb[] = { - {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, - {.addr = 0x00000a74, .prod = 0x00004040, .disable = 0x00007ffe}, - {.addr = 0x000206b8, .prod = 0x00000008, .disable = 0x0000000f}, + {.addr = 0x00000134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x00000e74U, .prod = 0x00000000U, .disable = 0x0000000fU}, + {.addr = 0x00000a74U, .prod = 0x00004040U, .disable = 0x00007ffeU}, + {.addr = 0x000206b8U, .prod = 0x00000008U, .disable = 0x0000000fU}, }; /* slcg pmu */ static const struct gating_desc gv11b_slcg_pmu[] = { - {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0010aa74, .prod = 0x00004040, .disable = 0x00007ffe}, - {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x0010a134U, .prod = 0x00020008U, .disable = 0x0003fffeU}, + {.addr = 0x0010aa74U, .prod = 0x00004040U, .disable = 0x00007ffeU}, + {.addr = 0x0010ae74U, .prod = 0x00000000U, .disable = 0x0000000fU}, }; /* therm gr */ static const struct gating_desc gv11b_slcg_therm[] = { - {.addr = 0x000206b8, .prod = 0x00000008, .disable = 0x0000000f}, + {.addr = 0x000206b8U, .prod = 0x00000008U, .disable = 0x0000000fU}, }; /* slcg Xbar */ static const struct gating_desc gv11b_slcg_xbar[] = { - {.addr = 0x0013c824, .prod = 0x00000000, .disable = 0x7ffffffe}, - {.addr = 0x0013dc08, .prod = 0x00000000, .disable = 0xfffffffe}, - {.addr = 0x0013c924, .prod = 0x00000000, .disable = 0x7ffffffe}, - {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, - {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, + {.addr = 0x0013c824U, .prod = 0x00000000U, .disable = 0x7ffffffeU}, + {.addr = 0x0013dc08U, .prod = 0x00000000U, .disable = 0xfffffffeU}, + {.addr = 0x0013c924U, .prod = 0x00000000U, .disable = 0x7ffffffeU}, + {.addr = 0x0013cbe4U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, + {.addr = 0x0013cc04U, .prod = 0x00000000U, .disable = 0x1ffffffeU}, }; /* blcg bus */ static const struct gating_desc gv11b_blcg_bus[] = { - {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* blcg ce */ static const struct gating_desc gv11b_blcg_ce[] = { - {.addr = 0x00104200, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00104200U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg ctxsw prog */ @@ -188,97 +187,99 @@ static const struct gating_desc gv11b_blcg_ctxsw_prog[] = { /* blcg fb */ static const struct gating_desc gv11b_blcg_fb[] = { - {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000}, + {.addr = 0x00100d10U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d30U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00100d3cU, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00100d48U, .prod = 0x0000c242U, .disable = 0x00000000U}, + /* fix priv error */ + /*{.addr = 0x00100d1cU, .prod = 0x00000042U, .disable = 0x00000000U},*/ + {.addr = 0x00100c98U, .prod = 0x00004242U, .disable = 0x00000000U}, }; /* blcg fifo */ static const struct gating_desc gv11b_blcg_fifo[] = { - {.addr = 0x000026e0, .prod = 0x0000c244, .disable = 0x00000000}, + {.addr = 0x000026e0U, .prod = 0x0000c244U, .disable = 0x00000000U}, }; /* blcg gr */ static const struct gating_desc gv11b_blcg_gr[] = { - {.addr = 0x004041f0, .prod = 0x0000c646, .disable = 0x00000000}, - {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x004078c0, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00406000, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00407000, .prod = 0x4000c242, .disable = 0x00000000}, - {.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, - {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, - {.addr = 0x00418500, .prod = 0x0000c244, .disable = 0x00000000}, - {.addr = 0x00418608, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418688, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418828, .prod = 0x00008444, .disable = 0x00000000}, - {.addr = 0x00418bbc, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418970, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00418c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418cf0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418d70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418f0c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00418e0c, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00419868, .prod = 0x00008243, .disable = 0x00000000}, - {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419c80, .prod = 0x00004045, .disable = 0x00000000}, - {.addr = 0x00419c88, .prod = 0x00004043, .disable = 0x00000000}, - {.addr = 0x00419c90, .prod = 0x0000004a, .disable = 0x00000000}, - {.addr = 0x00419c98, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x00419ca0, .prod = 0x00000043, .disable = 0x00000000}, - {.addr = 0x00419ca8, .prod = 0x00000003, .disable = 0x00000000}, - {.addr = 0x00419cb0, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419a40, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00419a48, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00419a50, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00419a58, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00419a60, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a68, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a78, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x00419a80, .prod = 0x00000242, .disable = 0x00000000}, - {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, - {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00408810, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x00408a80, .prod = 0x0000c242, .disable = 0x00000000}, - {.addr = 0x004089a8, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x004041f0U, .prod = 0x0000c646U, .disable = 0x00000000U}, + {.addr = 0x00409890U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004098b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x004078c0U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00406000U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00405860U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x0040590cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00408040U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00407000U, .prod = 0x4000c242U, .disable = 0x00000000U}, + {.addr = 0x00405bf0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x0041a890U, .prod = 0x0000427fU, .disable = 0x00000000U}, + {.addr = 0x0041a8b0U, .prod = 0x0000007fU, .disable = 0x00000000U}, + {.addr = 0x00418500U, .prod = 0x0000c244U, .disable = 0x00000000U}, + {.addr = 0x00418608U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418688U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418718U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418828U, .prod = 0x00008444U, .disable = 0x00000000U}, + {.addr = 0x00418bbcU, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418970U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00418c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418cf0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418d70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418f0cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00418e0cU, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00419020U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00419038U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00418898U, .prod = 0x00004242U, .disable = 0x00000000U}, + {.addr = 0x00419868U, .prod = 0x00008243U, .disable = 0x00000000U}, + {.addr = 0x00419c70U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00419c80U, .prod = 0x00004045U, .disable = 0x00000000U}, + {.addr = 0x00419c88U, .prod = 0x00004043U, .disable = 0x00000000U}, + {.addr = 0x00419c90U, .prod = 0x0000004aU, .disable = 0x00000000U}, + {.addr = 0x00419c98U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x00419ca0U, .prod = 0x00000043U, .disable = 0x00000000U}, + {.addr = 0x00419ca8U, .prod = 0x00000003U, .disable = 0x00000000U}, + {.addr = 0x00419cb0U, .prod = 0x00000002U, .disable = 0x00000000U}, + {.addr = 0x00419a40U, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00419a48U, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00419a50U, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00419a58U, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00419a60U, .prod = 0x00000202U, .disable = 0x00000000U}, + {.addr = 0x00419a68U, .prod = 0x00000202U, .disable = 0x00000000U}, + {.addr = 0x00419a78U, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x00419a80U, .prod = 0x00000242U, .disable = 0x00000000U}, + {.addr = 0x0041be28U, .prod = 0x00008242U, .disable = 0x00000000U}, + {.addr = 0x0041bfe8U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x0041bed0U, .prod = 0x0000c444U, .disable = 0x00000000U}, + {.addr = 0x00408810U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x00408a80U, .prod = 0x0000c242U, .disable = 0x00000000U}, + {.addr = 0x004089a8U, .prod = 0x0000c242U, .disable = 0x00000000U}, }; /* blcg ltc */ static const struct gating_desc gv11b_blcg_ltc[] = { - {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, - {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x0017e030U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e040U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3e0U, .prod = 0x00000044U, .disable = 0x00000000U}, + {.addr = 0x0017e3c8U, .prod = 0x00000044U, .disable = 0x00000000U}, }; /* blcg pwr_csb */ static const struct gating_desc gv11b_blcg_pwr_csb[] = { - {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x00000a70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg pmu */ static const struct gating_desc gv11b_blcg_pmu[] = { - {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, + {.addr = 0x0010aa70U, .prod = 0x00000045U, .disable = 0x00000000U}, }; /* blcg Xbar */ static const struct gating_desc gv11b_blcg_xbar[] = { - {.addr = 0x0013c820, .prod = 0x0001004a, .disable = 0x00000000}, - {.addr = 0x0013dc04, .prod = 0x0001004a, .disable = 0x00000000}, - {.addr = 0x0013c920, .prod = 0x0000004a, .disable = 0x00000000}, - {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, - {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x0013c820U, .prod = 0x0001004aU, .disable = 0x00000000U}, + {.addr = 0x0013dc04U, .prod = 0x0001004aU, .disable = 0x00000000U}, + {.addr = 0x0013c920U, .prod = 0x0000004aU, .disable = 0x00000000U}, + {.addr = 0x0013cbe0U, .prod = 0x00000042U, .disable = 0x00000000U}, + {.addr = 0x0013cc00U, .prod = 0x00000042U, .disable = 0x00000000U}, }; /* pg gr */ @@ -290,18 +291,15 @@ void gv11b_slcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_bus[i].addr, - gv11b_slcg_bus[i].prod); - else - gk20a_writel(g, gv11b_slcg_bus[i].addr, - gv11b_slcg_bus[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_bus[i].addr; + u32 val = prod ? gv11b_slcg_bus[i].prod : + gv11b_slcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -309,18 +307,15 @@ void gv11b_slcg_ce2_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_ce2) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_ce2[i].addr, - gv11b_slcg_ce2[i].prod); - else - gk20a_writel(g, gv11b_slcg_ce2[i].addr, - gv11b_slcg_ce2[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_ce2) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_ce2[i].addr; + u32 val = prod ? gv11b_slcg_ce2[i].prod : + gv11b_slcg_ce2[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -328,42 +323,38 @@ void gv11b_slcg_chiplet_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_chiplet) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_chiplet[i].addr, - gv11b_slcg_chiplet[i].prod); - else - gk20a_writel(g, gv11b_slcg_chiplet[i].addr, - gv11b_slcg_chiplet[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_chiplet) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_chiplet[i].addr; + u32 val = prod ? gv11b_slcg_chiplet[i].prod : + gv11b_slcg_chiplet[i].disable; + gk20a_writel(g, reg, val); + } } } void gv11b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + } } void gv11b_slcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_fb[i].addr, - gv11b_slcg_fb[i].prod); - else - gk20a_writel(g, gv11b_slcg_fb[i].addr, - gv11b_slcg_fb[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_fb[i].addr; + u32 val = prod ? gv11b_slcg_fb[i].prod : + gv11b_slcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -371,18 +362,15 @@ void gv11b_slcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_fifo[i].addr, - gv11b_slcg_fifo[i].prod); - else - gk20a_writel(g, gv11b_slcg_fifo[i].addr, - gv11b_slcg_fifo[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_fifo) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_fifo[i].addr; + u32 val = prod ? gv11b_slcg_fifo[i].prod : + gv11b_slcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -390,18 +378,15 @@ void gr_gv11b_slcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_gr[i].addr, - gv11b_slcg_gr[i].prod); - else - gk20a_writel(g, gv11b_slcg_gr[i].addr, - gv11b_slcg_gr[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_gr[i].addr; + u32 val = prod ? gv11b_slcg_gr[i].prod : + gv11b_slcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -409,18 +394,15 @@ void ltc_gv11b_slcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; + u32 size = (u32)(sizeof(gv11b_slcg_ltc) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_ltc[i].addr, - gv11b_slcg_ltc[i].prod); - else - gk20a_writel(g, gv11b_slcg_ltc[i].addr, - gv11b_slcg_ltc[i].disable); + u32 reg = gv11b_slcg_ltc[i].addr; + u32 val = prod ? gv11b_slcg_ltc[i].prod : + gv11b_slcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -428,18 +410,15 @@ void gv11b_slcg_perf_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_perf) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_perf[i].addr, - gv11b_slcg_perf[i].prod); - else - gk20a_writel(g, gv11b_slcg_perf[i].addr, - gv11b_slcg_perf[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_perf) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_perf[i].addr; + u32 val = prod ? gv11b_slcg_perf[i].prod : + gv11b_slcg_perf[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -447,18 +426,15 @@ void gv11b_slcg_priring_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_priring) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_priring[i].addr, - gv11b_slcg_priring[i].prod); - else - gk20a_writel(g, gv11b_slcg_priring[i].addr, - gv11b_slcg_priring[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_priring) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_priring[i].addr; + u32 val = prod ? gv11b_slcg_priring[i].prod : + gv11b_slcg_priring[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -466,18 +442,15 @@ void gv11b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_pwr_csb[i].addr, - gv11b_slcg_pwr_csb[i].prod); - else - gk20a_writel(g, gv11b_slcg_pwr_csb[i].addr, - gv11b_slcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_pwr_csb[i].addr; + u32 val = prod ? gv11b_slcg_pwr_csb[i].prod : + gv11b_slcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -485,18 +458,15 @@ void gv11b_slcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_pmu[i].addr, - gv11b_slcg_pmu[i].prod); - else - gk20a_writel(g, gv11b_slcg_pmu[i].addr, - gv11b_slcg_pmu[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_pmu[i].addr; + u32 val = prod ? gv11b_slcg_pmu[i].prod : + gv11b_slcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -504,18 +474,15 @@ void gv11b_slcg_therm_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_therm) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_therm[i].addr, - gv11b_slcg_therm[i].prod); - else - gk20a_writel(g, gv11b_slcg_therm[i].addr, - gv11b_slcg_therm[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_therm) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_therm[i].addr; + u32 val = prod ? gv11b_slcg_therm[i].prod : + gv11b_slcg_therm[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -523,18 +490,15 @@ void gv11b_slcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_slcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_slcg_xbar[i].addr, - gv11b_slcg_xbar[i].prod); - else - gk20a_writel(g, gv11b_slcg_xbar[i].addr, - gv11b_slcg_xbar[i].disable); + u32 size = (u32)(sizeof(gv11b_slcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_xbar[i].addr; + u32 val = prod ? gv11b_slcg_xbar[i].prod : + gv11b_slcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -542,18 +506,15 @@ void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_bus) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_bus[i].addr, - gv11b_blcg_bus[i].prod); - else - gk20a_writel(g, gv11b_blcg_bus[i].addr, - gv11b_blcg_bus[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_bus) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_bus[i].addr; + u32 val = prod ? gv11b_blcg_bus[i].prod : + gv11b_blcg_bus[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -561,18 +522,15 @@ void gv11b_blcg_ce_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_ce) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_ce[i].addr, - gv11b_blcg_ce[i].prod); - else - gk20a_writel(g, gv11b_blcg_ce[i].addr, - gv11b_blcg_ce[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_ce) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_ce[i].addr; + u32 val = prod ? gv11b_blcg_ce[i].prod : + gv11b_blcg_ce[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -580,18 +538,15 @@ void gv11b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_ctxsw_prog) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_ctxsw_prog[i].addr, - gv11b_blcg_ctxsw_prog[i].prod); - else - gk20a_writel(g, gv11b_blcg_ctxsw_prog[i].addr, - gv11b_blcg_ctxsw_prog[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_ctxsw_prog) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_ctxsw_prog[i].addr; + u32 val = prod ? gv11b_blcg_ctxsw_prog[i].prod : + gv11b_blcg_ctxsw_prog[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -599,18 +554,15 @@ void gv11b_blcg_fb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_fb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_fb[i].addr, - gv11b_blcg_fb[i].prod); - else - gk20a_writel(g, gv11b_blcg_fb[i].addr, - gv11b_blcg_fb[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_fb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_fb[i].addr; + u32 val = prod ? gv11b_blcg_fb[i].prod : + gv11b_blcg_fb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -618,18 +570,15 @@ void gv11b_blcg_fifo_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_fifo) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; + u32 size = (u32)(sizeof(gv11b_blcg_fifo) / GATING_DESC_SIZE); + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_fifo[i].addr, - gv11b_blcg_fifo[i].prod); - else - gk20a_writel(g, gv11b_blcg_fifo[i].addr, - gv11b_blcg_fifo[i].disable); + u32 reg = gv11b_blcg_fifo[i].addr; + u32 val = prod ? gv11b_blcg_fifo[i].prod : + gv11b_blcg_fifo[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -637,18 +586,15 @@ void gv11b_blcg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_gr[i].addr, - gv11b_blcg_gr[i].prod); - else - gk20a_writel(g, gv11b_blcg_gr[i].addr, - gv11b_blcg_gr[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_gr[i].addr; + u32 val = prod ? gv11b_blcg_gr[i].prod : + gv11b_blcg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -656,18 +602,15 @@ void gv11b_blcg_ltc_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_ltc) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_ltc[i].addr, - gv11b_blcg_ltc[i].prod); - else - gk20a_writel(g, gv11b_blcg_ltc[i].addr, - gv11b_blcg_ltc[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_ltc) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_ltc[i].addr; + u32 val = prod ? gv11b_blcg_ltc[i].prod : + gv11b_blcg_ltc[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -675,18 +618,15 @@ void gv11b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_pwr_csb) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_pwr_csb[i].addr, - gv11b_blcg_pwr_csb[i].prod); - else - gk20a_writel(g, gv11b_blcg_pwr_csb[i].addr, - gv11b_blcg_pwr_csb[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_pwr_csb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_pwr_csb[i].addr; + u32 val = prod ? gv11b_blcg_pwr_csb[i].prod : + gv11b_blcg_pwr_csb[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -694,18 +634,15 @@ void gv11b_blcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_pmu) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_pmu[i].addr, - gv11b_blcg_pmu[i].prod); - else - gk20a_writel(g, gv11b_blcg_pmu[i].addr, - gv11b_blcg_pmu[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_pmu) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_pmu[i].addr; + u32 val = prod ? gv11b_blcg_pmu[i].prod : + gv11b_blcg_pmu[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -713,18 +650,15 @@ void gv11b_blcg_xbar_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_blcg_xbar) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_blcg_xbar[i].addr, - gv11b_blcg_xbar[i].prod); - else - gk20a_writel(g, gv11b_blcg_xbar[i].addr, - gv11b_blcg_xbar[i].disable); + u32 size = (u32)(sizeof(gv11b_blcg_xbar) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_blcg_xbar[i].addr; + u32 val = prod ? gv11b_blcg_xbar[i].prod : + gv11b_blcg_xbar[i].disable; + gk20a_writel(g, reg, val); + } } } @@ -732,19 +666,14 @@ void gr_gv11b_pg_gr_load_gating_prod(struct gk20a *g, bool prod) { u32 i; - u32 size = sizeof(gv11b_pg_gr) / sizeof(struct gating_desc); - - if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) - return; - - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gv11b_pg_gr[i].addr, - gv11b_pg_gr[i].prod); - else - gk20a_writel(g, gv11b_pg_gr[i].addr, - gv11b_pg_gr[i].disable); + u32 size = (u32)(sizeof(gv11b_pg_gr) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_pg_gr[i].addr; + u32 val = prod ? gv11b_pg_gr[i].prod : + gv11b_pg_gr[i].disable; + gk20a_writel(g, reg, val); + } } } - -#endif /* __gv11b_gating_reglist_h__ */ diff --git a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h index 233189e0..87a1e5c6 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA Corporation. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,7 +20,10 @@ * DEALINGS IN THE SOFTWARE. */ -#include "gk20a/gk20a.h" +#ifndef GV11B_GATING_REGLIST_H +#define GV11B_GATING_REGLIST_H + +struct gk20a; void gv11b_slcg_bus_load_gating_prod(struct gk20a *g, bool prod); @@ -96,4 +99,4 @@ void gv11b_blcg_xbar_load_gating_prod(struct gk20a *g, void gr_gv11b_pg_gr_load_gating_prod(struct gk20a *g, bool prod); - +#endif /* GV11B_GATING_REGLIST_H */ -- cgit v1.2.2