From 27694ca572c4d7698b107c6713f0f0604b41c186 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 25 May 2018 10:27:10 -0700 Subject: gpu: nvgpu: Implement bus HAL for bar2 bind Implement BAR2 bind as a bus HAL and remove the corresponding MM HAL. BAR2 bind HW API is in bus. JIRA NVGPU-588 Change-Id: I3a8391b00f1ba65f9ed28b633f1d52bf7c984230 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730896 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/bus/bus_gp10b.c | 64 ++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 drivers/gpu/nvgpu/common/bus/bus_gp10b.c (limited to 'drivers/gpu/nvgpu/common/bus/bus_gp10b.c') diff --git a/drivers/gpu/nvgpu/common/bus/bus_gp10b.c b/drivers/gpu/nvgpu/common/bus/bus_gp10b.c new file mode 100644 index 00000000..01e81069 --- /dev/null +++ b/drivers/gpu/nvgpu/common/bus/bus_gp10b.c @@ -0,0 +1,64 @@ +/* + * GM20B MMU + * + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include "bus_gp10b.h" +#include "gk20a/gk20a.h" + +#include + +int gp10b_bus_bar2_bind(struct gk20a *g, struct nvgpu_mem *bar2_inst) +{ + struct nvgpu_timeout timeout; + int err = 0; + u64 iova = nvgpu_inst_block_addr(g, bar2_inst); + u32 ptr_v = (u32)(iova >> bus_bar2_block_ptr_shift_v()); + + nvgpu_log_info(g, "bar2 inst block ptr: 0x%08x", ptr_v); + + gk20a_writel(g, bus_bar2_block_r(), + nvgpu_aperture_mask(g, bar2_inst, + bus_bar2_block_target_sys_mem_ncoh_f(), + bus_bar2_block_target_sys_mem_coh_f(), + bus_bar2_block_target_vid_mem_f()) | + bus_bar2_block_mode_virtual_f() | + bus_bar2_block_ptr_f(ptr_v)); + nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER); + do { + u32 val = gk20a_readl(g, bus_bind_status_r()); + u32 pending = bus_bind_status_bar2_pending_v(val); + u32 outstanding = bus_bind_status_bar2_outstanding_v(val); + if (!pending && !outstanding) + break; + + nvgpu_udelay(5); + } while (!nvgpu_timeout_expired(&timeout)); + + if (nvgpu_timeout_peek_expired(&timeout)) + err = -EINVAL; + + return err; +} -- cgit v1.2.2