From 41838fc2bb6135bdd87d080a1efda8403f6f2657 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Fri, 26 Aug 2016 20:20:02 -0700 Subject: gpu: nvgpu: gp106: MCLK P8/P5 sequences and API Adds P5/P8 sequences and simple debugfs API to change from P0->P5 JIRA DNVGPU-117 Change-Id: I5811a5bddd0e11074524cce421bff1e3d441228d Signed-off-by: David Nieto Reviewed-on: http://git-master/r/1208655 (cherry picked from commit dd410a86263e2407e043743945cf09a77910d745) Reviewed-on: http://git-master/r/1231035 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/clk/clk_mclk.h | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/clk/clk_mclk.h') diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.h b/drivers/gpu/nvgpu/clk/clk_mclk.h index f86893f7..c3261eac 100644 --- a/drivers/gpu/nvgpu/clk/clk_mclk.h +++ b/drivers/gpu/nvgpu/clk/clk_mclk.h @@ -14,6 +14,34 @@ #ifndef _CLKMCLK_H_ #define _CLKMCLK_H_ -int clk_mclkseq_build_prgm_gddr5(struct gk20a *g); +#include + +enum gk20a_mclk_speed { + gk20a_mclk_low_speed, + gk20a_mclk_mid_speed, + gk20a_mclk_high_speed +}; + +struct clk_mclk_state { + enum gk20a_mclk_speed speed; + struct mutex mclk_mutex; + void *vreg_buf; + + /* function pointers */ + int (*change)(struct gk20a *g, enum gk20a_mclk_speed speed); + +#ifdef CONFIG_DEBUG_FS + s64 switch_max; + s64 switch_min; + u64 switch_num; + s64 switch_avg; + s64 switch_std; + bool debugfs_set; +#endif +}; + +int clk_mclkseq_init_mclk_gddr5(struct gk20a *g); +int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, + enum gk20a_mclk_speed speed); #endif -- cgit v1.2.2