From 432017248e432df0619dc2df30f915a52634338f Mon Sep 17 00:00:00 2001 From: Vijayakumar Subbu Date: Sat, 30 Jul 2016 10:44:30 -0700 Subject: gpu: nvgpu: Add dGPU clocks support JIRA DNVGPU-42 Change-Id: Ic2fca9d0cf82f2823654ac5e8f0772a1eec7b3b5 Signed-off-by: Vijayakumar Subbu Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1205850 (cherry picked from commit b9f5c6bc4e649162d63e33d65b725872340ca114) Reviewed-on: http://git-master/r/1227257 GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/clk/clk_domain.h | 94 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 drivers/gpu/nvgpu/clk/clk_domain.h (limited to 'drivers/gpu/nvgpu/clk/clk_domain.h') diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h new file mode 100644 index 00000000..94d612a7 --- /dev/null +++ b/drivers/gpu/nvgpu/clk/clk_domain.h @@ -0,0 +1,94 @@ +/* +* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +*/ + +#ifndef _CLKDOMAIN_H_ +#define _CLKDOMAIN_H_ + +#include "ctrl/ctrlclk.h" +#include "ctrl/ctrlboardobj.h" +#include "pmuif/gpmuifclk.h" +#include "boardobj/boardobjgrp_e32.h" +#include "boardobj/boardobjgrpmask.h" + +struct clk_domains; +struct clk_domain; + +/*data and function definition to talk to driver*/ +u32 clk_domain_sw_setup(struct gk20a *g); +u32 clk_domain_pmu_setup(struct gk20a *g); +typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, + struct clk_domain *pdomain); +struct clk_domains { + struct boardobjgrp_e32 super; + u8 n_num_entries; + u8 version; + bool b_enforce_vf_monotonicity; + u32 vbios_domains; + struct boardobjgrpmask_e32 prog_domains_mask; + struct boardobjgrpmask_e32 master_domains_mask; + u16 cntr_sampling_periodms; + struct ctrl_clk_clk_delta deltas; + + struct clk_domain *ordered_noise_aware_list[CTRL_BOARDOBJ_MAX_BOARD_OBJECTS]; + + struct clk_domain *ordered_noise_unaware_list[CTRL_BOARDOBJ_MAX_BOARD_OBJECTS]; +}; + +struct clk_domain { + struct boardobj super; + u32 api_domain; + u32 part_mask; + u8 domain; + u8 perf_domain_index; + u8 perf_domain_grp_idx; + u8 ratio_domain; + u8 usage; + clkproglink *clkdomainclkproglink; +}; + +struct clk_domain_3x { + struct clk_domain super; + bool b_noise_aware_capable; +}; + +struct clk_domain_3x_fixed { + struct clk_domain_3x super; + u16 freq_mhz; +}; + +struct clk_domain_3x_prog { + struct clk_domain_3x super; + u8 clk_prog_idx_first; + u8 clk_prog_idx_last; + u8 noise_unaware_ordering_index; + u8 noise_aware_ordering_index; + bool b_force_noise_unaware_ordering; + int factory_offset_khz; + short freq_delta_min_mhz; + short freq_delta_max_mhz; + struct ctrl_clk_clk_delta deltas; +}; + +struct clk_domain_3x_master { + struct clk_domain_3x_prog super; + u32 slave_idxs_mask; +}; + +struct clk_domain_3x_slave { + struct clk_domain_3x_prog super; + u8 master_idx; +}; + +u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); + +#endif -- cgit v1.2.2 From 2d3ba5478d0d9a12b123a0261653d33eb37e6e87 Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Thu, 1 Sep 2016 15:17:34 +0530 Subject: gpu: nvgpu: Clocks params update - Clocks params update as per r370 JIRA DNVGPU-116 Change-Id: I0aaa1e275aaa2027f2839f3fe24c9aee3e14fd8d Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1212827 (cherry picked from commit 54df6ad9668d46dffb5b9d03265948a47611ff13) Reviewed-on: http://git-master/r/1227288 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/clk/clk_domain.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/clk/clk_domain.h') diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index 94d612a7..2670a066 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h @@ -33,6 +33,7 @@ struct clk_domains { u8 n_num_entries; u8 version; bool b_enforce_vf_monotonicity; + bool b_enforce_vf_smoothening; u32 vbios_domains; struct boardobjgrpmask_e32 prog_domains_mask; struct boardobjgrpmask_e32 master_domains_mask; -- cgit v1.2.2 From 1b1090512020369df18dbe36336ac5a85d2cd693 Mon Sep 17 00:00:00 2001 From: Vijayakumar Date: Wed, 31 Aug 2016 17:40:24 +0530 Subject: gpu: nvgpu: support to parse VF table JIRA DNVGPU-123 function was added to retrieve V for F or F for V for a given clock domain. Clock domain can be master or slave. F or V can be intermediate point between two successive V or F values in VF table. VF table should be cached before calling this function. A F value below Fmin will return Vmin. F > Fmax will return error A V value above Vmax wil return F max. A V value below Vmin will return error. Change-Id: I28b4e8647510c6933e9e1204cfff31d74616e11a Signed-off-by: Vijayakumar Reviewed-on: http://git-master/r/1211234 (cherry-picked from commit 5b83b03f2454fbec8d49a064ed09b09c92d3e9fa) Reviewed-on: http://git-master/r/1235054 Reviewed-by: Thomas Fleury Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/clk/clk_domain.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers/gpu/nvgpu/clk/clk_domain.h') diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index 2670a066..07976a2a 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h @@ -26,8 +26,13 @@ struct clk_domain; /*data and function definition to talk to driver*/ u32 clk_domain_sw_setup(struct gk20a *g); u32 clk_domain_pmu_setup(struct gk20a *g); + typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain); + +typedef u32 clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, + struct clk_domain *pdomain, u16 *clkmhz, + u32 *voltuv, u8 rail); struct clk_domains { struct boardobjgrp_e32 super; u8 n_num_entries; @@ -55,6 +60,7 @@ struct clk_domain { u8 ratio_domain; u8 usage; clkproglink *clkdomainclkproglink; + clkvfsearch *clkdomainclkvfsearch; }; struct clk_domain_3x { @@ -92,4 +98,8 @@ struct clk_domain_3x_slave { u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); +#define CLK_CLK_DOMAIN_GET(pclk, idx) \ + ((struct clk_domain *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ + &pclk->clk_domainobjs.super.super, (u8)(idx))) + #endif -- cgit v1.2.2 From 3c351f5bb2d04c1f70c72f3f2fd758bbb340877c Mon Sep 17 00:00:00 2001 From: Vijayakumar Date: Mon, 12 Sep 2016 22:36:33 +0530 Subject: gpu: nvgpu: add function to retrieve clk points JIRA DNVGPU-123 Function will copy possible clock points for a given master clock domain to pointer passed. pointer with NULL value and count of zero can be passed to query number of clock points for a given domain so that memory can be allocated and function called again to fill clock points Change-Id: Iec6206f23789980036be99793599e934bd221035 Reviewed-on: http://git-master/r/1218912 (cherry picked from commit 9219697bff1e12deb605325055a02a7b387996e9) Signed-off-by: Vijayakumar Reviewed-on: http://git-master/r/1235055 Reviewed-by: Thomas Fleury GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/clk/clk_domain.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/gpu/nvgpu/clk/clk_domain.h') diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index 07976a2a..eeb7c256 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h @@ -33,6 +33,11 @@ typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, typedef u32 clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain, u16 *clkmhz, u32 *voltuv, u8 rail); + +typedef u32 clkgetfpoints(struct gk20a *g, struct clk_pmupstate *pclk, + struct clk_domain *pdomain, u32 *pfpointscount, + u16 *pfreqpointsinmhz, u8 rail); + struct clk_domains { struct boardobjgrp_e32 super; u8 n_num_entries; @@ -61,6 +66,7 @@ struct clk_domain { u8 usage; clkproglink *clkdomainclkproglink; clkvfsearch *clkdomainclkvfsearch; + clkgetfpoints *clkdomainclkgetfpoints; }; struct clk_domain_3x { -- cgit v1.2.2 From c7fbd76e7101b7dedc8c0f04437288d1d6b78adc Mon Sep 17 00:00:00 2001 From: Vijayakumar Date: Fri, 16 Sep 2016 18:56:22 +0530 Subject: gpu: nvgpu: create function to program coreclk JIRA DNVGPU-123 now a function can be called with GPC2CLK value It will take care calculating slave clock values and calling VF inject to program clock Made programming of boot clock code to use this newly created function. Change-Id: I74de7e9d98e379e94175ed2d9745ce3ab6c70691 Signed-off-by: Vijayakumar Reviewed-on: http://git-master/r/1221976 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-on: http://git-master/r/1235056 --- drivers/gpu/nvgpu/clk/clk_domain.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/clk/clk_domain.h') diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index eeb7c256..443e1c4c 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h @@ -30,10 +30,14 @@ u32 clk_domain_pmu_setup(struct gk20a *g); typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain); -typedef u32 clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, +typedef int clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain, u16 *clkmhz, u32 *voltuv, u8 rail); +typedef int clkgetslaveclk(struct gk20a *g, struct clk_pmupstate *pclk, + struct clk_domain *pdomain, u16 *clkmhz, + u16 masterclkmhz); + typedef u32 clkgetfpoints(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain, u32 *pfpointscount, u16 *pfreqpointsinmhz, u8 rail); @@ -100,6 +104,7 @@ struct clk_domain_3x_master { struct clk_domain_3x_slave { struct clk_domain_3x_prog super; u8 master_idx; + clkgetslaveclk *clkdomainclkgetslaveclk; }; u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); -- cgit v1.2.2