From f7290e6a83282ed96b4af225d7d7b63230138d7c Mon Sep 17 00:00:00 2001 From: Vijayakumar Date: Mon, 7 Nov 2016 18:12:19 +0530 Subject: gpu: nvgpu: fix fll regime check For target clocks >= FFR cutoff clock use FR, else use FFR. JIRA DNVGPU-180 Change-Id: Iefed871d2acf1552230b066c32e1b3f69d96079e Signed-off-by: Vijayakumar Reviewed-on: http://git-master/r/1249041 (cherry picked from commit edcb12d8784c62aa857dcab2e27d4e45033fbf11) Reviewed-on: http://git-master/r/1270883 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/clk/clk.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/clk/clk.c') diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c index dffbefec..ecd53c02 100644 --- a/drivers/gpu/nvgpu/clk/clk.c +++ b/drivers/gpu/nvgpu/clk/clk.c @@ -288,9 +288,9 @@ static u32 find_regime_id(struct gk20a *g, u32 domain, u16 clkmhz) if (pflldev->clk_domain == domain) { if (pflldev->regime_desc.fixed_freq_regime_limit_mhz >= clkmhz) - return CTRL_CLK_FLL_REGIME_ID_FR; - else return CTRL_CLK_FLL_REGIME_ID_FFR; + else + return CTRL_CLK_FLL_REGIME_ID_FR; } } return CTRL_CLK_FLL_REGIME_ID_INVALID; -- cgit v1.2.2