From fc1ebe57f506c658eb771c101f256b02e3f351ce Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 20 Apr 2018 07:10:16 -0700 Subject: gpu: nvgpu: add HALs to submit and wait for runlist Add below two new HALs gops.fifo.runlist_hw_submit() to submit a new runlist to hardware gops.fifo.runlist_wait_pending() to wait until runlist write is successful Set existing API gk20a_fifo_runlist_wait_pending() to gops.fifo.runlist_wait_pending HAL Add new API gk20a_fifo_runlist_hw_submit() which submits the runlist to h/w and set it to gops.fifo.runlist_hw_submit HAL Jira NVGPUT-20 Change-Id: Ic23f7d947e30883aca0b536de818e79e14733195 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1700548 Reviewed-by: svc-mobile-coverity Reviewed-by: Konsta Holtta GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 40 +++++++++++++++++---------- drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 2 ++ drivers/gpu/nvgpu/gk20a/gk20a.h | 3 ++ drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 2 ++ drivers/gpu/nvgpu/gp106/hal_gp106.c | 2 ++ drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 2 ++ drivers/gpu/nvgpu/gv100/hal_gv100.c | 2 ++ drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 2 ++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | 2 ++ drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | 2 ++ 10 files changed, 45 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index c446e3ea..709631d4 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -3217,6 +3217,29 @@ int gk20a_fifo_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice) return g->ops.fifo.update_runlist(g, tsg->runlist_id, ~0, true, true); } +void gk20a_fifo_runlist_hw_submit(struct gk20a *g, u32 runlist_id, + u32 count, u32 buffer_index) +{ + struct fifo_runlist_info_gk20a *runlist = NULL; + u64 runlist_iova; + + runlist = &g->fifo.runlist_info[runlist_id]; + runlist_iova = nvgpu_mem_get_addr(g, &runlist->mem[buffer_index]); + + if (count != 0) { + gk20a_writel(g, fifo_runlist_base_r(), + fifo_runlist_base_ptr_f(u64_lo32(runlist_iova >> 12)) | + nvgpu_aperture_mask(g, &runlist->mem[buffer_index], + fifo_runlist_base_target_sys_mem_ncoh_f(), + fifo_runlist_base_target_sys_mem_coh_f(), + fifo_runlist_base_target_vid_mem_f())); + } + + gk20a_writel(g, fifo_runlist_r(), + fifo_runlist_engine_f(runlist_id) | + fifo_eng_runlist_length_f(count)); +} + static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, u32 chid, bool add, bool wait_for_finish) @@ -3297,21 +3320,10 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, } else /* suspend to remove all channels */ count = 0; - if (count != 0) { - gk20a_writel(g, fifo_runlist_base_r(), - fifo_runlist_base_ptr_f(u64_lo32(runlist_iova >> 12)) | - nvgpu_aperture_mask(g, &runlist->mem[new_buf], - fifo_runlist_base_target_sys_mem_ncoh_f(), - fifo_runlist_base_target_sys_mem_coh_f(), - fifo_runlist_base_target_vid_mem_f())); - } - - gk20a_writel(g, fifo_runlist_r(), - fifo_runlist_engine_f(runlist_id) | - fifo_eng_runlist_length_f(count)); + g->ops.fifo.runlist_hw_submit(g, runlist_id, count, new_buf); if (wait_for_finish) { - ret = gk20a_fifo_runlist_wait_pending(g, runlist_id); + ret = g->ops.fifo.runlist_wait_pending(g, runlist_id); if (ret == -ETIMEDOUT) { nvgpu_err(g, @@ -3321,7 +3333,7 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, /* engine reset needs the lock. drop it */ /* wait until the runlist is active again */ - ret = gk20a_fifo_runlist_wait_pending(g, runlist_id); + ret = g->ops.fifo.runlist_wait_pending(g, runlist_id); /* get the lock back. at this point everything should * should be fine */ diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 12ef5f69..ea9f4528 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -385,6 +385,8 @@ u32 *gk20a_runlist_construct_locked(struct fifo_gk20a *f, bool interleave_enabled, bool prev_empty, u32 *entries_left); +void gk20a_fifo_runlist_hw_submit(struct gk20a *g, u32 runlist_id, + u32 count, u32 buffer_index); int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id); int gk20a_init_fifo_setup_sw_common(struct gk20a *g); int gk20a_init_fifo_setup_sw(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 57854e11..ba27f5d9 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -669,6 +669,9 @@ struct gpu_ops { u64 *base_gpuva, u32 *sync_size); u32 (*get_syncpt_incr_per_release)(void); #endif + void (*runlist_hw_submit)(struct gk20a *g, u32 runlist_id, + u32 count, u32 buffer_index); + int (*runlist_wait_pending)(struct gk20a *g, u32 runlist_id); } fifo; struct pmu_v { u32 (*get_pmu_cmdline_args_size)(struct nvgpu_pmu *pmu); diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 0a58445f..9fc3a494 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -461,6 +461,8 @@ static const struct gpu_ops gm20b_ops = { .get_syncpt_incr_cmd_size = gk20a_fifo_get_syncpt_incr_cmd_size, .get_sync_ro_map = NULL, #endif + .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, + .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, }, .gr_ctx = { .get_netlist_name = gr_gm20b_get_netlist_name, diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index b7b20dce..d1b60af5 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -524,6 +524,8 @@ static const struct gpu_ops gp106_ops = { #endif .resetup_ramfc = gp10b_fifo_resetup_ramfc, .device_info_fault_id = top_device_info_data_fault_id_enum_v, + .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, + .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, }, .gr_ctx = { .get_netlist_name = gr_gp106_get_netlist_name, diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 9a441727..a8ee7412 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -497,6 +497,8 @@ static const struct gpu_ops gp10b_ops = { #endif .resetup_ramfc = gp10b_fifo_resetup_ramfc, .device_info_fault_id = top_device_info_data_fault_id_enum_v, + .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, + .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, }, .gr_ctx = { .get_netlist_name = gr_gp10b_get_netlist_name, diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 7609f6b0..d1befa0e 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -585,6 +585,8 @@ static const struct gpu_ops gv100_ops = { .device_info_fault_id = top_device_info_data_fault_id_enum_v, .free_channel_ctx_header = gv11b_free_subctx_header, .preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg, + .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, + .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, }, .gr_ctx = { .get_netlist_name = gr_gv100_get_netlist_name, diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 8a0d1822..ca530aba 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -558,6 +558,8 @@ static const struct gpu_ops gv11b_ops = { .free_channel_ctx_header = gv11b_free_subctx_header, .preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg, .handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout, + .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, + .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, }, .gr_ctx = { .get_netlist_name = gr_gv11b_get_netlist_name, diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index 9d575061..73543baf 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c @@ -372,6 +372,8 @@ static const struct gpu_ops vgpu_gp10b_ops = { #endif .resetup_ramfc = NULL, .device_info_fault_id = top_device_info_data_fault_id_enum_v, + .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, + .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, }, .gr_ctx = { .get_netlist_name = gr_gp10b_get_netlist_name, diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index d07d0229..4dc3a150 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c @@ -419,6 +419,8 @@ static const struct gpu_ops vgpu_gv11b_ops = { .free_channel_ctx_header = vgpu_gv11b_free_subctx_header, .preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg, .handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout, + .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, + .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, }, .gr_ctx = { .get_netlist_name = gr_gv11b_get_netlist_name, -- cgit v1.2.2