From f3dcf5f534696dc6dbd63486469fbae7bdcae23f Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Wed, 6 Dec 2017 05:24:27 -0800 Subject: gpu: nvgpu: fix int declaration variable g->gr.ctx_vars.regs_base_index is declared as "int", but it is assigned value from unsigned int pointer Since we expect it to be unsigned at all the places, declare it as "u32" instead of "int" Jira NVGPU-449 Change-Id: I2a5b35698c655fa0caa3e38e37ed4d84569c996a Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1612446 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c index 3d7861d4..7120059c 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c @@ -241,7 +241,7 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) break; case NETLIST_REGIONID_CTXSW_REG_BASE_INDEX: g->gr.ctx_vars.regs_base_index = *src; - gk20a_dbg_info("NETLIST_REGIONID_CTXSW_REG_BASE_INDEX : %d", + gk20a_dbg_info("NETLIST_REGIONID_CTXSW_REG_BASE_INDEX : %u", g->gr.ctx_vars.regs_base_index); break; case NETLIST_REGIONID_MAJORV: diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 14668dc6..c4d5dbdc 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -311,7 +311,7 @@ struct gr_gk20a { struct aiv_list_gk20a pm_ucgpc; struct aiv_list_gk20a etpc; } ctxsw_regs; - int regs_base_index; + u32 regs_base_index; bool valid; u32 preempt_image_size; -- cgit v1.2.2