From df94d474a8200fc61969e2fc35d1b2a8d7fa5b8c Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 21 Mar 2017 11:17:48 -0700 Subject: gpu: nvgpu: add init_pbdma_intr_desc fifo ops Init device_fatal, channel_fatal and restartable fifo intr pbdma s/w variables for pbdma_intr_0 interrupt masks for each GPU version separately pbdma_intr_0 field differences for each GPU version:- -gk20a : bit 28 does not exists in hw -gm20b : bit 8(lbreq), 20(xbarconnect) and 28 do not exist in hw -gp10b : bit 8(lbreq), 20(xbarconnect) do not exist in hw. bit 28, (syncpoint_illegal) added in hw but is not being handled. -gk20a/gm20b/gp10b bit 24 eng_reset and bit 25 semaphore always existed in hw but never handled JIRA GPUT19X-47 Change-Id: I209191f57c5ea5b15081b7dc2411801d3537017c Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1325402 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 21 ++++++++++------ drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 47 ++++++++++++++++++++++++++++++++++++ drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | 46 +++++++++++++++++++++++++++++++++++ 4 files changed, 107 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 58020d41..b4589eaa 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -838,10 +838,12 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g) return 0; } -static void gk20a_init_fifo_pbdma_intr_descs(struct fifo_gk20a *f) +static void gk20a_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) { - /* These are all errors which indicate something really wrong - * going on in the device. */ + /* + * These are all errors which indicate something really wrong + * going on in the device + */ f->intr.pbdma.device_fatal_0 = pbdma_intr_0_memreq_pending_f() | pbdma_intr_0_memack_timeout_pending_f() | @@ -858,9 +860,11 @@ static void gk20a_init_fifo_pbdma_intr_descs(struct fifo_gk20a *f) pbdma_intr_0_xbarconnect_pending_f() | pbdma_intr_0_pri_pending_f(); - /* These are data parsing, framing errors or others which can be + /* + * These are data parsing, framing errors or others which can be * recovered from with intervention... or just resetting the - * channel. */ + * channel + */ f->intr.pbdma.channel_fatal_0 = pbdma_intr_0_gpfifo_pending_f() | pbdma_intr_0_gpptr_pending_f() | @@ -874,8 +878,7 @@ static void gk20a_init_fifo_pbdma_intr_descs(struct fifo_gk20a *f) pbdma_intr_0_pbseg_pending_f() | pbdma_intr_0_signature_pending_f(); - /* Can be used for sw-methods, or represents - * a recoverable timeout. */ + /* Can be used for sw-methods, or represents a recoverable timeout. */ f->intr.pbdma.restartable_0 = pbdma_intr_0_device_pending_f(); } @@ -898,7 +901,8 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) nvgpu_mutex_init(&f->intr.isr.mutex); nvgpu_mutex_init(&f->gr_reset_mutex); - gk20a_init_fifo_pbdma_intr_descs(f); /* just filling in data/tables */ + + g->ops.fifo.init_pbdma_intr_descs(f); /* just filling in data/tables */ f->num_channels = g->ops.fifo.get_num_fifos(g); f->runlist_entry_size = g->ops.fifo.runlist_entry_size(); @@ -3824,4 +3828,5 @@ void gk20a_init_fifo(struct gpu_ops *gops) gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; + gops->fifo.init_pbdma_intr_descs = gk20a_fifo_init_pbdma_intr_descs; } diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 8d03cc9a..817315e7 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -454,6 +454,7 @@ struct gpu_ops { unsigned int id_type, unsigned int timeout_rc_type); int (*preempt_ch_tsg)(struct gk20a *g, u32 id, unsigned int id_type, unsigned int timeout_rc_type); + void (*init_pbdma_intr_descs)(struct fifo_gk20a *f); } fifo; struct pmu_v { /*used for change of enum zbc update cmd id from ver 0 to ver1*/ diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 0c270910..5a0bd39e 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -26,6 +26,7 @@ #include #include #include +#include static void channel_gm20b_bind(struct channel_gk20a *c) { @@ -138,6 +139,51 @@ static void gm20b_device_info_data_parse(struct gk20a *g, gk20a_err(g->dev, "unknown device_info_data %d", top_device_info_data_type_v(table_entry)); } + +static void gm20b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) +{ + /* + * These are all errors which indicate something really wrong + * going on in the device. + */ + f->intr.pbdma.device_fatal_0 = + pbdma_intr_0_memreq_pending_f() | + pbdma_intr_0_memack_timeout_pending_f() | + pbdma_intr_0_memack_extra_pending_f() | + pbdma_intr_0_memdat_timeout_pending_f() | + pbdma_intr_0_memdat_extra_pending_f() | + pbdma_intr_0_memflush_pending_f() | + pbdma_intr_0_memop_pending_f() | + pbdma_intr_0_lbconnect_pending_f() | + pbdma_intr_0_lback_timeout_pending_f() | + pbdma_intr_0_lback_extra_pending_f() | + pbdma_intr_0_lbdat_timeout_pending_f() | + pbdma_intr_0_lbdat_extra_pending_f() | + pbdma_intr_0_pri_pending_f(); + + /* + * These are data parsing, framing errors or others which can be + * recovered from with intervention... or just resetting the + * channel + */ + f->intr.pbdma.channel_fatal_0 = + pbdma_intr_0_gpfifo_pending_f() | + pbdma_intr_0_gpptr_pending_f() | + pbdma_intr_0_gpentry_pending_f() | + pbdma_intr_0_gpcrc_pending_f() | + pbdma_intr_0_pbptr_pending_f() | + pbdma_intr_0_pbentry_pending_f() | + pbdma_intr_0_pbcrc_pending_f() | + pbdma_intr_0_method_pending_f() | + pbdma_intr_0_methodcrc_pending_f() | + pbdma_intr_0_pbseg_pending_f() | + pbdma_intr_0_signature_pending_f(); + + /* Can be used for sw-methods, or represents a recoverable timeout. */ + f->intr.pbdma.restartable_0 = + pbdma_intr_0_device_pending_f(); +} + void gm20b_init_fifo(struct gpu_ops *gops) { gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; @@ -176,4 +222,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; + gops->fifo.init_pbdma_intr_descs = gm20b_fifo_init_pbdma_intr_descs; } diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index d458d00b..77ea1b47 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c @@ -230,6 +230,51 @@ static void gp10b_device_info_data_parse(struct gk20a *g, u32 table_entry, top_device_info_data_type_v(table_entry)); } +static void gp10b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) +{ + /* + * These are all errors which indicate something really wrong + * going on in the device + */ + f->intr.pbdma.device_fatal_0 = + pbdma_intr_0_memreq_pending_f() | + pbdma_intr_0_memack_timeout_pending_f() | + pbdma_intr_0_memack_extra_pending_f() | + pbdma_intr_0_memdat_timeout_pending_f() | + pbdma_intr_0_memdat_extra_pending_f() | + pbdma_intr_0_memflush_pending_f() | + pbdma_intr_0_memop_pending_f() | + pbdma_intr_0_lbconnect_pending_f() | + pbdma_intr_0_lback_timeout_pending_f() | + pbdma_intr_0_lback_extra_pending_f() | + pbdma_intr_0_lbdat_timeout_pending_f() | + pbdma_intr_0_lbdat_extra_pending_f() | + pbdma_intr_0_pri_pending_f(); + + /* + * These are data parsing, framing errors or others which can be + * recovered from with intervention... or just resetting the + * channel + */ + f->intr.pbdma.channel_fatal_0 = + pbdma_intr_0_gpfifo_pending_f() | + pbdma_intr_0_gpptr_pending_f() | + pbdma_intr_0_gpentry_pending_f() | + pbdma_intr_0_gpcrc_pending_f() | + pbdma_intr_0_pbptr_pending_f() | + pbdma_intr_0_pbentry_pending_f() | + pbdma_intr_0_pbcrc_pending_f() | + pbdma_intr_0_method_pending_f() | + pbdma_intr_0_methodcrc_pending_f() | + pbdma_intr_0_pbseg_pending_f() | + pbdma_intr_0_syncpoint_illegal_pending_f() | + pbdma_intr_0_signature_pending_f(); + + /* Can be used for sw-methods, or represents a recoverable timeout. */ + f->intr.pbdma.restartable_0 = + pbdma_intr_0_device_pending_f(); +} + void gp10b_init_fifo(struct gpu_ops *gops) { gm20b_init_fifo(gops); @@ -240,4 +285,5 @@ void gp10b_init_fifo(struct gpu_ops *gops) gops->fifo.device_info_data_parse = gp10b_device_info_data_parse; gops->fifo.eng_runlist_base_size = fifo_eng_runlist_base__size_1_v; gops->fifo.device_info_fault_id = top_device_info_data_fault_id_enum_v; + gops->fifo.init_pbdma_intr_descs = gp10b_fifo_init_pbdma_intr_descs; } -- cgit v1.2.2