From dbb8792baf2142626728abf909fb201144b9b56a Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 24 May 2018 13:00:14 -0700 Subject: gpu: nvgpu: Move setting of BAR0_WINDOW to bus Move setting of BAR0_WINDOW to bus HAL. Also moves the usage of spinlock to common code so that pramin_gk20a.[ch] can be deleted. JIRA NVGPU-588 Change-Id: I3ceabc56016711b2c93f31fedf07daa778a4873a Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730890 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile | 1 - drivers/gpu/nvgpu/common/bus/bus_gk20a.c | 31 ++++++++++++ drivers/gpu/nvgpu/common/bus/bus_gk20a.h | 8 ++- drivers/gpu/nvgpu/common/pramin.c | 6 ++- drivers/gpu/nvgpu/gk20a/gk20a.h | 6 +-- drivers/gpu/nvgpu/gk20a/pramin_gk20a.c | 73 --------------------------- drivers/gpu/nvgpu/gk20a/pramin_gk20a.h | 36 ------------- drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 1 + drivers/gpu/nvgpu/gp106/hal_gp106.c | 5 +- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 4 +- drivers/gpu/nvgpu/gv100/hal_gv100.c | 4 +- drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 + drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | 4 +- drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | 1 + 14 files changed, 52 insertions(+), 129 deletions(-) delete mode 100644 drivers/gpu/nvgpu/gk20a/pramin_gk20a.c delete mode 100644 drivers/gpu/nvgpu/gk20a/pramin_gk20a.h diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 1fc52d73..8f2e72d6 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -92,7 +92,6 @@ nvgpu-y += \ common/clock_gating/gv100_gating_reglist.o \ common/clock_gating/gv11b_gating_reglist.o \ gk20a/gk20a.o \ - gk20a/pramin_gk20a.o \ gk20a/ce2_gk20a.o \ gk20a/fifo_gk20a.o \ gk20a/channel_gk20a.o \ diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c index 62dd7450..a2c6a3d7 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c +++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c @@ -169,3 +169,34 @@ int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst) return 0; } + +u32 gk20a_bus_set_bar0_window(struct gk20a *g, struct nvgpu_mem *mem, + struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, u32 w) +{ + u64 bufbase = nvgpu_sgt_get_phys(g, sgt, sgl); + u64 addr = bufbase + w * sizeof(u32); + u32 hi = (u32)((addr & ~(u64)0xfffff) + >> bus_bar0_window_target_bar0_window_base_shift_v()); + u32 lo = (u32)(addr & 0xfffff); + u32 win = nvgpu_aperture_mask(g, mem, + bus_bar0_window_target_sys_mem_noncoherent_f(), + bus_bar0_window_target_sys_mem_coherent_f(), + bus_bar0_window_target_vid_mem_f()) | + bus_bar0_window_base_f(hi); + + nvgpu_log(g, gpu_dbg_mem, + "0x%08x:%08x begin for %p,%p at [%llx,%llx] (sz %llx)", + hi, lo, mem, sgl, bufbase, + bufbase + nvgpu_sgt_get_phys(g, sgt, sgl), + nvgpu_sgt_get_length(sgt, sgl)); + + WARN_ON(!bufbase); + + if (g->mm.pramin_window != win) { + gk20a_writel(g, bus_bar0_window_r(), win); + gk20a_readl(g, bus_bar0_window_r()); + g->mm.pramin_window = win; + } + + return lo; +} diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h index 1f81a4b0..fe1cad58 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h +++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h @@ -27,10 +27,16 @@ struct gk20a; struct gpu_ops; struct nvgpu_mem; +struct nvgpu_sgt; +struct nvgpu_sgl; void gk20a_bus_isr(struct gk20a *g); int gk20a_read_ptimer(struct gk20a *g, u64 *value); void gk20a_bus_init_hw(struct gk20a *g); int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst); +u32 gk20a_bus_set_bar0_window(struct gk20a *g, struct nvgpu_mem *mem, + struct nvgpu_sgt *sgt, + struct nvgpu_sgl *sgl, + u32 w); -#endif /* GK20A_H */ +#endif /* BUS_GK20A_H */ diff --git a/drivers/gpu/nvgpu/common/pramin.c b/drivers/gpu/nvgpu/common/pramin.c index ed961965..4c6a4a0d 100644 --- a/drivers/gpu/nvgpu/common/pramin.c +++ b/drivers/gpu/nvgpu/common/pramin.c @@ -61,7 +61,8 @@ void nvgpu_pramin_access_batched(struct gk20a *g, struct nvgpu_mem *mem, while (size) { u32 sgl_len = (u32)nvgpu_sgt_get_length(sgt, sgl); - byteoff = g->ops.pramin.enter(g, mem, sgt, sgl, + nvgpu_spinlock_acquire(&g->mm.pramin_window_lock); + byteoff = g->ops.bus.set_bar0_window(g, mem, sgt, sgl, offset / sizeof(u32)); start_reg = g->ops.pramin.data032_r(byteoff / sizeof(u32)); until_end = SZ_1M - (byteoff & (SZ_1M - 1)); @@ -72,7 +73,8 @@ void nvgpu_pramin_access_batched(struct gk20a *g, struct nvgpu_mem *mem, /* read back to synchronize accesses */ gk20a_readl(g, start_reg); - g->ops.pramin.exit(g, mem, sgl); + + nvgpu_spinlock_release(&g->mm.pramin_window_lock); size -= n; diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2d304cff..f6b0b362 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -925,9 +925,6 @@ struct gpu_ops { struct gr_ctx_buffer_desc *desc, size_t size); struct { - u32 (*enter)(struct gk20a *g, struct nvgpu_mem *mem, - struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, - u32 w); void (*exit)(struct gk20a *g, struct nvgpu_mem *mem, struct nvgpu_sgl *sgl); u32 (*data032_r)(u32 i); @@ -1128,6 +1125,9 @@ struct gpu_ops { u32 source_id, u32 count, struct nvgpu_cpu_time_correlation_sample *); int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); + u32 (*set_bar0_window)(struct gk20a *g, struct nvgpu_mem *mem, + struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, + u32 w); } bus; struct { diff --git a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c b/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c deleted file mode 100644 index 8dde61a2..00000000 --- a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include -#include - -#include "gk20a/gk20a.h" -#include "gk20a/mm_gk20a.h" -#include "gk20a/pramin_gk20a.h" - -#include -#include - -/* WARNING: returns pramin_window_lock taken, complement with pramin_exit() */ -u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem, - struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, u32 w) -{ - u64 bufbase = nvgpu_sgt_get_phys(g, sgt, sgl); - u64 addr = bufbase + w * sizeof(u32); - u32 hi = (u32)((addr & ~(u64)0xfffff) - >> bus_bar0_window_target_bar0_window_base_shift_v()); - u32 lo = (u32)(addr & 0xfffff); - u32 win = nvgpu_aperture_mask(g, mem, - bus_bar0_window_target_sys_mem_noncoherent_f(), - bus_bar0_window_target_sys_mem_coherent_f(), - bus_bar0_window_target_vid_mem_f()) | - bus_bar0_window_base_f(hi); - - nvgpu_log(g, gpu_dbg_mem, - "0x%08x:%08x begin for %p,%p at [%llx,%llx] (sz %llx)", - hi, lo, mem, sgl, bufbase, - bufbase + nvgpu_sgt_get_phys(g, sgt, sgl), - nvgpu_sgt_get_length(sgt, sgl)); - - WARN_ON(!bufbase); - - nvgpu_spinlock_acquire(&g->mm.pramin_window_lock); - - if (g->mm.pramin_window != win) { - gk20a_writel(g, bus_bar0_window_r(), win); - gk20a_readl(g, bus_bar0_window_r()); - g->mm.pramin_window = win; - } - - return lo; -} - -void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem, - struct nvgpu_sgl *sgl) -{ - nvgpu_log(g, gpu_dbg_mem, "end for %p,%p", mem, sgl); - - nvgpu_spinlock_release(&g->mm.pramin_window_lock); -} diff --git a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.h b/drivers/gpu/nvgpu/gk20a/pramin_gk20a.h deleted file mode 100644 index a0a28088..00000000 --- a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef __PRAMIN_GK20A_H__ -#define __PRAMIN_GK20A_H__ - -struct gk20a; -struct nvgpu_mem; -struct nvgpu_mem_sgl; - -u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem, - struct nvgpu_sgt *sgt, - struct nvgpu_sgl *sgl, - u32 w); -void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem, - struct nvgpu_sgl *sgl); -#endif diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 970d2d27..ea021d27 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -608,6 +608,7 @@ static const struct gpu_ops gm20b_ops = { .read_ptimer = gk20a_read_ptimer, .get_timestamps_zipper = nvgpu_get_timestamps_zipper, .bar1_bind = gm20b_bus_bar1_bind, + .set_bar0_window = gk20a_bus_set_bar0_window, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 6749dba7..1a9c6a74 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -31,7 +31,6 @@ #include "gk20a/mm_gk20a.h" #include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/css_gr_gk20a.h" -#include "gk20a/pramin_gk20a.h" #include "gk20a/flcn_gk20a.h" #include "gk20a/regops_gk20a.h" #include "gk20a/mc_gk20a.h" @@ -589,8 +588,6 @@ static const struct gpu_ops gp106_ops = { .get_kind_pitch = gm20b_get_kind_pitch, }, .pramin = { - .enter = gk20a_pramin_enter, - .exit = gk20a_pramin_exit, .data032_r = pram_data032_r, }, .therm = { @@ -726,7 +723,7 @@ static const struct gpu_ops gp106_ops = { .read_ptimer = gk20a_read_ptimer, .get_timestamps_zipper = nvgpu_get_timestamps_zipper, .bar1_bind = gk20a_bus_bar1_bind, - + .set_bar0_window = gk20a_bus_set_bar0_window, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 47986f1b..defec775 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -31,7 +31,6 @@ #include "gk20a/mm_gk20a.h" #include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/css_gr_gk20a.h" -#include "gk20a/pramin_gk20a.h" #include "gk20a/flcn_gk20a.h" #include "gk20a/regops_gk20a.h" #include "gk20a/mc_gk20a.h" @@ -559,8 +558,6 @@ static const struct gpu_ops gp10b_ops = { .get_kind_pitch = gm20b_get_kind_pitch, }, .pramin = { - .enter = gk20a_pramin_enter, - .exit = gk20a_pramin_exit, .data032_r = pram_data032_r, }, .therm = { @@ -656,6 +653,7 @@ static const struct gpu_ops gp10b_ops = { .read_ptimer = gk20a_read_ptimer, .get_timestamps_zipper = nvgpu_get_timestamps_zipper, .bar1_bind = gk20a_bus_bar1_bind, + .set_bar0_window = gk20a_bus_set_bar0_window, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 00c992bc..ac68bff3 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -31,7 +31,6 @@ #include "gk20a/css_gr_gk20a.h" #include "gk20a/mc_gk20a.h" #include "gk20a/dbg_gpu_gk20a.h" -#include "gk20a/pramin_gk20a.h" #include "gk20a/flcn_gk20a.h" #include "gk20a/regops_gk20a.h" #include "gk20a/fb_gk20a.h" @@ -659,8 +658,6 @@ static const struct gpu_ops gv100_ops = { .get_flush_retries = gv100_mm_get_flush_retries, }, .pramin = { - .enter = gk20a_pramin_enter, - .exit = gk20a_pramin_exit, .data032_r = pram_data032_r, }, .therm = { @@ -796,6 +793,7 @@ static const struct gpu_ops gv100_ops = { .read_ptimer = gk20a_read_ptimer, .get_timestamps_zipper = nvgpu_get_timestamps_zipper, .bar1_bind = NULL, + .set_bar0_window = gk20a_bus_set_bar0_window, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index a191c3fc..6ec3c610 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -725,6 +725,7 @@ static const struct gpu_ops gv11b_ops = { .read_ptimer = gk20a_read_ptimer, .get_timestamps_zipper = nvgpu_get_timestamps_zipper, .bar1_bind = NULL, + .set_bar0_window = gk20a_bus_set_bar0_window, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index f4a87a74..2e12b512 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c @@ -37,7 +37,6 @@ #include "vgpu_mm_gp10b.h" #include "vgpu_fuse_gp10b.h" -#include "gk20a/pramin_gk20a.h" #include "gk20a/flcn_gk20a.h" #include "gk20a/mc_gk20a.h" #include "gk20a/fb_gk20a.h" @@ -433,8 +432,6 @@ static const struct gpu_ops vgpu_gp10b_ops = { .get_kind_pitch = gm20b_get_kind_pitch, }, .pramin = { - .enter = gk20a_pramin_enter, - .exit = gk20a_pramin_exit, .data032_r = pram_data032_r, }, .therm = { @@ -529,6 +526,7 @@ static const struct gpu_ops vgpu_gp10b_ops = { .read_ptimer = vgpu_read_ptimer, .get_timestamps_zipper = vgpu_get_timestamps_zipper, .bar1_bind = gk20a_bus_bar1_bind, + .set_bar0_window = gk20a_bus_set_bar0_window, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index deecc0d8..0b1aa672 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c @@ -577,6 +577,7 @@ static const struct gpu_ops vgpu_gv11b_ops = { .read_ptimer = vgpu_read_ptimer, .get_timestamps_zipper = vgpu_get_timestamps_zipper, .bar1_bind = NULL, + .set_bar0_window = gk20a_bus_set_bar0_window, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { -- cgit v1.2.2