From da03aa782535e77e221a3c27b0676fe9c1c7980c Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 6 Jul 2018 10:03:31 -0700 Subject: gpu: nvgpu: Move programming FB phys access to FB FB physical access register for simulation was programmed in GR implementation. Move it to FB where it belongs. JIRA NVGPU-714 Change-Id: Ic5146a61c7d45eadffdb4f3b6b08906bfcdbc224 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1772915 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/fb_gm20b.c | 6 ++++++ drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 5 ----- drivers/gpu/nvgpu/gv11b/fb_gv11b.c | 6 ++++++ drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 5 ----- 4 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c index b2a815fb..2ca8d86c 100644 --- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c @@ -42,6 +42,12 @@ void fb_gm20b_init_fs_state(struct gk20a *g) gk20a_writel(g, fb_fbhub_num_active_ltcs_r(), g->ltc_count); + + if (!nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { + /* Bypass MMU check for non-secure boot. For + * secure-boot,this register write has no-effect */ + gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffffU); + } } void gm20b_fb_set_mmu_page_size(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index f9eb97ce..85da0d35 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -49,11 +49,6 @@ void gr_gm20b_init_gpc_mmu(struct gk20a *g) nvgpu_log_info(g, "initialize gpc mmu"); - if (!nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { - /* Bypass MMU check for non-secure boot. For - * secure-boot,this register write has no-effect */ - gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffff); - } temp = gk20a_readl(g, fb_mmu_ctrl_r()); temp &= gr_gpcs_pri_mmu_ctrl_vm_pg_size_m() | gr_gpcs_pri_mmu_ctrl_use_pdb_big_page_size_m() | diff --git a/drivers/gpu/nvgpu/gv11b/fb_gv11b.c b/drivers/gpu/nvgpu/gv11b/fb_gv11b.c index 39903405..d6e621eb 100644 --- a/drivers/gpu/nvgpu/gv11b/fb_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fb_gv11b.c @@ -68,6 +68,12 @@ void gv11b_fb_init_fs_state(struct gk20a *g) nvgpu_log(g, gpu_dbg_info, "mmu active ltcs %u", fb_mmu_num_active_ltcs_count_v( gk20a_readl(g, fb_mmu_num_active_ltcs_r()))); + + if (!nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { + /* Bypass MMU check for non-secure boot. For + * secure-boot,this register write has no-effect */ + gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffffU); + } } void gv11b_fb_init_cbc(struct gk20a *g, struct gr_gk20a *gr) diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 4280e8ff..ef482ba8 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -4248,11 +4248,6 @@ void gr_gv11b_init_gpc_mmu(struct gk20a *g) nvgpu_log_info(g, "initialize gpc mmu"); - if (!nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { - /* Bypass MMU check for non-secure boot. For - * secure-boot,this register write has no-effect */ - gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffff); - } temp = gk20a_readl(g, fb_mmu_ctrl_r()); temp &= gr_gpcs_pri_mmu_ctrl_vm_pg_size_m() | gr_gpcs_pri_mmu_ctrl_use_pdb_big_page_size_m() | -- cgit v1.2.2