From d6b5d74c5ede5fb620b056286f9f615566f84b29 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Mon, 26 Feb 2018 17:58:14 -0800 Subject: gpu: nvgpu: make gr functions that are used by vsrv global Fixed vsrv link errors for gr unification. Jira VQRM-2982 Change-Id: Icd46792191f1a9aaefbf86d2f3c0b4d5bce2384e Signed-off-by: Richard Zhao Reviewed-on: https://git-master.nvidia.com/r/1664706 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 8 ++++---- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 6 ++++++ drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 2 +- drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 2 ++ drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 2 +- drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 1 + 6 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index c64900bd..07185db2 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -752,7 +752,7 @@ static u32 fecs_current_ctx_data(struct gk20a *g, struct nvgpu_mem *inst_block) gr_fecs_current_ctx_valid_f(1); } -static int gr_gk20a_fecs_ctx_bind_channel(struct gk20a *g, +int gr_gk20a_fecs_ctx_bind_channel(struct gk20a *g, struct channel_gk20a *c) { u32 inst_base_ptr = u64_lo32(nvgpu_inst_block_addr(g, &c->inst_block) @@ -881,7 +881,7 @@ u32 gk20a_gr_tpc_offset(struct gk20a *g, u32 tpc) return tpc_offset; } -static int gr_gk20a_commit_global_ctx_buffers(struct gk20a *g, +int gr_gk20a_commit_global_ctx_buffers(struct gk20a *g, struct channel_gk20a *c, bool patch) { struct gr_gk20a *gr = &g->gr; @@ -1282,7 +1282,7 @@ int gr_gk20a_init_fs_state(struct gk20a *g) return 0; } -static int gr_gk20a_fecs_ctx_image_save(struct channel_gk20a *c, u32 save_type) +int gr_gk20a_fecs_ctx_image_save(struct channel_gk20a *c, u32 save_type) { struct gk20a *g = c->g; int ret; @@ -1306,7 +1306,7 @@ static int gr_gk20a_fecs_ctx_image_save(struct channel_gk20a *c, u32 save_type) return ret; } -static u32 gk20a_init_sw_bundle(struct gk20a *g) +u32 gk20a_init_sw_bundle(struct gk20a *g) { struct av_list_gk20a *sw_bundle_init = &g->gr.ctx_vars.sw_bundle_init; u32 last_bundle_data = 0; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 1bf58f5c..fff22f29 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -802,4 +802,10 @@ void gk20a_gr_set_error_notifier(struct gk20a *g, struct gr_gk20a_isr_data *isr_data, u32 error_notifier); int gk20a_gr_handle_notify_pending(struct gk20a *g, struct gr_gk20a_isr_data *isr_data); +int gr_gk20a_commit_global_ctx_buffers(struct gk20a *g, + struct channel_gk20a *c, bool patch); +int gr_gk20a_fecs_ctx_bind_channel(struct gk20a *g, + struct channel_gk20a *c); +u32 gk20a_init_sw_bundle(struct gk20a *g); +int gr_gk20a_fecs_ctx_image_save(struct channel_gk20a *c, u32 save_type); #endif /*__GR_GK20A_H__*/ diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 8cbda409..6c145c00 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c @@ -2073,7 +2073,7 @@ u32 get_ecc_override_val(struct gk20a *g) return 0; } -static bool gr_gp10b_suspend_context(struct channel_gk20a *ch, +bool gr_gp10b_suspend_context(struct channel_gk20a *ch, bool *cilp_preempt_pending) { struct gk20a *g = ch->g; diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 8f1ebb16..61634668 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h @@ -152,5 +152,7 @@ void gr_gp10b_init_czf_bypass(struct gk20a *g); void gr_gp10b_init_ctxsw_hdr_data(struct gk20a *g, struct nvgpu_mem *mem); void gr_gp10b_init_gfxp_wfi_timeout_count(struct gk20a *g); unsigned long gr_gp10b_get_max_gfxp_wfi_timeout_count(struct gk20a *g); +bool gr_gp10b_suspend_context(struct channel_gk20a *ch, + bool *cilp_preempt_pending); #endif diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 808cf19f..e697b491 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -131,7 +131,7 @@ bool gr_gv11b_is_valid_compute_class(struct gk20a *g, u32 class_num) return valid; } -static u32 gv11b_gr_sm_offset(struct gk20a *g, u32 sm) +u32 gv11b_gr_sm_offset(struct gk20a *g, u32 sm) { u32 sm_pri_stride = nvgpu_get_litter_value(g, GPU_LIT_SM_PRI_STRIDE); diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index 0f42e795..4615ff55 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h @@ -231,5 +231,6 @@ void gr_gv11b_update_ctxsw_preemption_mode(struct gk20a *g, struct channel_gk20a *ch_ctx, struct nvgpu_mem *mem); int gr_gv11b_handle_ssync_hww(struct gk20a *g); +u32 gv11b_gr_sm_offset(struct gk20a *g, u32 sm); #endif -- cgit v1.2.2