From b0ffd2f0657a11c2fcd7470430465c77ca5c73b9 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Tue, 10 May 2016 16:26:40 -0700 Subject: nvgpu: vgpu: add tsg set interleave support added a new cmd to support setting tsg interleave level. Bug 1702773 VFND-1492 Change-Id: Idd9b9c59180b156293ddfc4e2b879d0ea6908388 Signed-off-by: Richard Zhao Reviewed-on: http://git-master/r/1145024 (cherry picked from commit 0929ff1089fbc331b07e17073a46fda4086ae785) Reviewed-on: http://git-master/r/1150706 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 26 ++++++++++++++++++++++++-- include/linux/tegra_vgpu.h | 8 ++++++++ 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index fb19db4a..0895b757 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -560,6 +560,28 @@ static int vgpu_channel_set_priority(struct channel_gk20a *ch, u32 priority) return err ? err : msg.ret; } +static int vgpu_fifo_tsg_set_runlist_interleave(struct gk20a *g, + u32 tsgid, + u32 runlist_id, + u32 new_level) +{ + struct gk20a_platform *platform = gk20a_get_platform(g->dev); + struct tegra_vgpu_cmd_msg msg = {0}; + struct tegra_vgpu_tsg_runlist_interleave_params *p = + &msg.params.tsg_interleave; + int err; + + gk20a_dbg_fn(""); + + msg.cmd = TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE; + msg.handle = platform->virt_handle; + p->tsg_id = tsgid; + p->level = new_level; + err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); + WARN_ON(err || msg.ret); + return err ? err : msg.ret; +} + static int vgpu_fifo_set_runlist_interleave(struct gk20a *g, u32 id, bool is_tsg, @@ -575,9 +597,9 @@ static int vgpu_fifo_set_runlist_interleave(struct gk20a *g, gk20a_dbg_fn(""); - /* FIXME: add support for TSGs */ if (is_tsg) - return -ENOSYS; + return vgpu_fifo_tsg_set_runlist_interleave(g, id, + runlist_id, new_level); ch = &g->fifo.channel[id]; msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE; diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index 706d87e4..9547e35b 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h @@ -92,6 +92,7 @@ enum { TEGRA_VGPU_CMD_TSG_UNBIND_CHANNEL, TEGRA_VGPU_CMD_TSG_PREEMPT, TEGRA_VGPU_CMD_TSG_SET_TIMESLICE, + TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE, }; struct tegra_vgpu_connect_params { @@ -379,6 +380,12 @@ struct tegra_vgpu_tsg_timeslice_params { u32 timeslice_us; }; +/* level follows nvgpu.h definitions */ +struct tegra_vgpu_tsg_runlist_interleave_params { + u32 tsg_id; + u32 level; +}; + struct tegra_vgpu_cmd_msg { u32 cmd; int ret; @@ -418,6 +425,7 @@ struct tegra_vgpu_cmd_msg { struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel; struct tegra_vgpu_tsg_preempt_params tsg_preempt; struct tegra_vgpu_tsg_timeslice_params tsg_timeslice; + struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave; char padding[192]; } params; }; -- cgit v1.2.2