From ae59b322f54cefa792d3975e45de5aa346e2b774 Mon Sep 17 00:00:00 2001 From: Vaikundanathan S Date: Wed, 25 Apr 2018 14:52:47 +0530 Subject: gpu:nvgpu: Add gops to load pstate functions Add gops to choose to/not to enable 1. clk_freq_controller 2. pmgr_domain 3. lpwr_pg Bug 200399373 Change-Id: Ie5131f9ea260f777fded8392f24815acef6cfbea Signed-off-by: Vaikundanathan S Reviewed-on: https://git-master.nvidia.com/r/1702216 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 3 +++ drivers/gpu/nvgpu/gp106/hal_gp106.c | 3 +++ drivers/gpu/nvgpu/gv100/hal_gv100.c | 3 +++ drivers/gpu/nvgpu/pstate/pstate.c | 35 +++++++++++++++++++++++------------ 4 files changed, 32 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index f71ddc2c..8f35e2c9 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1034,6 +1034,9 @@ struct gpu_ops { void (*mclk_deinit)(struct gk20a *g); int (*mclk_change)(struct gk20a *g, u16 val); bool split_rail_support; + bool support_clk_freq_controller; + bool support_pmgr_domain; + bool support_lpwr_pg; } clk; struct { u32 (*get_arbiter_clk_domains)(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index c87414d0..7cfe4d76 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -833,6 +833,9 @@ int gp106_init_hal(struct gk20a *g) g->pmu_lsf_pmu_wpr_init_done = 0; g->bootstrap_owner = LSF_FALCON_ID_SEC2; gops->clk.split_rail_support = true; + gops->clk.support_clk_freq_controller = true; + gops->clk.support_pmgr_domain = true; + gops->clk.support_lpwr_pg = true; g->name = "gp10x"; diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index f0926402..30d19027 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -908,6 +908,9 @@ int gv100_init_hal(struct gk20a *g) g->pmu_lsf_pmu_wpr_init_done = 0; g->bootstrap_owner = LSF_FALCON_ID_SEC2; gops->clk.split_rail_support = false; + gops->clk.support_clk_freq_controller = false; + gops->clk.support_pmgr_domain = false; + gops->clk.support_lpwr_pg = false; g->name = "gv10x"; diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c index 3d6a436d..6c9d7736 100644 --- a/drivers/gpu/nvgpu/pstate/pstate.c +++ b/drivers/gpu/nvgpu/pstate/pstate.c @@ -96,15 +96,23 @@ int gk20a_init_pstate_support(struct gk20a *g) if (err) return err; - err = pmgr_domain_sw_setup(g); - if (err) - return err; + if(g->ops.clk.support_pmgr_domain) { + err = pmgr_domain_sw_setup(g); + if (err) + return err; + } - err = clk_freq_controller_sw_setup(g); - if (err) - return err; + if (g->ops.clk.support_clk_freq_controller) { + err = clk_freq_controller_sw_setup(g); + if (err) + return err; + } - err = nvgpu_lpwr_pg_setup(g); + if(g->ops.clk.support_lpwr_pg) { + err = nvgpu_lpwr_pg_setup(g); + if (err) + return err; + } return err; } @@ -176,10 +184,11 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g) if (err) return err; - err = clk_freq_controller_pmu_setup(g); - if (err) - return err; - + if (g->ops.clk.support_clk_freq_controller) { + err = clk_freq_controller_pmu_setup(g); + if (err) + return err; + } err = clk_pmu_vin_load(g); if (err) return err; @@ -188,7 +197,9 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g) if (err) return err; - err = pmgr_domain_pmu_setup(g); + if (g->ops.clk.support_pmgr_domain) + err = pmgr_domain_pmu_setup(g); + return err; } -- cgit v1.2.2