From a7fe3a845049b62275ab660b51b6bc1300177d22 Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Tue, 23 Jan 2018 10:01:45 -0800 Subject: gpu: nvgpu: gv11b: enable devfreq After moving devfreq enable to end of finalize power on, intermittent issues related to gpu booting with devfreq enabled are fixed. Enabled devfreq for gv11b by enabling ""nvhost_podgov" governor in platform data. Reused scaling functions from gp10b/gk20a. Removed emc floor on railgate for power saving. Added max emc frequency as floor in rail-ungate for faster gpu boot. Bug 2049965 Bug 2039013 Bug 200377508 Change-Id: Ia1dec278b663b9f7ed859dd953a60f3eae7ef9a0 Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1644702 Reviewed-by: svc-mobile-coverity Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- .../gpu/nvgpu/common/linux/platform_gp10b_tegra.c | 14 +++++------ .../gpu/nvgpu/common/linux/platform_gv11b_tegra.c | 28 ++++++++++++++++++++++ drivers/gpu/nvgpu/gp10b/platform_gp10b.h | 9 +++++-- 3 files changed, 42 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c index 36052ee3..4dd5d46e 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c @@ -1,7 +1,7 @@ /* * GP10B Tegra Platform Interface * - * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -97,7 +97,7 @@ int gp10b_tegra_get_clocks(struct device *dev) return 0; } -static void gp10b_tegra_scale_init(struct device *dev) +void gp10b_tegra_scale_init(struct device *dev) { struct gk20a_platform *platform = gk20a_get_platform(dev); struct gk20a_scale_profile *profile = platform->g->scale_profile; @@ -265,7 +265,7 @@ int gp10b_tegra_reset_deassert(struct device *dev) return ret; } -static void gp10b_tegra_prescale(struct device *dev) +void gp10b_tegra_prescale(struct device *dev) { struct gk20a *g = get_gk20a(dev); u32 avg = 0; @@ -277,7 +277,7 @@ static void gp10b_tegra_prescale(struct device *dev) gk20a_dbg_fn("done"); } -static void gp10b_tegra_postscale(struct device *pdev, +void gp10b_tegra_postscale(struct device *pdev, unsigned long freq) { struct gk20a_platform *platform = gk20a_get_platform(pdev); @@ -286,7 +286,7 @@ static void gp10b_tegra_postscale(struct device *pdev, unsigned long emc_rate; gk20a_dbg_fn(""); - if (profile && !gp10b_tegra_is_railgated(pdev)) { + if (profile && !platform->is_railgated(pdev)) { unsigned long emc_scale; if (freq <= gp10b_freq_table[0]) @@ -306,7 +306,7 @@ static void gp10b_tegra_postscale(struct device *pdev, gk20a_dbg_fn("done"); } -static long gp10b_round_clk_rate(struct device *dev, unsigned long rate) +long gp10b_round_clk_rate(struct device *dev, unsigned long rate) { struct gk20a *g = get_gk20a(dev); struct gk20a_scale_profile *profile = g->scale_profile; @@ -321,7 +321,7 @@ static long gp10b_round_clk_rate(struct device *dev, unsigned long rate) return freq_table[max_states - 1]; } -static int gp10b_clk_get_freqs(struct device *dev, +int gp10b_clk_get_freqs(struct device *dev, unsigned long **freqs, int *num_freqs) { struct gk20a_platform *platform = gk20a_get_platform(dev); diff --git a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c index 5240480e..c56bc0f3 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c @@ -23,6 +23,7 @@ #include #include #include +#include #include @@ -34,6 +35,7 @@ #include "gk20a/gk20a.h" #include "platform_gk20a.h" #include "clk.h" +#include "scale.h" #include "gp10b/platform_gp10b.h" #include "platform_gp10b_tegra.h" @@ -135,9 +137,16 @@ static int gv11b_tegra_railgate(struct device *dev) { #ifdef TEGRA194_POWER_DOMAIN_GPU struct gk20a_platform *platform = gk20a_get_platform(dev); + struct gk20a_scale_profile *profile = platform->g->scale_profile; struct gk20a *g = get_gk20a(dev); int i; + /* remove emc frequency floor */ + if (profile) + tegra_bwmgr_set_emc( + (struct tegra_bwmgr_client *)profile->private_data, + 0, TEGRA_BWMGR_SET_EMC_FLOOR); + if (tegra_bpmp_running()) { nvgpu_log(g, gpu_dbg_info, "bpmp running"); if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) { @@ -164,6 +173,7 @@ static int gv11b_tegra_unrailgate(struct device *dev) #ifdef TEGRA194_POWER_DOMAIN_GPU struct gk20a_platform *platform = gk20a_get_platform(dev); struct gk20a *g = get_gk20a(dev); + struct gk20a_scale_profile *profile = platform->g->scale_profile; int i; if (tegra_bpmp_running()) { @@ -182,6 +192,13 @@ static int gv11b_tegra_unrailgate(struct device *dev) } else { nvgpu_log(g, gpu_dbg_info, "bpmp not running"); } + + /* to start with set emc frequency floor to max rate*/ + if (profile) + tegra_bwmgr_set_emc( + (struct tegra_bwmgr_client *)profile->private_data, + tegra_bwmgr_get_max_emc_rate(), + TEGRA_BWMGR_SET_EMC_FLOOR); #endif return ret; } @@ -225,6 +242,17 @@ struct gk20a_platform gv11b_tegra_platform = { .busy = gk20a_tegra_busy, .idle = gk20a_tegra_idle, + .clk_round_rate = gp10b_round_clk_rate, + .get_clk_freqs = gp10b_clk_get_freqs, + + /* frequency scaling configuration */ + .initscale = gp10b_tegra_scale_init, + .prescale = gp10b_tegra_prescale, + .postscale = gp10b_tegra_postscale, + .devfreq_governor = "nvhost_podgov", + + .qos_notify = gk20a_scale_qos_notify, + .dump_platform_dependencies = gk20a_tegra_debug_dump, .soc_name = "tegra19x", diff --git a/drivers/gpu/nvgpu/gp10b/platform_gp10b.h b/drivers/gpu/nvgpu/gp10b/platform_gp10b.h index 0791c2fe..d256d126 100644 --- a/drivers/gpu/nvgpu/gp10b/platform_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/platform_gp10b.h @@ -1,7 +1,7 @@ /* * GP10B Platform (SoC) Interface * - * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -30,5 +30,10 @@ struct device; int gp10b_tegra_get_clocks(struct device *dev); int gp10b_tegra_reset_assert(struct device *dev); int gp10b_tegra_reset_deassert(struct device *dev); - +void gp10b_tegra_scale_init(struct device *dev); +long gp10b_round_clk_rate(struct device *dev, unsigned long rate); +int gp10b_clk_get_freqs(struct device *dev, + unsigned long **freqs, int *num_freqs); +void gp10b_tegra_prescale(struct device *dev); +void gp10b_tegra_postscale(struct device *pdev, unsigned long freq); #endif -- cgit v1.2.2