From 9b1bb51cf004833817ac85d145f2bd1b4c103f57 Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Thu, 9 Jun 2016 15:47:00 +0530 Subject: gpu: nvgpu: ACR interface update - ACR interface update to support next GPU chip ACR boot - Udpate falcon ID JIRA DNVGPU-34 Change-Id: Ic9e5e1f9bd965dbb65b4feaadcf63e457b49263b Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1161695 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/acr.h | 10 +++++++++- drivers/gpu/nvgpu/gm20b/acr_gm20b.h | 2 +- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/acr.h b/drivers/gpu/nvgpu/acr.h index 2a3ece7b..dc463133 100644 --- a/drivers/gpu/nvgpu/acr.h +++ b/drivers/gpu/nvgpu/acr.h @@ -17,6 +17,9 @@ #include "gm20b/mm_gm20b.h" #include "gm20b/acr_gm20b.h" #include "gm206/acr_gm206.h" +#ifdef CONFIG_ARCH_TEGRA_18x_SOC +#include "acr_t18x.h" +#endif struct acr_desc { struct mem_desc ucode_blob; @@ -26,7 +29,12 @@ struct acr_desc { struct acr_fw_header *fw_hdr; u32 pmu_args; const struct firmware *acr_fw; - struct flcn_acr_desc *acr_dmem_desc; + union{ + struct flcn_acr_desc *acr_dmem_desc; +#ifdef CONFIG_ARCH_TEGRA_18x_SOC + struct flcn_acr_desc_v1 *acr_dmem_desc_v1; +#endif + }; struct mem_desc acr_ucode; const struct firmware *hsbl_fw; struct mem_desc hsbl_ucode; diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h index 51492827..fb61e366 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h @@ -55,7 +55,7 @@ #define LSF_FALCON_ID_RESERVED (1) #define LSF_FALCON_ID_FECS (2) #define LSF_FALCON_ID_GPCCS (3) -#define LSF_FALCON_ID_END (4) +#define LSF_FALCON_ID_END (11) #define LSF_FALCON_ID_INVALID (0xFFFFFFFF) /*! -- cgit v1.2.2