From 8c8cdacf7a022d1326ec519daa8b8da174aa8f3d Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Fri, 10 Aug 2018 16:28:21 +0530 Subject: gpu: nvgpu: Use reset_enum to get mc engine mask Currently, we need to include the MC hardware header in nvlink file to generate reset mask. We can use the reset_enum present in DEVICE_INFO table's IOCTRL entry which is meant to index into NV_PMC_ENABLE_DEVICE register bitfields. This allows us to not #include the MC hardware header in nvlink IP file. JIRA NVGPU-966 Change-Id: I037498038b12f795ee444916fb586355ebf04bb3 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1796819 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/nvlink_gv100.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c index 0ad45540..b39e4165 100644 --- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c +++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c @@ -2688,6 +2688,7 @@ void gv100_nvlink_get_connected_link_mask(u32 *link_mask) int gv100_nvlink_early_init(struct gk20a *g) { int err = 0; + u32 mc_reset_nvlink_mask; if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_NVLINK)) return -EINVAL; @@ -2703,7 +2704,10 @@ int gv100_nvlink_early_init(struct gk20a *g) goto nvlink_init_exit; /* Enable NVLINK in MC */ - g->ops.mc.reset(g, mc_enable_nvlink_enabled_f()); + mc_reset_nvlink_mask = BIT32(g->nvlink.ioctrl_table[0].reset_enum); + nvgpu_log(g, gpu_dbg_nvlink, "mc_reset_nvlink_mask: 0x%x", + mc_reset_nvlink_mask); + g->ops.mc.reset(g, mc_reset_nvlink_mask); err = g->ops.nvlink.discover_link(g); if (err || g->nvlink.discovered_links == 0) { -- cgit v1.2.2