From 7f8226887c28267d3c2351692d4429ead1e17695 Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Wed, 29 Aug 2018 15:46:12 -0400 Subject: gpu: nvgpu: cleanup return types for MISRA 10.3 This is a big cleanup of return types across a number of modules in the nvgpu driver. Many functions were returning u32 but using negative return codes. This is a MISRA 10.3 violation by assigning signed values to a u32. JIRA NVGPU-647 Change-Id: I59ee66706321f5b5b1a07ed8c24b81583e9ba28c Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/1810743 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/boardobj/boardobj.c | 6 +- drivers/gpu/nvgpu/boardobj/boardobj.h | 8 +-- drivers/gpu/nvgpu/boardobj/boardobjgrp.c | 78 ++++++++++++------------ drivers/gpu/nvgpu/boardobj/boardobjgrp.h | 29 ++++----- drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c | 8 +-- drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h | 5 +- drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c | 8 +-- drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h | 5 +- drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c | 4 +- drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h | 6 +- drivers/gpu/nvgpu/clk/clk_domain.c | 86 +++++++++++++------------- drivers/gpu/nvgpu/clk/clk_domain.h | 8 +-- drivers/gpu/nvgpu/clk/clk_fll.c | 30 ++++----- drivers/gpu/nvgpu/clk/clk_fll.h | 5 +- drivers/gpu/nvgpu/clk/clk_freq_controller.c | 36 +++++------ drivers/gpu/nvgpu/clk/clk_freq_controller.h | 6 +- drivers/gpu/nvgpu/clk/clk_prog.c | 60 +++++++++--------- drivers/gpu/nvgpu/clk/clk_prog.h | 6 +- drivers/gpu/nvgpu/clk/clk_vf_point.c | 48 +++++++-------- drivers/gpu/nvgpu/clk/clk_vf_point.h | 6 +- drivers/gpu/nvgpu/clk/clk_vin.c | 60 +++++++++--------- drivers/gpu/nvgpu/clk/clk_vin.h | 4 +- drivers/gpu/nvgpu/gk20a/gk20a.h | 7 ++- drivers/gpu/nvgpu/perf/vfe_equ.c | 52 ++++++++-------- drivers/gpu/nvgpu/perf/vfe_equ.h | 6 +- drivers/gpu/nvgpu/perf/vfe_var.c | 88 +++++++++++++-------------- drivers/gpu/nvgpu/perf/vfe_var.h | 4 +- drivers/gpu/nvgpu/pmgr/pmgr.c | 4 +- drivers/gpu/nvgpu/pmgr/pmgr.h | 4 +- drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 18 +++--- drivers/gpu/nvgpu/pmgr/pmgrpmu.h | 4 +- drivers/gpu/nvgpu/pmgr/pwrdev.c | 16 ++--- drivers/gpu/nvgpu/pmgr/pwrdev.h | 4 +- drivers/gpu/nvgpu/pmgr/pwrmonitor.c | 18 +++--- drivers/gpu/nvgpu/pmgr/pwrmonitor.h | 4 +- drivers/gpu/nvgpu/pmgr/pwrpolicy.c | 18 +++--- drivers/gpu/nvgpu/pmgr/pwrpolicy.h | 4 +- drivers/gpu/nvgpu/pstate/pstate.c | 2 +- drivers/gpu/nvgpu/therm/thrmchannel.c | 16 ++--- drivers/gpu/nvgpu/therm/thrmchannel.h | 4 +- drivers/gpu/nvgpu/therm/thrmdev.c | 36 +++++------ drivers/gpu/nvgpu/therm/thrmdev.h | 4 +- drivers/gpu/nvgpu/therm/thrmpmu.c | 6 +- drivers/gpu/nvgpu/therm/thrmpmu.h | 4 +- drivers/gpu/nvgpu/volt/volt_dev.c | 30 ++++----- drivers/gpu/nvgpu/volt/volt_dev.h | 4 +- drivers/gpu/nvgpu/volt/volt_policy.c | 56 ++++++++--------- drivers/gpu/nvgpu/volt/volt_policy.h | 4 +- drivers/gpu/nvgpu/volt/volt_rail.c | 22 +++---- drivers/gpu/nvgpu/volt/volt_rail.h | 4 +- 50 files changed, 480 insertions(+), 475 deletions(-) diff --git a/drivers/gpu/nvgpu/boardobj/boardobj.c b/drivers/gpu/nvgpu/boardobj/boardobj.c index 5f726935..b7892c78 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobj.c +++ b/drivers/gpu/nvgpu/boardobj/boardobj.c @@ -26,7 +26,7 @@ #include "boardobj.h" #include "ctrl/ctrlboardobj.h" -u32 boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, +int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *args) { struct boardobj *pboardobj = NULL; @@ -61,7 +61,7 @@ u32 boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, return 0; } -u32 boardobj_destruct_super(struct boardobj *pboardobj) +int boardobj_destruct_super(struct boardobj *pboardobj) { struct gk20a *g = pboardobj->g; @@ -86,7 +86,7 @@ bool boardobj_implements_super(struct gk20a *g, struct boardobj *pboardobj, return (0 != (pboardobj->type_mask & BIT(type))); } -u32 boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj, +int boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj, struct nv_pmu_boardobj *pmudata) { nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/boardobj/boardobj.h b/drivers/gpu/nvgpu/boardobj/boardobj.h index 8fc8d1cc..4df14aaa 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobj.h +++ b/drivers/gpu/nvgpu/boardobj/boardobj.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -42,14 +42,14 @@ typedef bool boardobj_implements(struct gk20a *g, struct boardobj *pboardobj, * description structure, describing this BOARDOBJ board device to the PMU. * */ -typedef u32 boardobj_pmudatainit(struct gk20a *g, struct boardobj *pboardobj, +typedef int boardobj_pmudatainit(struct gk20a *g, struct boardobj *pboardobj, struct nv_pmu_boardobj *pmudata); /* * Constructor for the base Board Object. Called by each device-specific * implementation of the BOARDOBJ interface to initialize the board object. */ -typedef u32 boardobj_construct(struct gk20a *g, struct boardobj **pboardobj, +typedef int boardobj_construct(struct gk20a *g, struct boardobj **pboardobj, u16 size, void *args); /* @@ -58,7 +58,7 @@ typedef u32 boardobj_construct(struct gk20a *g, struct boardobj **pboardobj, * This has to be explicitly set by each device that extends from the * board object. */ -typedef u32 boardobj_destruct(struct boardobj *pboardobj); +typedef int boardobj_destruct(struct boardobj *pboardobj); /* * Base Class for all physical or logical device on the PCB. diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c index e0ab67be..e3b69d4b 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c @@ -32,10 +32,10 @@ static boardobjgrp_objgetnext boardobjgrp_objgetnext_final; static boardobjgrp_objremoveanddestroy boardobjgrp_objremoveanddestroy_final; static boardobjgrp_pmudatainstget boardobjgrp_pmudatainstget_stub; static boardobjgrp_pmustatusinstget boardobjgrp_pmustatusinstget_stub; -static u32 boardobjgrp_pmucmdsend(struct gk20a *g, +static int boardobjgrp_pmucmdsend(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *pcmd); -static u32 boardobjgrp_pmucmdsend_rpc(struct gk20a *g, +static int boardobjgrp_pmucmdsend_rpc(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *pcmd, bool copy_out); @@ -48,7 +48,8 @@ struct boardobjgrp_pmucmdhandler_params { u32 success; }; -u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp) +int boardobjgrp_construct_super(struct gk20a *g, + struct boardobjgrp *pboardobjgrp) { nvgpu_log_info(g, " "); @@ -102,7 +103,7 @@ u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgr return 0; } -u32 boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp) +int boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp) { struct gk20a *g = pboardobjgrp->g; @@ -119,12 +120,12 @@ u32 boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp) return pboardobjgrp->destruct(pboardobjgrp); } -u32 boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) +int boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) { struct boardobj *pboardobj; struct gk20a *g = pboardobjgrp->g; - u32 status = 0; - u32 stat; + int status = 0; + int stat; u8 index; nvgpu_log_info(g, " "); @@ -174,7 +175,7 @@ u32 boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) return status; } -u32 boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp +int boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) { @@ -190,7 +191,7 @@ u32 boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp return 0; } -u32 boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp +int boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) { @@ -206,7 +207,7 @@ u32 boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp return 0; } -u32 boardobjgrp_pmucmd_destroy_impl(struct gk20a *g, +int boardobjgrp_pmucmd_destroy_impl(struct gk20a *g, struct boardobjgrp_pmu_cmd *cmd) { struct nvgpu_mem *mem = &cmd->surf.sysmem_desc; @@ -242,11 +243,11 @@ int is_boardobjgrp_pmucmd_id_valid_v1(struct gk20a *g, return err; } -u32 boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g, +int boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *pcmd) { - u32 status = 0; + int status = 0; struct nvgpu_mem *sysmem_desc = &pcmd->surf.sysmem_desc; nvgpu_log_info(g, " "); @@ -271,10 +272,10 @@ boardobjgrp_pmucmd_pmuinithandle_exit: return status; } -u32 boardobjgrp_pmuinithandle_impl(struct gk20a *g, +int boardobjgrp_pmuinithandle_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp) { - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -310,7 +311,7 @@ boardobjgrp_pmuinithandle_exit: } -u32 boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp +int boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, struct boardobjgrpmask *mask) { @@ -331,7 +332,7 @@ u32 boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp return 0; } -static u32 boardobjgrp_pmudatainstget_stub(struct gk20a *g, +static int boardobjgrp_pmudatainstget_stub(struct gk20a *g, struct nv_pmu_boardobjgrp *boardobjgrppmu, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) { @@ -340,7 +341,7 @@ static u32 boardobjgrp_pmudatainstget_stub(struct gk20a *g, } -static u32 boardobjgrp_pmustatusinstget_stub(struct gk20a *g, +static int boardobjgrp_pmustatusinstget_stub(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx) { @@ -348,11 +349,11 @@ static u32 boardobjgrp_pmustatusinstget_stub(struct gk20a *g, return -EINVAL; } -u32 boardobjgrp_pmudatainit_legacy(struct gk20a *g, +int boardobjgrp_pmudatainit_legacy(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { - u32 status = 0; + int status = 0; struct boardobj *pboardobj = NULL; struct nv_pmu_boardobj *ppmudata = NULL; u8 index; @@ -401,10 +402,10 @@ boardobjgrppmudatainit_legacy_done: return status; } -u32 boardobjgrp_pmudatainit_super(struct gk20a *g, struct boardobjgrp +int boardobjgrp_pmudatainit_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { - u32 status = 0; + int status = 0; struct boardobj *pboardobj = NULL; struct nv_pmu_boardobj *ppmudata = NULL; u8 index; @@ -476,9 +477,9 @@ static int check_boardobjgrp_param(struct gk20a *g, return 0; } -u32 boardobjgrp_pmuset_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp) +int boardobjgrp_pmuset_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp) { - u32 status = 0; + int status = 0; struct boardobjgrp_pmu_cmd *pcmd = (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); @@ -537,10 +538,11 @@ boardobjgrp_pmuset_exit: return status; } -u32 boardobjgrp_pmuset_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp) +int boardobjgrp_pmuset_impl_v1(struct gk20a *g, + struct boardobjgrp *pboardobjgrp) { struct nvgpu_pmu *pmu = &g->pmu; - u32 status = 0; + int status = 0; struct boardobjgrp_pmu_cmd *pcmd = (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); @@ -593,11 +595,11 @@ boardobjgrp_pmuset_exit: return status; } -u32 +int boardobjgrp_pmugetstatus_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrpmask *mask) { - u32 status = 0; + int status = 0; struct boardobjgrp_pmu_cmd *pcmd = (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); struct boardobjgrp_pmu_cmd *pset = @@ -665,12 +667,12 @@ boardobjgrp_pmugetstatus_exit: return status; } -u32 +int boardobjgrp_pmugetstatus_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrpmask *mask) { struct nvgpu_pmu *pmu = &g->pmu; - u32 status = 0; + int status = 0; struct boardobjgrp_pmu_cmd *pcmd = (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); @@ -728,7 +730,7 @@ boardobjgrp_pmugetstatus_exit: return status; } -static u32 +static int boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, struct boardobj *pboardobj, u8 index) { @@ -761,8 +763,8 @@ boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, } pboardobjgrp->ppobjects[index] = pboardobj; - pboardobjgrp->objmaxidx = BOARDOBJGRP_IS_EMPTY(pboardobjgrp) ? - index : max(pboardobjgrp->objmaxidx, index); + pboardobjgrp->objmaxidx = (u8)(BOARDOBJGRP_IS_EMPTY(pboardobjgrp) ? + index : max(pboardobjgrp->objmaxidx, index)); pboardobj->idx = index; pboardobjgrp->objmask |= BIT(index); @@ -835,12 +837,12 @@ static struct boardobj *boardobjgrp_objgetnext_final( return pboardobjnext; } -static u32 boardobjgrp_objremoveanddestroy_final( +static int boardobjgrp_objremoveanddestroy_final( struct boardobjgrp *pboardobjgrp, u8 index) { - u32 status = 0; - u32 stat; + int status = 0; + int stat; struct gk20a *g = pboardobjgrp->g; nvgpu_log_info(g, " "); @@ -938,7 +940,7 @@ static void boardobjgrp_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, } } -static u32 boardobjgrp_pmucmdsend(struct gk20a *g, +static int boardobjgrp_pmucmdsend(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *pcmd) { @@ -947,7 +949,7 @@ static u32 boardobjgrp_pmucmdsend(struct gk20a *g, struct nv_pmu_boardobj_cmd_grp *pgrpcmd; struct pmu_cmd cmd; u32 seqdesc; - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -1009,7 +1011,7 @@ boardobjgrp_pmucmdsend_exit: return status; } -static u32 boardobjgrp_pmucmdsend_rpc(struct gk20a *g, +static int boardobjgrp_pmucmdsend_rpc(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *pcmd, bool copy_out) diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h index 8fc7136f..625e7912 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h @@ -40,13 +40,13 @@ struct pmu_surface; * Board Object Group destructor. * */ -typedef u32 boardobjgrp_destruct(struct boardobjgrp *pboardobjgrp); +typedef int boardobjgrp_destruct(struct boardobjgrp *pboardobjgrp); /* * Inserts a previously constructed Board Object into a Board Object Group for * tracking. Objects are inserted in the array based on the given index. */ -typedef u32 boardobjgrp_objinsert(struct boardobjgrp *pboardobjgrp, +typedef int boardobjgrp_objinsert(struct boardobjgrp *pboardobjgrp, struct boardobj *pboardobj, u8 index); /* @@ -68,7 +68,7 @@ typedef struct boardobj *boardobjgrp_objgetnext( * Board Object Group Remover and destructor. This is used to remove and * destruct specific entry from the Board Object Group. */ -typedef u32 boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp, +typedef int boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp, u8 index); /* @@ -76,14 +76,14 @@ typedef u32 boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp, * for the constructed PMU CMDs, and then sets the object via the * PMU_BOARDOBJ_CMD_GRP interface (if constructed). */ -typedef u32 boardobjgrp_pmuinithandle(struct gk20a *g, +typedef int boardobjgrp_pmuinithandle(struct gk20a *g, struct boardobjgrp *pboardobjGrp); /* * Fills out the appropriate the PMU_BOARDOBJGRP_ driver<->PMU description * header structure, more specifically a mask of BOARDOBJs. */ -typedef u32 boardobjgrp_pmuhdrdatainit(struct gk20a *g, +typedef int boardobjgrp_pmuhdrdatainit(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, struct boardobjgrpmask *mask); @@ -92,7 +92,7 @@ typedef u32 boardobjgrp_pmuhdrdatainit(struct gk20a *g, * Fills out the appropriate the PMU_BOARDOBJGRP_ driver->PMU description * structure, describing the BOARDOBJGRP and all of its BOARDOBJs to the PMU. */ -typedef u32 boardobjgrp_pmudatainit(struct gk20a *g, +typedef int boardobjgrp_pmudatainit(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu); @@ -101,22 +101,22 @@ typedef u32 boardobjgrp_pmudatainit(struct gk20a *g, * This interface leverages @ref boardobjgrp_pmudatainit to populate the * structure. */ -typedef u32 boardobjgrp_pmuset(struct gk20a *g, +typedef int boardobjgrp_pmuset(struct gk20a *g, struct boardobjgrp *pboardobjgrp); /* * Gets the dynamic status of the PMU BOARDOBJGRP via the * PMU_BOARDOBJ_CMD_GRP GET_STATUS interface. */ -typedef u32 boardobjgrp_pmugetstatus(struct gk20a *g, +typedef int boardobjgrp_pmugetstatus(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrpmask *mask); -typedef u32 boardobjgrp_pmudatainstget(struct gk20a *g, +typedef int boardobjgrp_pmudatainstget(struct gk20a *g, struct nv_pmu_boardobjgrp *boardobjgrppmu, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx); -typedef u32 boardobjgrp_pmustatusinstget(struct gk20a *g, void *pboardobjgrppmu, +typedef int boardobjgrp_pmustatusinstget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx); /* @@ -153,7 +153,7 @@ struct boardobjgrp_pmu { * CMD. This provides the various information describing the PMU CMD including * the CMD and MSG ID and the size of the various sturctures in the payload. */ -typedef u32 boardobjgrp_pmucmd_construct(struct gk20a *g, +typedef int boardobjgrp_pmucmd_construct(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id); @@ -161,7 +161,7 @@ typedef u32 boardobjgrp_pmucmd_construct(struct gk20a *g, /* * Destroys BOARDOBJGRP PMU SW state. CMD. */ -typedef u32 boardobjgrp_pmucmd_destroy(struct gk20a *g, +typedef int boardobjgrp_pmucmd_destroy(struct gk20a *g, struct boardobjgrp_pmu_cmd *cmd); /* @@ -169,7 +169,7 @@ typedef u32 boardobjgrp_pmucmd_destroy(struct gk20a *g, * PMU CMD payload within both the PMU and driver so that it can be referenced * at run-time. */ -typedef u32 boardobjgrp_pmucmd_pmuinithandle(struct gk20a *g, +typedef int boardobjgrp_pmucmd_pmuinithandle(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd); @@ -352,7 +352,8 @@ do { \ /* ------------------------ Function Prototypes ----------------------------- */ /* Constructor and destructor */ -u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp); +int boardobjgrp_construct_super(struct gk20a *g, + struct boardobjgrp *pboardobjgrp); boardobjgrp_destruct boardobjgrp_destruct_impl; boardobjgrp_destruct boardobjgrp_destruct_super; diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c index a7da8064..b26f8ecb 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c @@ -27,10 +27,10 @@ #include "boardobjgrp.h" #include "boardobjgrpmask.h" -u32 boardobjgrpconstruct_e255(struct gk20a *g, +int boardobjgrpconstruct_e255(struct gk20a *g, struct boardobjgrp_e255 *pboardobjgrp_e255) { - u32 status = 0; + int status = 0; u8 objslots; nvgpu_log_info(g, " "); @@ -58,14 +58,14 @@ boardobjgrpconstruct_e255_exit: return status; } -u32 boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, +int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, struct boardobjgrpmask *mask) { struct nv_pmu_boardobjgrp_e255 *pgrpe255 = (struct nv_pmu_boardobjgrp_e255 *)pboardobjgrppmu; - u32 status; + int status; nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h index 76aa902a..10cd95c6 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -43,7 +43,8 @@ struct boardobjgrp_e255 { boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) /* Constructor and destructor */ -u32 boardobjgrpconstruct_e255(struct gk20a *g, struct boardobjgrp_e255 *pboardobjgrp); +int boardobjgrpconstruct_e255(struct gk20a *g, + struct boardobjgrp_e255 *pboardobjgrp); boardobjgrp_destruct boardobjgrpdestruct_e255; boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e255; diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c index 60e5caf6..48322310 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c @@ -28,10 +28,10 @@ #include "boardobjgrpmask.h" -u32 boardobjgrpconstruct_e32(struct gk20a *g, +int boardobjgrpconstruct_e32(struct gk20a *g, struct boardobjgrp_e32 *pboardobjgrp_e32) { - u32 status; + int status; u8 objslots; nvgpu_log_info(g, " "); @@ -58,14 +58,14 @@ boardobjgrpconstruct_e32_exit: return status; } -u32 boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, +int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, struct boardobjgrpmask *mask) { struct nv_pmu_boardobjgrp_e32 *pgrpe32 = (struct nv_pmu_boardobjgrp_e32 *)pboardobjgrppmu; - u32 status; + int status; nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h index 97c737a5..900901bb 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -58,7 +58,8 @@ struct boardobjgrp_e32 { boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) /* Constructor and destructor */ -u32 boardobjgrpconstruct_e32(struct gk20a *g, struct boardobjgrp_e32 *pboardobjgrp); +int boardobjgrpconstruct_e32(struct gk20a *g, + struct boardobjgrp_e32 *pboardobjgrp); boardobjgrp_destruct boardobjgrpdestruct_e32; boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e32; diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c index c3f4f4a5..d957467b 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c @@ -221,7 +221,7 @@ u8 boardobjgrpmask_bitidxhighest(struct boardobjgrpmask *mask) return result; } -u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx) +int boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx) { u8 index; u8 offset; @@ -241,7 +241,7 @@ u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx) return 0; } -u32 boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx) +int boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx) { u8 index; u8 offset; diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h index aacabfe9..c081284a 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -83,8 +83,8 @@ u8 boardobjgrpmask_bitidxlowest(struct boardobjgrpmask *mask); u8 boardobjgrpmask_bitidxhighest(struct boardobjgrpmask *mask); /* Operations on a single bit of a single mask */ -u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx); -u32 boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx); +int boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx); +int boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx); u32 boardobjgrpmask_bitinv(struct boardobjgrpmask *mask, u8 bitidx); bool boardobjgrpmask_bitget(struct boardobjgrpmask *mask, u8 bitidx); diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c index 9f17d199..c0445e5c 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.c +++ b/drivers/gpu/nvgpu/clk/clk_domain.c @@ -33,10 +33,10 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs); -static u32 devinit_get_clocks_table(struct gk20a *g, +static int devinit_get_clocks_table(struct gk20a *g, struct clk_domains *pdomainobjs); -static u32 clk_domain_pmudatainit_super(struct gk20a *g, struct boardobj +static int clk_domain_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); static struct vbios_clocks_table_1x_hal_clock_entry @@ -120,7 +120,7 @@ static u32 clktranslatehalmumsettoapinumset(u32 clkhaldomains) return clkapidomains; } -static u32 _clk_domains_pmudatainit_3x(struct gk20a *g, +static int _clk_domains_pmudatainit_3x(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -128,7 +128,7 @@ static u32 _clk_domains_pmudatainit_3x(struct gk20a *g, (struct nv_pmu_clk_clk_domain_boardobjgrp_set_header *) pboardobjgrppmu; struct clk_domains *pdomains = (struct clk_domains *)pboardobjgrp; - u32 status = 0; + int status = 0; status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); if (status) { @@ -162,7 +162,7 @@ done: return status; } -static u32 _clk_domains_pmudata_instget(struct gk20a *g, +static int _clk_domains_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -185,9 +185,9 @@ static u32 _clk_domains_pmudata_instget(struct gk20a *g, return 0; } -u32 clk_domain_sw_setup(struct gk20a *g) +int clk_domain_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct clk_domains *pclkdomainobjs; struct clk_domain *pdomain; @@ -281,9 +281,9 @@ done: return status; } -u32 clk_domain_pmu_setup(struct gk20a *g) +int clk_domain_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -300,10 +300,10 @@ u32 clk_domain_pmu_setup(struct gk20a *g) return status; } -static u32 devinit_get_clocks_table(struct gk20a *g, +static int devinit_get_clocks_table(struct gk20a *g, struct clk_domains *pclkdomainobjs) { - u32 status = 0; + int status = 0; u8 *clocks_table_ptr = NULL; struct vbios_clocks_table_1x_header clocks_table_header = { 0 }; struct vbios_clocks_table_1x_entry clocks_table_entry = { 0 }; @@ -486,7 +486,7 @@ done: return status; } -static u32 clkdomainclkproglink_not_supported(struct gk20a *g, +static int clkdomainclkproglink_not_supported(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain) { @@ -520,13 +520,13 @@ static u32 clkdomaingetfpoints_stub( } -static u32 clk_domain_construct_super(struct gk20a *g, +static int clk_domain_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct clk_domain *pdomain; struct clk_domain *ptmpdomain = (struct clk_domain *)pargs; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pargs); @@ -557,11 +557,11 @@ static u32 clk_domain_construct_super(struct gk20a *g, return status; } -static u32 _clk_domain_pmudatainit_3x(struct gk20a *g, +static int _clk_domain_pmudatainit_3x(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_domain_3x *pclk_domain_3x; struct nv_pmu_clk_clk_domain_3x_boardobj_set *pset; @@ -581,7 +581,7 @@ static u32 _clk_domain_pmudatainit_3x(struct gk20a *g, return status; } -static u32 clk_domain_construct_3x(struct gk20a *g, +static int clk_domain_construct_3x(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -589,7 +589,7 @@ static u32 clk_domain_construct_3x(struct gk20a *g, struct clk_domain_3x *pdomain; struct clk_domain_3x *ptmpdomain = (struct clk_domain_3x *)pargs; - u32 status = 0; + int status = 0; ptmpobj->type_mask = BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X); status = clk_domain_construct_super(g, ppboardobj, @@ -608,11 +608,11 @@ static u32 clk_domain_construct_3x(struct gk20a *g, return status; } -static u32 clkdomainclkproglink_3x_prog(struct gk20a *g, +static int clkdomainclkproglink_3x_prog(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain) { - u32 status = 0; + int status = 0; struct clk_domain_3x_prog *p3xprog = (struct clk_domain_3x_prog *)pdomain; struct clk_prog *pprog = NULL; @@ -822,11 +822,11 @@ done: return status; } -static u32 _clk_domain_pmudatainit_3x_prog(struct gk20a *g, +static int _clk_domain_pmudatainit_3x_prog(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_domain_3x_prog *pclk_domain_3x_prog; struct nv_pmu_clk_clk_domain_3x_prog_boardobj_set *pset; struct clk_domains *pdomains = &(g->clk_pmu.clk_domainobjs); @@ -860,7 +860,7 @@ static u32 _clk_domain_pmudatainit_3x_prog(struct gk20a *g, return status; } -static u32 clk_domain_construct_3x_prog(struct gk20a *g, +static int clk_domain_construct_3x_prog(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -868,7 +868,7 @@ static u32 clk_domain_construct_3x_prog(struct gk20a *g, struct clk_domain_3x_prog *pdomain; struct clk_domain_3x_prog *ptmpdomain = (struct clk_domain_3x_prog *)pargs; - u32 status = 0; + int status = 0; ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X_PROG); status = clk_domain_construct_3x(g, ppboardobj, size, pargs); @@ -905,11 +905,11 @@ static u32 clk_domain_construct_3x_prog(struct gk20a *g, return status; } -static u32 _clk_domain_pmudatainit_3x_slave(struct gk20a *g, +static int _clk_domain_pmudatainit_3x_slave(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_domain_3x_slave *pclk_domain_3x_slave; struct nv_pmu_clk_clk_domain_3x_slave_boardobj_set *pset; @@ -930,7 +930,7 @@ static u32 _clk_domain_pmudatainit_3x_slave(struct gk20a *g, return status; } -static u32 clk_domain_construct_3x_slave(struct gk20a *g, +static int clk_domain_construct_3x_slave(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -938,7 +938,7 @@ static u32 clk_domain_construct_3x_slave(struct gk20a *g, struct clk_domain_3x_slave *pdomain; struct clk_domain_3x_slave *ptmpdomain = (struct clk_domain_3x_slave *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE) { return -EINVAL; @@ -963,11 +963,11 @@ static u32 clk_domain_construct_3x_slave(struct gk20a *g, return status; } -static u32 clkdomainclkproglink_3x_master(struct gk20a *g, +static int clkdomainclkproglink_3x_master(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain) { - u32 status = 0; + int status = 0; struct clk_domain_3x_master *p3xmaster = (struct clk_domain_3x_master *)pdomain; struct clk_prog *pprog = NULL; @@ -1007,11 +1007,11 @@ done: return status; } -static u32 _clk_domain_pmudatainit_3x_master(struct gk20a *g, +static int _clk_domain_pmudatainit_3x_master(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_domain_3x_master *pclk_domain_3x_master; struct nv_pmu_clk_clk_domain_3x_master_boardobj_set *pset; @@ -1032,13 +1032,13 @@ static u32 _clk_domain_pmudatainit_3x_master(struct gk20a *g, return status; } -static u32 clk_domain_construct_3x_master(struct gk20a *g, +static int clk_domain_construct_3x_master(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *ptmpobj = (struct boardobj *)pargs; struct clk_domain_3x_master *pdomain; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_MASTER) { return -EINVAL; @@ -1062,7 +1062,7 @@ static u32 clk_domain_construct_3x_master(struct gk20a *g, return status; } -static u32 clkdomainclkproglink_fixed(struct gk20a *g, +static int clkdomainclkproglink_fixed(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain) { @@ -1070,11 +1070,11 @@ static u32 clkdomainclkproglink_fixed(struct gk20a *g, return 0; } -static u32 _clk_domain_pmudatainit_3x_fixed(struct gk20a *g, +static int _clk_domain_pmudatainit_3x_fixed(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_domain_3x_fixed *pclk_domain_3x_fixed; struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set *pset; @@ -1095,7 +1095,7 @@ static u32 _clk_domain_pmudatainit_3x_fixed(struct gk20a *g, return status; } -static u32 clk_domain_construct_3x_fixed(struct gk20a *g, +static int clk_domain_construct_3x_fixed(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -1103,7 +1103,7 @@ static u32 clk_domain_construct_3x_fixed(struct gk20a *g, struct clk_domain_3x_fixed *pdomain; struct clk_domain_3x_fixed *ptmpdomain = (struct clk_domain_3x_fixed *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED) { return -EINVAL; @@ -1163,11 +1163,11 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs) return (struct clk_domain *)board_obj_ptr; } -static u32 clk_domain_pmudatainit_super(struct gk20a *g, +static int clk_domain_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_domain *pclk_domain; struct nv_pmu_clk_clk_domain_boardobj_set *pset; @@ -1189,9 +1189,9 @@ static u32 clk_domain_pmudatainit_super(struct gk20a *g, return status; } -u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk) +int clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk) { - u32 status = 0; + int status = 0; struct clk_domain *pdomain; u8 i; diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index 4441e7a1..d0170339 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h @@ -38,10 +38,10 @@ struct clk_domain; enum nv_pmu_clk_clkwhich; /*data and function definition to talk to driver*/ -u32 clk_domain_sw_setup(struct gk20a *g); -u32 clk_domain_pmu_setup(struct gk20a *g); +int clk_domain_sw_setup(struct gk20a *g); +int clk_domain_pmu_setup(struct gk20a *g); -typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, +typedef int clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, struct clk_domain *pdomain); typedef int clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, @@ -123,7 +123,7 @@ struct clk_domain_3x_slave { clkgetslaveclk *clkdomainclkgetslaveclk; }; -u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); +int clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); #define CLK_CLK_DOMAIN_GET(pclk, idx) \ ((struct clk_domain *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ diff --git a/drivers/gpu/nvgpu/clk/clk_fll.c b/drivers/gpu/nvgpu/clk/clk_fll.c index 0fd9c33f..700aeb2d 100644 --- a/drivers/gpu/nvgpu/clk/clk_fll.c +++ b/drivers/gpu/nvgpu/clk/clk_fll.c @@ -31,15 +31,15 @@ #include "ctrl/ctrlclk.h" #include "ctrl/ctrlvolt.h" -static u32 devinit_get_fll_device_table(struct gk20a *g, +static int devinit_get_fll_device_table(struct gk20a *g, struct avfsfllobjs *pfllobjs); static struct fll_device *construct_fll_device(struct gk20a *g, void *pargs); -static u32 fll_device_init_pmudata_super(struct gk20a *g, +static int fll_device_init_pmudata_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); -static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, +static int _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -48,7 +48,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, pboardobjgrppmu; struct avfsfllobjs *pfll_objs = (struct avfsfllobjs *) pboardobjgrp; - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -71,7 +71,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, return status; } -static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g, +static int _clk_fll_devgrp_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -94,7 +94,7 @@ static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g, return 0; } -static u32 _clk_fll_devgrp_pmustatus_instget(struct gk20a *g, +static int _clk_fll_devgrp_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) @@ -114,9 +114,9 @@ static u32 _clk_fll_devgrp_pmustatus_instget(struct gk20a *g, return 0; } -u32 clk_fll_sw_setup(struct gk20a *g) +int clk_fll_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct avfsfllobjs *pfllobjs; struct fll_device *pfll; @@ -209,9 +209,9 @@ done: return status; } -u32 clk_fll_pmu_setup(struct gk20a *g) +int clk_fll_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -228,10 +228,10 @@ u32 clk_fll_pmu_setup(struct gk20a *g) return status; } -static u32 devinit_get_fll_device_table(struct gk20a *g, +static int devinit_get_fll_device_table(struct gk20a *g, struct avfsfllobjs *pfllobjs) { - u32 status = 0; + int status = 0; u8 *fll_table_ptr = NULL; struct fll_descriptor_header fll_desc_table_header_sz = { 0 }; struct fll_descriptor_header_10 fll_desc_table_header = { 0 }; @@ -411,7 +411,7 @@ static struct fll_device *construct_fll_device(struct gk20a *g, struct boardobj *board_obj_ptr = NULL; struct fll_device *pfll_dev; struct fll_device *board_obj_fll_ptr = NULL; - u32 status; + int status; nvgpu_log_info(g, " "); status = boardobj_construct_super(g, &board_obj_ptr, @@ -449,11 +449,11 @@ static struct fll_device *construct_fll_device(struct gk20a *g, return (struct fll_device *)board_obj_ptr; } -static u32 fll_device_init_pmudata_super(struct gk20a *g, +static int fll_device_init_pmudata_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct fll_device *pfll_dev; struct nv_pmu_clk_clk_fll_device_boardobj_set *perf_pmu_data; diff --git a/drivers/gpu/nvgpu/clk/clk_fll.h b/drivers/gpu/nvgpu/clk/clk_fll.h index 79ecf5e1..7f7cad97 100644 --- a/drivers/gpu/nvgpu/clk/clk_fll.h +++ b/drivers/gpu/nvgpu/clk/clk_fll.h @@ -28,8 +28,8 @@ #include "boardobj/boardobjgrpmask.h" /*data and function definition to talk to driver*/ -u32 clk_fll_sw_setup(struct gk20a *g); -u32 clk_fll_pmu_setup(struct gk20a *g); +int clk_fll_sw_setup(struct gk20a *g); +int clk_fll_pmu_setup(struct gk20a *g); struct avfsfllobjs { struct boardobjgrp_e32 super; @@ -79,4 +79,3 @@ u32 nvgpu_clk_get_vbios_clk_domain_gp10x( u32 vbios_domain); (pclk->avfs_fllobjs.lut_step_size_uv) #endif - diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/clk/clk_freq_controller.c index aa2a3a54..f114f5d5 100644 --- a/drivers/gpu/nvgpu/clk/clk_freq_controller.c +++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.c @@ -32,13 +32,13 @@ #include "ctrl/ctrlclk.h" #include "ctrl/ctrlvolt.h" -static u32 clk_freq_controller_pmudatainit_super(struct gk20a *g, +static int clk_freq_controller_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { struct nv_pmu_clk_clk_freq_controller_boardobj_set *pfreq_cntlr_set; struct clk_freq_controller *pfreq_cntlr; - u32 status = 0; + int status = 0; status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); if (status) { @@ -63,14 +63,14 @@ static u32 clk_freq_controller_pmudatainit_super(struct gk20a *g, return status; } -static u32 clk_freq_controller_pmudatainit_pi(struct gk20a *g, +static int clk_freq_controller_pmudatainit_pi(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { struct nv_pmu_clk_clk_freq_controller_pi_boardobj_set *pfreq_cntlr_pi_set; struct clk_freq_controller_pi *pfreq_cntlr_pi; - u32 status = 0; + int status = 0; status = clk_freq_controller_pmudatainit_super(g, board_obj_ptr, ppmudata); @@ -94,13 +94,13 @@ static u32 clk_freq_controller_pmudatainit_pi(struct gk20a *g, return status; } -static u32 clk_freq_controller_construct_super(struct gk20a *g, +static int clk_freq_controller_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct clk_freq_controller *pfreq_cntlr = NULL; struct clk_freq_controller *pfreq_cntlr_tmp = NULL; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pargs); if (status) { @@ -125,13 +125,13 @@ static u32 clk_freq_controller_construct_super(struct gk20a *g, return status; } -static u32 clk_freq_controller_construct_pi(struct gk20a *g, +static int clk_freq_controller_construct_pi(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct clk_freq_controller_pi *pfreq_cntlr_pi = NULL; struct clk_freq_controller_pi *pfreq_cntlr_pi_tmp = NULL; - u32 status = 0; + int status = 0; status = clk_freq_controller_construct_super(g, ppboardobj, size, pargs); @@ -161,7 +161,7 @@ static struct clk_freq_controller *clk_clk_freq_controller_construct( void *pargs) { struct boardobj *board_obj_ptr = NULL; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_FREQ_CONTROLLER_TYPE_PI) { return NULL; @@ -177,10 +177,10 @@ static struct clk_freq_controller *clk_clk_freq_controller_construct( } -static u32 clk_get_freq_controller_table(struct gk20a *g, +static int clk_get_freq_controller_table(struct gk20a *g, struct clk_freq_controllers *pclk_freq_controllers) { - u32 status = 0; + int status = 0; u8 *pfreq_controller_table_ptr = NULL; struct vbios_fct_1x_header header = { 0 }; struct vbios_fct_1x_entry entry = { 0 }; @@ -324,9 +324,9 @@ done: return status; } -u32 clk_freq_controller_pmu_setup(struct gk20a *g) +int clk_freq_controller_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -343,7 +343,7 @@ u32 clk_freq_controller_pmu_setup(struct gk20a *g) return status; } -static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, +static int _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -366,7 +366,7 @@ static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, return 0; } -static u32 _clk_freq_controllers_pmudatainit(struct gk20a *g, +static int _clk_freq_controllers_pmudatainit(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -375,7 +375,7 @@ static u32 _clk_freq_controllers_pmudatainit(struct gk20a *g, pboardobjgrppmu; struct clk_freq_controllers *pcntrs = (struct clk_freq_controllers *)pboardobjgrp; - u32 status = 0; + int status = 0; status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); if (status) { @@ -391,9 +391,9 @@ done: return status; } -u32 clk_freq_controller_sw_setup(struct gk20a *g) +int clk_freq_controller_sw_setup(struct gk20a *g) { - u32 status = 0; + int status = 0; struct boardobjgrp *pboardobjgrp = NULL; struct clk_freq_controllers *pclk_freq_controllers; struct avfsfllobjs *pfllobjs = &(g->clk_pmu.avfs_fllobjs); diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.h b/drivers/gpu/nvgpu/clk/clk_freq_controller.h index 1b8a24c9..659b75d5 100644 --- a/drivers/gpu/nvgpu/clk/clk_freq_controller.h +++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -78,7 +78,7 @@ struct clk_freq_controllers { void *pprereq_load; }; -u32 clk_freq_controller_sw_setup(struct gk20a *g); -u32 clk_freq_controller_pmu_setup(struct gk20a *g); +int clk_freq_controller_sw_setup(struct gk20a *g); +int clk_freq_controller_pmu_setup(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c index 5966d64a..ae8f8e01 100644 --- a/drivers/gpu/nvgpu/clk/clk_prog.c +++ b/drivers/gpu/nvgpu/clk/clk_prog.c @@ -34,14 +34,14 @@ #include "ctrl/ctrlvolt.h" static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs); -static u32 devinit_get_clk_prog_table(struct gk20a *g, +static int devinit_get_clk_prog_table(struct gk20a *g, struct clk_progs *pprogobjs); static vf_flatten vfflatten_prog_1x_master; static vf_lookup vflookup_prog_1x_master; static get_fpoints getfpoints_prog_1x_master; static get_slaveclk getslaveclk_prog_1x_master; -static u32 _clk_progs_pmudatainit(struct gk20a *g, +static int _clk_progs_pmudatainit(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -64,7 +64,7 @@ done: return status; } -static u32 _clk_progs_pmudata_instget(struct gk20a *g, +static int _clk_progs_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -86,9 +86,9 @@ static u32 _clk_progs_pmudata_instget(struct gk20a *g, return 0; } -u32 clk_prog_sw_setup(struct gk20a *g) +int clk_prog_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct clk_progs *pclkprogobjs; @@ -136,9 +136,9 @@ done: return status; } -u32 clk_prog_pmu_setup(struct gk20a *g) +int clk_prog_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -155,10 +155,10 @@ u32 clk_prog_pmu_setup(struct gk20a *g) return status; } -static u32 devinit_get_clk_prog_table(struct gk20a *g, +static int devinit_get_clk_prog_table(struct gk20a *g, struct clk_progs *pclkprogobjs) { - u32 status = 0; + int status = 0; u8 *clkprogs_tbl_ptr = NULL; struct vbios_clock_programming_table_1x_header header = { 0 }; struct vbios_clock_programming_table_1x_entry prog = { 0 }; @@ -379,11 +379,11 @@ done: return status; } -static u32 _clk_prog_pmudatainit_super(struct gk20a *g, +static int _clk_prog_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -391,11 +391,11 @@ static u32 _clk_prog_pmudatainit_super(struct gk20a *g, return status; } -static u32 _clk_prog_pmudatainit_1x(struct gk20a *g, +static int _clk_prog_pmudatainit_1x(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_prog_1x *pclk_prog_1x; struct nv_pmu_clk_clk_prog_1x_boardobj_set *pset; @@ -418,11 +418,11 @@ static u32 _clk_prog_pmudatainit_1x(struct gk20a *g, return status; } -static u32 _clk_prog_pmudatainit_1x_master(struct gk20a *g, +static int _clk_prog_pmudatainit_1x_master(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_prog_1x_master *pclk_prog_1x_master; struct nv_pmu_clk_clk_prog_1x_master_boardobj_set *pset; u32 vfsize = sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * @@ -449,11 +449,11 @@ static u32 _clk_prog_pmudatainit_1x_master(struct gk20a *g, return status; } -static u32 _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g, +static int _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_prog_1x_master_ratio *pclk_prog_1x_master_ratio; struct nv_pmu_clk_clk_prog_1x_master_ratio_boardobj_set *pset; u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * @@ -478,11 +478,11 @@ static u32 _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g, return status; } -static u32 _clk_prog_pmudatainit_1x_master_table(struct gk20a *g, +static int _clk_prog_pmudatainit_1x_master_table(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_prog_1x_master_table *pclk_prog_1x_master_table; struct nv_pmu_clk_clk_prog_1x_master_table_boardobj_set *pset; u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * @@ -538,12 +538,12 @@ done: return status; } -static u32 clk_prog_construct_super(struct gk20a *g, +static int clk_prog_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct clk_prog *pclkprog; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pargs); @@ -559,7 +559,7 @@ static u32 clk_prog_construct_super(struct gk20a *g, } -static u32 clk_prog_construct_1x(struct gk20a *g, +static int clk_prog_construct_1x(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -567,7 +567,7 @@ static u32 clk_prog_construct_1x(struct gk20a *g, struct clk_prog_1x *pclkprog; struct clk_prog_1x *ptmpprog = (struct clk_prog_1x *)pargs; - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X); @@ -588,7 +588,7 @@ static u32 clk_prog_construct_1x(struct gk20a *g, return status; } -static u32 clk_prog_construct_1x_master(struct gk20a *g, +static int clk_prog_construct_1x_master(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -596,7 +596,7 @@ static u32 clk_prog_construct_1x_master(struct gk20a *g, struct clk_prog_1x_master *pclkprog; struct clk_prog_1x_master *ptmpprog = (struct clk_prog_1x_master *)pargs; - u32 status = 0; + int status = 0; u32 vfsize = sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * g->clk_pmu.clk_progobjs.vf_entry_count; u8 railidx; @@ -645,7 +645,7 @@ static u32 clk_prog_construct_1x_master(struct gk20a *g, return status; } -static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g, +static int clk_prog_construct_1x_master_ratio(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -653,7 +653,7 @@ static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g, struct clk_prog_1x_master_ratio *pclkprog; struct clk_prog_1x_master_ratio *ptmpprog = (struct clk_prog_1x_master_ratio *)pargs; - u32 status = 0; + int status = 0; u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * g->clk_pmu.clk_progobjs.slave_entry_count; @@ -687,7 +687,7 @@ static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g, return status; } -static u32 clk_prog_construct_1x_master_table(struct gk20a *g, +static int clk_prog_construct_1x_master_table(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -695,7 +695,7 @@ static u32 clk_prog_construct_1x_master_table(struct gk20a *g, struct clk_prog_1x_master_table *pclkprog; struct clk_prog_1x_master_table *ptmpprog = (struct clk_prog_1x_master_table *)pargs; - u32 status = 0; + int status = 0; u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * g->clk_pmu.clk_progobjs.slave_entry_count; @@ -741,7 +741,7 @@ exit: static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs)); switch (BOARDOBJ_GET_TYPE(pargs)) { diff --git a/drivers/gpu/nvgpu/clk/clk_prog.h b/drivers/gpu/nvgpu/clk/clk_prog.h index 64cb1b51..cabe0bf0 100644 --- a/drivers/gpu/nvgpu/clk/clk_prog.h +++ b/drivers/gpu/nvgpu/clk/clk_prog.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -29,8 +29,8 @@ #include "boardobj/boardobjgrp_e255.h" #include "boardobj/boardobjgrpmask.h" -u32 clk_prog_sw_setup(struct gk20a *g); -u32 clk_prog_pmu_setup(struct gk20a *g); +int clk_prog_sw_setup(struct gk20a *g); +int clk_prog_pmu_setup(struct gk20a *g); struct clk_prog_1x_master; typedef u32 vf_flatten(struct gk20a *g, struct clk_pmupstate *pclk, diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.c b/drivers/gpu/nvgpu/clk/clk_vf_point.c index 5fc1d8e5..80eefe96 100644 --- a/drivers/gpu/nvgpu/clk/clk_vf_point.c +++ b/drivers/gpu/nvgpu/clk/clk_vf_point.c @@ -29,10 +29,10 @@ #include "ctrl/ctrlclk.h" #include "ctrl/ctrlvolt.h" -static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g, struct boardobj +static int _clk_vf_point_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); -static u32 _clk_vf_points_pmudatainit(struct gk20a *g, +static int _clk_vf_points_pmudatainit(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -50,7 +50,7 @@ done: return status; } -static u32 _clk_vf_points_pmudata_instget(struct gk20a *g, +static int _clk_vf_points_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -72,7 +72,7 @@ static u32 _clk_vf_points_pmudata_instget(struct gk20a *g, return 0; } -static u32 _clk_vf_points_pmustatus_instget(struct gk20a *g, +static int _clk_vf_points_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) @@ -91,9 +91,9 @@ static u32 _clk_vf_points_pmustatus_instget(struct gk20a *g, return 0; } -u32 clk_vf_point_sw_setup(struct gk20a *g) +int clk_vf_point_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -138,9 +138,9 @@ done: return status; } -u32 clk_vf_point_pmu_setup(struct gk20a *g) +int clk_vf_point_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -157,14 +157,14 @@ u32 clk_vf_point_pmu_setup(struct gk20a *g) return status; } -static u32 clk_vf_point_construct_super(struct gk20a *g, +static int clk_vf_point_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct clk_vf_point *pclkvfpoint; struct clk_vf_point *ptmpvfpoint = (struct clk_vf_point *)pargs; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pargs); @@ -183,11 +183,11 @@ static u32 clk_vf_point_construct_super(struct gk20a *g, return status; } -static u32 _clk_vf_point_pmudatainit_volt(struct gk20a *g, +static int _clk_vf_point_pmudatainit_volt(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_vf_point_volt *pclk_vf_point_volt; struct nv_pmu_clk_clk_vf_point_volt_boardobj_set *pset; @@ -211,11 +211,11 @@ static u32 _clk_vf_point_pmudatainit_volt(struct gk20a *g, return status; } -static u32 _clk_vf_point_pmudatainit_freq(struct gk20a *g, +static int _clk_vf_point_pmudatainit_freq(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_vf_point_freq *pclk_vf_point_freq; struct nv_pmu_clk_clk_vf_point_freq_boardobj_set *pset; @@ -240,7 +240,7 @@ static u32 _clk_vf_point_pmudatainit_freq(struct gk20a *g, return status; } -static u32 clk_vf_point_construct_volt(struct gk20a *g, +static int clk_vf_point_construct_volt(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -248,7 +248,7 @@ static u32 clk_vf_point_construct_volt(struct gk20a *g, struct clk_vf_point_volt *pclkvfpoint; struct clk_vf_point_volt *ptmpvfpoint = (struct clk_vf_point_volt *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_VOLT) { return -EINVAL; @@ -271,7 +271,7 @@ static u32 clk_vf_point_construct_volt(struct gk20a *g, return status; } -static u32 clk_vf_point_construct_freq(struct gk20a *g, +static int clk_vf_point_construct_freq(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -279,7 +279,7 @@ static u32 clk_vf_point_construct_freq(struct gk20a *g, struct clk_vf_point_freq *pclkvfpoint; struct clk_vf_point_freq *ptmpvfpoint = (struct clk_vf_point_freq *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_FREQ) { return -EINVAL; @@ -305,7 +305,7 @@ static u32 clk_vf_point_construct_freq(struct gk20a *g, struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; nvgpu_log_info(g, " "); switch (BOARDOBJ_GET_TYPE(pargs)) { @@ -332,11 +332,11 @@ struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs) return (struct clk_vf_point *)board_obj_ptr; } -static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g, +static int _clk_vf_point_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct clk_vf_point *pclk_vf_point; struct nv_pmu_clk_clk_vf_point_boardobj_set *pset; @@ -360,7 +360,7 @@ static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g, } -static u32 clk_vf_point_update(struct gk20a *g, +static int clk_vf_point_update(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { @@ -388,7 +388,7 @@ static u32 clk_vf_point_update(struct gk20a *g, } /*get latest vf point data from PMU */ -u32 clk_vf_point_cache(struct gk20a *g) +int clk_vf_point_cache(struct gk20a *g) { struct clk_vf_points *pclk_vf_points; @@ -397,7 +397,7 @@ u32 clk_vf_point_cache(struct gk20a *g) struct nv_pmu_boardobjgrp_super *pboardobjgrppmu; struct boardobj *pboardobj = NULL; struct nv_pmu_boardobj_query *pboardobjpmustatus = NULL; - u32 status; + int status; u8 index; nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.h b/drivers/gpu/nvgpu/clk/clk_vf_point.h index b67434b7..a4e2f48f 100644 --- a/drivers/gpu/nvgpu/clk/clk_vf_point.h +++ b/drivers/gpu/nvgpu/clk/clk_vf_point.h @@ -28,9 +28,9 @@ #include "boardobj/boardobjgrp_e32.h" #include "boardobj/boardobjgrpmask.h" -u32 clk_vf_point_sw_setup(struct gk20a *g); -u32 clk_vf_point_pmu_setup(struct gk20a *g); -u32 clk_vf_point_cache(struct gk20a *g); +int clk_vf_point_sw_setup(struct gk20a *g); +int clk_vf_point_pmu_setup(struct gk20a *g); +int clk_vf_point_cache(struct gk20a *g); struct clk_vf_points { struct boardobjgrp_e255 super; diff --git a/drivers/gpu/nvgpu/clk/clk_vin.c b/drivers/gpu/nvgpu/clk/clk_vin.c index 1c18b662..9a163594 100644 --- a/drivers/gpu/nvgpu/clk/clk_vin.c +++ b/drivers/gpu/nvgpu/clk/clk_vin.c @@ -36,27 +36,27 @@ #include "clk.h" #include "clk_vin.h" -static u32 devinit_get_vin_device_table(struct gk20a *g, +static int devinit_get_vin_device_table(struct gk20a *g, struct avfsvinobjs *pvinobjs); -static u32 vin_device_construct_v10(struct gk20a *g, +static int vin_device_construct_v10(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs); -static u32 vin_device_construct_v20(struct gk20a *g, +static int vin_device_construct_v20(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs); -static u32 vin_device_construct_super(struct gk20a *g, +static int vin_device_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs); static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs); -static u32 vin_device_init_pmudata_v10(struct gk20a *g, +static int vin_device_init_pmudata_v10(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); -static u32 vin_device_init_pmudata_v20(struct gk20a *g, +static int vin_device_init_pmudata_v20(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); -static u32 vin_device_init_pmudata_super(struct gk20a *g, +static int vin_device_init_pmudata_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); @@ -122,7 +122,7 @@ u32 clk_avfs_get_vin_cal_fuse_v20(struct gk20a *g, } -static u32 _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, +static int _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -130,7 +130,7 @@ static u32 _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, (struct nv_pmu_clk_clk_vin_device_boardobjgrp_set_header *) pboardobjgrppmu; struct avfsvinobjs *pvin_obbj = (struct avfsvinobjs *)pboardobjgrp; - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -142,7 +142,7 @@ static u32 _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, return status; } -static u32 _clk_vin_devgrp_pmudata_instget(struct gk20a *g, +static int _clk_vin_devgrp_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -165,7 +165,7 @@ static u32 _clk_vin_devgrp_pmudata_instget(struct gk20a *g, return 0; } -static u32 _clk_vin_devgrp_pmustatus_instget(struct gk20a *g, +static int _clk_vin_devgrp_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) @@ -185,9 +185,9 @@ static u32 _clk_vin_devgrp_pmustatus_instget(struct gk20a *g, return 0; } -u32 clk_vin_sw_setup(struct gk20a *g) +int clk_vin_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct vin_device_v20 *pvindev = NULL; struct avfsvinobjs *pvinobjs; @@ -243,9 +243,9 @@ done: return status; } -u32 clk_vin_pmu_setup(struct gk20a *g) +int clk_vin_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -262,10 +262,10 @@ u32 clk_vin_pmu_setup(struct gk20a *g) return status; } -static u32 devinit_get_vin_device_table(struct gk20a *g, +static int devinit_get_vin_device_table(struct gk20a *g, struct avfsvinobjs *pvinobjs) { - u32 status = 0; + int status = 0; u8 *vin_table_ptr = NULL; struct vin_descriptor_header_10 vin_desc_table_header = { 0 }; struct vin_descriptor_entry_10 vin_desc_table_entry = { 0 }; @@ -376,14 +376,14 @@ done: return status; } -static u32 vin_device_construct_v10(struct gk20a *g, +static int vin_device_construct_v10(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *ptmpobj = (struct boardobj *)pargs; struct vin_device_v10 *pvin_device_v10; struct vin_device_v10 *ptmpvin_device_v10 = (struct vin_device_v10 *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V10) { return -EINVAL; @@ -406,14 +406,14 @@ static u32 vin_device_construct_v10(struct gk20a *g, return status; } -static u32 vin_device_construct_v20(struct gk20a *g, +static int vin_device_construct_v20(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *ptmpobj = (struct boardobj *)pargs; struct vin_device_v20 *pvin_device_v20; struct vin_device_v20 *ptmpvin_device_v20 = (struct vin_device_v20 *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V20) { return -EINVAL; @@ -435,13 +435,13 @@ static u32 vin_device_construct_v20(struct gk20a *g, return status; } -static u32 vin_device_construct_super(struct gk20a *g, +static int vin_device_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct vin_device *pvin_device; struct vin_device *ptmpvin_device = (struct vin_device *)pargs; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pargs); if (status) { @@ -463,7 +463,7 @@ static u32 vin_device_construct_super(struct gk20a *g, static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; nvgpu_log_info(g, " %d", BOARDOBJ_GET_TYPE(pargs)); switch (BOARDOBJ_GET_TYPE(pargs)) { @@ -492,11 +492,11 @@ static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs) -static u32 vin_device_init_pmudata_v10(struct gk20a *g, +static int vin_device_init_pmudata_v10(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vin_device_v20 *pvin_dev_v20; struct nv_pmu_clk_clk_vin_device_v10_boardobj_set *perf_pmu_data; @@ -519,11 +519,11 @@ static u32 vin_device_init_pmudata_v10(struct gk20a *g, return status; } -static u32 vin_device_init_pmudata_v20(struct gk20a *g, +static int vin_device_init_pmudata_v20(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vin_device_v20 *pvin_dev_v20; struct nv_pmu_clk_clk_vin_device_v20_boardobj_set *perf_pmu_data; @@ -546,11 +546,11 @@ static u32 vin_device_init_pmudata_v20(struct gk20a *g, return status; } -static u32 vin_device_init_pmudata_super(struct gk20a *g, +static int vin_device_init_pmudata_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vin_device *pvin_dev; struct nv_pmu_clk_clk_vin_device_boardobj_set *perf_pmu_data; diff --git a/drivers/gpu/nvgpu/clk/clk_vin.h b/drivers/gpu/nvgpu/clk/clk_vin.h index 209e7055..9396c848 100644 --- a/drivers/gpu/nvgpu/clk/clk_vin.h +++ b/drivers/gpu/nvgpu/clk/clk_vin.h @@ -67,8 +67,8 @@ struct vin_device_v20 { boardobj_construct construct_vindevice; boardobj_pmudatainit vindeviceinit_pmudata_super; -u32 clk_vin_sw_setup(struct gk20a *g); -u32 clk_vin_pmu_setup(struct gk20a *g); +int clk_vin_sw_setup(struct gk20a *g); +int clk_vin_pmu_setup(struct gk20a *g); u32 clk_avfs_get_vin_cal_fuse_v10(struct gk20a *g, struct avfsvinobjs *pvinobjs, struct vin_device_v20 *pvindev); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2b8e8b0a..c98fec48 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -850,14 +850,15 @@ struct gpu_ops { void (*pg_cmd_eng_buf_load_set_dma_idx)(struct pmu_pg_cmd *pg, u8 value); struct { - u32 (*boardobjgrp_pmucmd_construct_impl)(struct gk20a *g, + int (*boardobjgrp_pmucmd_construct_impl) + (struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id); - u32 (*boardobjgrp_pmuset_impl)(struct gk20a *g, + int (*boardobjgrp_pmuset_impl)(struct gk20a *g, struct boardobjgrp *pboardobjgrp); - u32 (*boardobjgrp_pmugetstatus_impl)(struct gk20a *g, + int (*boardobjgrp_pmugetstatus_impl)(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrpmask *mask); int (*is_boardobjgrp_pmucmd_id_valid)(struct gk20a *g, diff --git a/drivers/gpu/nvgpu/perf/vfe_equ.c b/drivers/gpu/nvgpu/perf/vfe_equ.c index fa742c35..fdeee9a7 100644 --- a/drivers/gpu/nvgpu/perf/vfe_equ.c +++ b/drivers/gpu/nvgpu/perf/vfe_equ.c @@ -31,14 +31,14 @@ #include "ctrl/ctrlvolt.h" static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs); -static u32 devinit_get_vfe_equ_table(struct gk20a *g, +static int devinit_get_vfe_equ_table(struct gk20a *g, struct vfe_equs *pequobjs); -static u32 _vfe_equs_pmudatainit(struct gk20a *g, +static int _vfe_equs_pmudatainit(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { - u32 status = 0; + int status = 0; status = boardobjgrp_pmudatainit_e255(g, pboardobjgrp, pboardobjgrppmu); if (status) { @@ -51,7 +51,7 @@ done: return status; } -static u32 _vfe_equs_pmudata_instget(struct gk20a *g, +static int _vfe_equs_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -71,9 +71,9 @@ static u32 _vfe_equs_pmudata_instget(struct gk20a *g, return 0; } -u32 vfe_equ_sw_setup(struct gk20a *g) +int vfe_equ_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct vfe_equs *pvfeequobjs; @@ -113,9 +113,9 @@ done: return status; } -u32 vfe_equ_pmu_setup(struct gk20a *g) +int vfe_equ_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -131,10 +131,10 @@ u32 vfe_equ_pmu_setup(struct gk20a *g) return status; } -static u32 devinit_get_vfe_equ_table(struct gk20a *g, +static int devinit_get_vfe_equ_table(struct gk20a *g, struct vfe_equs *pvfeequobjs) { - u32 status = 0; + int status = 0; u8 *vfeequs_tbl_ptr = NULL; struct vbios_vfe_3x_header_struct vfeequs_tbl_header = { 0 }; struct vbios_vfe_3x_equ_entry_struct equ = { 0 }; @@ -329,7 +329,7 @@ done: return status; } -static u32 _vfe_equ_pmudatainit_super(struct gk20a *g, +static int _vfe_equ_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { @@ -357,13 +357,13 @@ static u32 _vfe_equ_pmudatainit_super(struct gk20a *g, return status; } -static u32 vfe_equ_construct_super(struct gk20a *g, +static int vfe_equ_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct vfe_equ *pvfeequ; struct vfe_equ *ptmpequ = (struct vfe_equ *)pargs; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pargs); @@ -384,11 +384,11 @@ static u32 vfe_equ_construct_super(struct gk20a *g, return status; } -static u32 _vfe_equ_pmudatainit_compare(struct gk20a *g, +static int _vfe_equ_pmudatainit_compare(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_equ_compare *pvfe_equ_compare; struct nv_pmu_vfe_equ_compare *pset; @@ -411,7 +411,7 @@ static u32 _vfe_equ_pmudatainit_compare(struct gk20a *g, } -static u32 vfe_equ_construct_compare(struct gk20a *g, +static int vfe_equ_construct_compare(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -419,7 +419,7 @@ static u32 vfe_equ_construct_compare(struct gk20a *g, struct vfe_equ_compare *pvfeequ; struct vfe_equ_compare *ptmpequ = (struct vfe_equ_compare *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_COMPARE) return -EINVAL; @@ -443,11 +443,11 @@ static u32 vfe_equ_construct_compare(struct gk20a *g, return status; } -static u32 _vfe_equ_pmudatainit_minmax(struct gk20a *g, +static int _vfe_equ_pmudatainit_minmax(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_equ_minmax *pvfe_equ_minmax; struct nv_pmu_vfe_equ_minmax *pset; @@ -469,7 +469,7 @@ static u32 _vfe_equ_pmudatainit_minmax(struct gk20a *g, return status; } -static u32 vfe_equ_construct_minmax(struct gk20a *g, +static int vfe_equ_construct_minmax(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -477,7 +477,7 @@ static u32 vfe_equ_construct_minmax(struct gk20a *g, struct vfe_equ_minmax *pvfeequ; struct vfe_equ_minmax *ptmpequ = (struct vfe_equ_minmax *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_MINMAX) return -EINVAL; @@ -498,11 +498,11 @@ static u32 vfe_equ_construct_minmax(struct gk20a *g, return status; } -static u32 _vfe_equ_pmudatainit_quadratic(struct gk20a *g, +static int _vfe_equ_pmudatainit_quadratic(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_equ_quadratic *pvfe_equ_quadratic; struct nv_pmu_vfe_equ_quadratic *pset; u32 i; @@ -524,7 +524,7 @@ static u32 _vfe_equ_pmudatainit_quadratic(struct gk20a *g, return status; } -static u32 vfe_equ_construct_quadratic(struct gk20a *g, +static int vfe_equ_construct_quadratic(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -532,7 +532,7 @@ static u32 vfe_equ_construct_quadratic(struct gk20a *g, struct vfe_equ_quadratic *pvfeequ; struct vfe_equ_quadratic *ptmpequ = (struct vfe_equ_quadratic *)pargs; - u32 status = 0; + int status = 0; u32 i; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_QUADRATIC) @@ -558,7 +558,7 @@ static u32 vfe_equ_construct_quadratic(struct gk20a *g, static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/perf/vfe_equ.h b/drivers/gpu/nvgpu/perf/vfe_equ.h index 87888d82..486a48f8 100644 --- a/drivers/gpu/nvgpu/perf/vfe_equ.h +++ b/drivers/gpu/nvgpu/perf/vfe_equ.h @@ -1,7 +1,7 @@ /* * general perf structures & definitions * - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -28,8 +28,8 @@ #include "perf/vfe_var.h" #include -u32 vfe_equ_sw_setup(struct gk20a *g); -u32 vfe_equ_pmu_setup(struct gk20a *g); +int vfe_equ_sw_setup(struct gk20a *g); +int vfe_equ_pmu_setup(struct gk20a *g); #define VFE_EQU_GET(_pperf, _idx) \ ((struct vfe_equ *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ diff --git a/drivers/gpu/nvgpu/perf/vfe_var.c b/drivers/gpu/nvgpu/perf/vfe_var.c index 8b95230e..5f6e9de7 100644 --- a/drivers/gpu/nvgpu/perf/vfe_var.c +++ b/drivers/gpu/nvgpu/perf/vfe_var.c @@ -31,13 +31,13 @@ #include "ctrl/ctrlvolt.h" #include "ctrl/ctrlperf.h" -static u32 devinit_get_vfe_var_table(struct gk20a *g, +static int devinit_get_vfe_var_table(struct gk20a *g, struct vfe_vars *pvarobjs); -static u32 vfe_var_construct_single(struct gk20a *g, +static int vfe_var_construct_single(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs); -static u32 _vfe_vars_pmudatainit(struct gk20a *g, +static int _vfe_vars_pmudatainit(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -45,7 +45,7 @@ static u32 _vfe_vars_pmudatainit(struct gk20a *g, (struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *) pboardobjgrppmu; struct vfe_vars *pvars = (struct vfe_vars *)pboardobjgrp; - u32 status = 0; + int status = 0; status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); if (status) { @@ -60,7 +60,7 @@ done: return status; } -static u32 _vfe_vars_pmudata_instget(struct gk20a *g, +static int _vfe_vars_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -82,7 +82,7 @@ static u32 _vfe_vars_pmudata_instget(struct gk20a *g, return 0; } -static u32 _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, +static int _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) { struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *pgrp_get_status = @@ -99,7 +99,7 @@ static u32 _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, } -u32 vfe_var_sw_setup(struct gk20a *g) +int vfe_var_sw_setup(struct gk20a *g) { u32 status; struct boardobjgrp *pboardobjgrp = NULL; @@ -152,9 +152,9 @@ done: return status; } -u32 vfe_var_pmu_setup(struct gk20a *g) +int vfe_var_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -293,11 +293,11 @@ done: return status; } -static u32 _vfe_var_pmudatainit_super(struct gk20a *g, +static int _vfe_var_pmudatainit_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_var *pvfe_var; struct nv_pmu_vfe_var *pset; @@ -321,13 +321,13 @@ static u32 _vfe_var_pmudatainit_super(struct gk20a *g, return status; } -static u32 vfe_var_construct_super(struct gk20a *g, +static int vfe_var_construct_super(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct vfe_var *pvfevar; struct vfe_var *ptmpvar = (struct vfe_var *)pargs; - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -350,11 +350,11 @@ static u32 vfe_var_construct_super(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_derived(struct gk20a *g, +static int _vfe_var_pmudatainit_derived(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -363,12 +363,12 @@ static u32 _vfe_var_pmudatainit_derived(struct gk20a *g, return status; } -static u32 vfe_var_construct_derived(struct gk20a *g, +static int vfe_var_construct_derived(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *ptmpobj = (struct boardobj *)pargs; - u32 status = 0; + int status = 0; struct vfe_var_derived *pvfevar; ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED); @@ -384,11 +384,11 @@ static u32 vfe_var_construct_derived(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_derived_product(struct gk20a *g, +static int _vfe_var_pmudatainit_derived_product(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_var_derived_product *pvfe_var_derived_product; struct nv_pmu_vfe_var_derived_product *pset; @@ -408,7 +408,7 @@ static u32 _vfe_var_pmudatainit_derived_product(struct gk20a *g, return status; } -static u32 vfe_var_construct_derived_product(struct gk20a *g, +static int vfe_var_construct_derived_product(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -416,7 +416,7 @@ static u32 vfe_var_construct_derived_product(struct gk20a *g, struct vfe_var_derived_product *pvfevar; struct vfe_var_derived_product *ptmpvar = (struct vfe_var_derived_product *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT) return -EINVAL; @@ -438,11 +438,11 @@ static u32 vfe_var_construct_derived_product(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_derived_sum(struct gk20a *g, +static int _vfe_var_pmudatainit_derived_sum(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_var_derived_sum *pvfe_var_derived_sum; struct nv_pmu_vfe_var_derived_sum *pset; @@ -461,7 +461,7 @@ static u32 _vfe_var_pmudatainit_derived_sum(struct gk20a *g, return status; } -static u32 vfe_var_construct_derived_sum(struct gk20a *g, +static int vfe_var_construct_derived_sum(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -469,7 +469,7 @@ static u32 vfe_var_construct_derived_sum(struct gk20a *g, struct vfe_var_derived_sum *pvfevar; struct vfe_var_derived_sum *ptmpvar = (struct vfe_var_derived_sum *)pargs; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM) return -EINVAL; @@ -490,11 +490,11 @@ static u32 vfe_var_construct_derived_sum(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_single(struct gk20a *g, +static int _vfe_var_pmudatainit_single(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_var_single *pvfe_var_single; struct nv_pmu_vfe_var_single *pset; @@ -514,11 +514,11 @@ static u32 _vfe_var_pmudatainit_single(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_single_frequency(struct gk20a *g, +static int _vfe_var_pmudatainit_single_frequency(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -557,11 +557,11 @@ static u32 vfe_var_construct_single_frequency(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_single_sensed(struct gk20a *g, +static int _vfe_var_pmudatainit_single_sensed(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -570,11 +570,11 @@ static u32 _vfe_var_pmudatainit_single_sensed(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g, +static int _vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_var_single_sensed_fuse *pvfe_var_single_sensed_fuse; struct nv_pmu_vfe_var_single_sensed_fuse *pset; @@ -696,11 +696,11 @@ exit: return status; } -static u32 _vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g, +static int _vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct vfe_var_single_sensed_temp *pvfe_var_single_sensed_temp; struct nv_pmu_vfe_var_single_sensed_temp *pset; @@ -763,11 +763,11 @@ static u32 vfe_var_construct_single_sensed_temp(struct gk20a *g, return status; } -static u32 _vfe_var_pmudatainit_single_voltage(struct gk20a *g, +static int _vfe_var_pmudatainit_single_voltage(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); @@ -776,13 +776,13 @@ static u32 _vfe_var_pmudatainit_single_voltage(struct gk20a *g, return status; } -static u32 vfe_var_construct_single_voltage(struct gk20a *g, +static int vfe_var_construct_single_voltage(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *ptmpobj = (struct boardobj *)pargs; struct vfe_var_single_voltage *pvfevar; - u32 status = 0; + int status = 0; if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE) return -EINVAL; @@ -806,7 +806,7 @@ static u32 vfe_var_construct_single_voltage(struct gk20a *g, static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; nvgpu_log_info(g, " "); switch (BOARDOBJ_GET_TYPE(pargs)) { @@ -855,10 +855,10 @@ static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs) return (struct vfe_var *)board_obj_ptr; } -static u32 devinit_get_vfe_var_table(struct gk20a *g, +static int devinit_get_vfe_var_table(struct gk20a *g, struct vfe_vars *pvfevarobjs) { - u32 status = 0; + int status = 0; u8 *vfevars_tbl_ptr = NULL; struct vbios_vfe_3x_header_struct vfevars_tbl_header = { 0 }; struct vbios_vfe_3x_var_entry_struct var = { 0 }; @@ -1035,13 +1035,13 @@ done: return status; } -static u32 vfe_var_construct_single(struct gk20a *g, +static int vfe_var_construct_single(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *ptmpobj = (struct boardobj *)pargs; struct vfe_var_single *pvfevar; - u32 status = 0; + int status = 0; nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/perf/vfe_var.h b/drivers/gpu/nvgpu/perf/vfe_var.h index 3364f994..535600a7 100644 --- a/drivers/gpu/nvgpu/perf/vfe_var.h +++ b/drivers/gpu/nvgpu/perf/vfe_var.h @@ -26,8 +26,8 @@ #include "boardobj/boardobjgrp.h" #include -u32 vfe_var_sw_setup(struct gk20a *g); -u32 vfe_var_pmu_setup(struct gk20a *g); +int vfe_var_sw_setup(struct gk20a *g); +int vfe_var_pmu_setup(struct gk20a *g); #define VFE_VAR_GET(_pperf, _idx) \ ((struct vfe_var)BOARDOBJGRP_OBJ_GET_BY_IDX( \ diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.c b/drivers/gpu/nvgpu/pmgr/pmgr.c index 3d6a96af..6be0f82f 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgr.c +++ b/drivers/gpu/nvgpu/pmgr/pmgr.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -101,7 +101,7 @@ exit: return status; } -u32 pmgr_domain_pmu_setup(struct gk20a *g) +int pmgr_domain_pmu_setup(struct gk20a *g) { return pmgr_send_pmgr_tables_to_pmu(g); } diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.h b/drivers/gpu/nvgpu/pmgr/pmgr.h index 85b1bbd1..33daf8a9 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgr.h +++ b/drivers/gpu/nvgpu/pmgr/pmgr.h @@ -1,7 +1,7 @@ /* * general power device structures & definitions * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -35,7 +35,7 @@ struct pmgr_pmupstate { }; u32 pmgr_domain_sw_setup(struct gk20a *g); -u32 pmgr_domain_pmu_setup(struct gk20a *g); +int pmgr_domain_pmu_setup(struct gk20a *g); int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val); int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val); int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val); diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index 3398e8df..69c43a01 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -175,11 +175,11 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) return status; } -static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) +static int pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) { struct nv_pmu_pmgr_pwr_device_desc_table *pwr_desc_table; struct nv_pmu_pmgr_pwr_device_desc_table_header *ppwr_desc_header; - u32 status = 0; + int status = 0; /* Set the BA-device-independent HW information */ pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); @@ -221,13 +221,13 @@ exit: return status; } -static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) +static int pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) { struct nv_pmu_pmgr_pwr_monitor_pack *pwr_monitor_pack = NULL; struct nv_pmu_pmgr_pwr_channel_header *pwr_channel_hdr; struct nv_pmu_pmgr_pwr_chrelationship_header *pwr_chrelationship_header; u32 max_dmem_size; - u32 status = 0; + int status = 0; pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); if (!pwr_monitor_pack) @@ -290,11 +290,11 @@ exit: return status; } -static u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g) +static int pmgr_send_pwr_policy_to_pmu(struct gk20a *g) { struct nv_pmu_pmgr_pwr_policy_pack *ppwrpack = NULL; struct pwr_policy *ppolicy = NULL; - u32 status = 0; + int status = 0; u8 indx; u32 max_dmem_size; @@ -479,9 +479,9 @@ exit: return status; } -u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) +int pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) { - u32 status = 0; + int status = 0; status = pmgr_send_i2c_device_topology_to_pmu(g); diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.h b/drivers/gpu/nvgpu/pmgr/pmgrpmu.h index 3cb9eecb..a576f384 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.h +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.h @@ -1,7 +1,7 @@ /* * general power device control structures & definitions * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -28,7 +28,7 @@ #include "pwrdev.h" #include "pwrmonitor.h" -u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g); +int pmgr_send_pmgr_tables_to_pmu(struct gk20a *g); u32 pmgr_pmu_pwr_devices_query_blocking( struct gk20a *g, diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c index da51ac4b..235629d6 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.c +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c @@ -28,7 +28,7 @@ #include "boardobj/boardobjgrp_e32.h" #include "gp106/bios_gp106.h" -static u32 _pwr_device_pmudata_instget(struct gk20a *g, +static int _pwr_device_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -51,13 +51,13 @@ static u32 _pwr_device_pmudata_instget(struct gk20a *g, return 0; } -static u32 _pwr_domains_pmudatainit_ina3221(struct gk20a *g, +static int _pwr_domains_pmudatainit_ina3221(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { struct nv_pmu_pmgr_pwr_device_desc_ina3221 *ina3221_desc; struct pwr_device_ina3221 *ina3221; - u32 status = 0; + int status = 0; u32 indx; status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); @@ -92,7 +92,7 @@ static struct boardobj *construct_pwr_device(struct gk20a *g, void *pargs, u16 pargs_size, u8 type) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; u32 indx; struct pwr_device_ina3221 *pwrdev; struct pwr_device_ina3221 *ina3221 = (struct pwr_device_ina3221*)pargs; @@ -127,10 +127,10 @@ static struct boardobj *construct_pwr_device(struct gk20a *g, return board_obj_ptr; } -static u32 devinit_get_pwr_device_table(struct gk20a *g, +static int devinit_get_pwr_device_table(struct gk20a *g, struct pwr_devices *ppwrdeviceobjs) { - u32 status = 0; + int status = 0; u8 *pwr_device_table_ptr = NULL; u8 *curr_pwr_device_table_ptr = NULL; struct boardobj *boardobj; @@ -284,9 +284,9 @@ done: return status; } -u32 pmgr_device_sw_setup(struct gk20a *g) +int pmgr_device_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct pwr_devices *ppwrdeviceobjs; diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.h b/drivers/gpu/nvgpu/pmgr/pwrdev.h index 1d9acb89..72cca1fb 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.h +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.h @@ -1,7 +1,7 @@ /* * general power device structures & definitions * - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -55,6 +55,6 @@ struct pwr_device_ina3221 { s16 curr_correct_b; } ; -u32 pmgr_device_sw_setup(struct gk20a *g); +int pmgr_device_sw_setup(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c index 5e0cc966..53c7a1c4 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c @@ -28,7 +28,7 @@ #include "boardobj/boardobjgrp_e32.h" #include "gp106/bios_gp106.h" -static u32 _pwr_channel_pmudata_instget(struct gk20a *g, +static int _pwr_channel_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -54,7 +54,7 @@ static u32 _pwr_channel_pmudata_instget(struct gk20a *g, return 0; } -static u32 _pwr_channel_rels_pmudata_instget(struct gk20a *g, +static int _pwr_channel_rels_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -105,13 +105,13 @@ static bool _pwr_channel_implements(struct pwr_channel *pchannel, return (type == BOARDOBJ_GET_TYPE(pchannel)); } -static u32 _pwr_domains_pmudatainit_sensor(struct gk20a *g, +static int _pwr_domains_pmudatainit_sensor(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { struct nv_pmu_pmgr_pwr_channel_sensor *pmu_sensor_data; struct pwr_channel_sensor *sensor; - u32 status = 0; + int status = 0; status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); if (status) { @@ -144,7 +144,7 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g, void *pargs, u16 pargs_size, u8 type) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; struct pwr_channel_sensor *pwrchannel; struct pwr_channel_sensor *sensor = (struct pwr_channel_sensor*)pargs; @@ -174,10 +174,10 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g, return board_obj_ptr; } -static u32 devinit_get_pwr_topology_table(struct gk20a *g, +static int devinit_get_pwr_topology_table(struct gk20a *g, struct pmgr_pwr_monitor *ppwrmonitorobjs) { - u32 status = 0; + int status = 0; u8 *pwr_topology_table_ptr = NULL; u8 *curr_pwr_topology_table_ptr = NULL; struct boardobj *boardobj; @@ -296,9 +296,9 @@ done: return status; } -u32 pmgr_monitor_sw_setup(struct gk20a *g) +int pmgr_monitor_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct pwr_channel *pchannel; struct pmgr_pwr_monitor *ppwrmonitorobjs; diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.h b/drivers/gpu/nvgpu/pmgr/pwrmonitor.h index 4f094c3e..da52b08a 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.h +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.h @@ -1,7 +1,7 @@ /* * general power channel structures & definitions * - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -64,6 +64,6 @@ struct pmgr_pwr_monitor { ((struct pwr_channel *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ &(g->pmgr_pmu.pmgr_monitorobjs.pwr_channels.super), (channel_idx))) -u32 pmgr_monitor_sw_setup(struct gk20a *g); +int pmgr_monitor_sw_setup(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index 38575f74..13a94e4f 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c @@ -182,7 +182,7 @@ static u32 _pwr_policy_limitarboutputget(struct gk20a *g, return _pwr_policy_limitarboutputget_helper(p_limit_arb); } -static u32 _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g, +static int _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { @@ -190,7 +190,7 @@ static u32 _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g, struct pwr_policy_hw_threshold *p_hw_threshold; struct pwr_policy *p_pwr_policy; struct nv_pmu_pmgr_pwr_policy *pmu_pwr_policy; - u32 status = 0; + int status = 0; status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); if (status) { @@ -256,7 +256,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g, void *pargs, u16 pargs_size, u8 type) { struct boardobj *board_obj_ptr = NULL; - u32 status; + int status; struct pwr_policy_hw_threshold *pwrpolicyhwthreshold; struct pwr_policy *pwrpolicy; struct pwr_policy *pwrpolicyparams = (struct pwr_policy*)pargs; @@ -363,13 +363,13 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g, return board_obj_ptr; } -static u32 _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g, +static int _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g, struct pmgr_pwr_policy *ppwrpolicyobjs, union pwr_policy_data_union *ppwrpolicydata, u16 pwr_policy_size, u32 obj_index) { - u32 status = 0; + int status = 0; struct boardobj *boardobj; /* WARN policy */ @@ -512,10 +512,10 @@ static inline void devinit_unpack_pwr_policy_entry( __UNPACK_FIELD(unpacked, packed, filter_param); } -static u32 devinit_get_pwr_policy_table(struct gk20a *g, +static int devinit_get_pwr_policy_table(struct gk20a *g, struct pmgr_pwr_policy *ppwrpolicyobjs) { - u32 status = 0; + int status = 0; u8 *ptr = NULL; struct boardobj *boardobj; struct pwr_policy_3x_header_struct *packed_hdr; @@ -707,9 +707,9 @@ done: return status; } -u32 pmgr_policy_sw_setup(struct gk20a *g) +int pmgr_policy_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct pwr_policy *ppolicy; struct pmgr_pwr_policy *ppwrpolicyobjs; diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h index 9bc99bb7..12936a3e 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h @@ -1,7 +1,7 @@ /* * general power channel structures & definitions * - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -131,6 +131,6 @@ union pwr_policy_data_union { #define PMGR_PWR_POLICY_INCREMENT_LIMIT_INPUT_COUNT(ppolicy) \ ((ppolicy)->num_limit_inputs++) -u32 pmgr_policy_sw_setup(struct gk20a *g); +int pmgr_policy_sw_setup(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c index 6c9d7736..9b7d9b7e 100644 --- a/drivers/gpu/nvgpu/pstate/pstate.c +++ b/drivers/gpu/nvgpu/pstate/pstate.c @@ -44,7 +44,7 @@ void gk20a_deinit_pstate_support(struct gk20a *g) /*sw setup for pstate components*/ int gk20a_init_pstate_support(struct gk20a *g) { - u32 err; + int err; nvgpu_log_fn(g, " "); diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.c b/drivers/gpu/nvgpu/therm/thrmchannel.c index de3de62a..7d196422 100644 --- a/drivers/gpu/nvgpu/therm/thrmchannel.c +++ b/drivers/gpu/nvgpu/therm/thrmchannel.c @@ -29,11 +29,11 @@ #include "boardobj/boardobjgrp_e32.h" #include "gp106/bios_gp106.h" -static u32 _therm_channel_pmudatainit_device(struct gk20a *g, +static int _therm_channel_pmudatainit_device(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct therm_channel *pchannel; struct therm_channel_device *ptherm_channel; struct nv_pmu_therm_therm_channel_device_boardobj_set *pset; @@ -68,7 +68,7 @@ static struct boardobj *construct_channel_device(struct gk20a *g, struct boardobj *board_obj_ptr = NULL; struct therm_channel *pchannel; struct therm_channel_device *pchannel_device; - u32 status; + int status; struct therm_channel_device *therm_device = (struct therm_channel_device*)pargs; status = boardobj_construct_super(g, &board_obj_ptr, @@ -95,7 +95,7 @@ static struct boardobj *construct_channel_device(struct gk20a *g, return board_obj_ptr; } -static u32 _therm_channel_pmudata_instget(struct gk20a *g, +static int _therm_channel_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -119,10 +119,10 @@ static u32 _therm_channel_pmudata_instget(struct gk20a *g, return 0; } -static u32 devinit_get_therm_channel_table(struct gk20a *g, +static int devinit_get_therm_channel_table(struct gk20a *g, struct therm_channels *pthermchannelobjs) { - u32 status = 0; + int status = 0; u8 *therm_channel_table_ptr = NULL; u8 *curr_therm_channel_table_ptr = NULL; struct boardobj *boardobj; @@ -210,9 +210,9 @@ done: return status; } -u32 therm_channel_sw_setup(struct gk20a *g) +int therm_channel_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct therm_channels *pthermchannelobjs; diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.h b/drivers/gpu/nvgpu/therm/thrmchannel.h index 4e0dd2e4..a2045c26 100644 --- a/drivers/gpu/nvgpu/therm/thrmchannel.h +++ b/drivers/gpu/nvgpu/therm/thrmchannel.h @@ -1,7 +1,7 @@ /* * general thermal device structures & definitions * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -46,6 +46,6 @@ struct therm_channel_device { u8 therm_dev_prov_idx; }; -u32 therm_channel_sw_setup(struct gk20a *g); +int therm_channel_sw_setup(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/therm/thrmdev.c b/drivers/gpu/nvgpu/therm/thrmdev.c index aaf0a461..ddd1f280 100644 --- a/drivers/gpu/nvgpu/therm/thrmdev.c +++ b/drivers/gpu/nvgpu/therm/thrmdev.c @@ -30,7 +30,7 @@ #include "gp106/bios_gp106.h" #include "ctrl/ctrltherm.h" -static u32 _therm_device_pmudata_instget(struct gk20a *g, +static int _therm_device_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) @@ -54,29 +54,29 @@ static u32 _therm_device_pmudata_instget(struct gk20a *g, return 0; } -static u32 construct_therm_device(struct gk20a *g, +static int construct_therm_device(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { return boardobj_construct_super(g, ppboardobj, size, pargs); } -static u32 construct_therm_device_gpu(struct gk20a *g, +static int construct_therm_device_gpu(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { return construct_therm_device(g, ppboardobj, size, pargs); } -static u32 construct_therm_device_gpu_sci(struct gk20a *g, +static int construct_therm_device_gpu_sci(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { return construct_therm_device(g, ppboardobj, size, pargs); } -static u32 therm_device_pmu_data_init_gpu_gpc_tsosc(struct gk20a *g, +static int therm_device_pmu_data_init_gpu_gpc_tsosc(struct gk20a *g, struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct therm_device_gpu_gpc_tsosc *pdev = NULL; struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set *pset; @@ -95,13 +95,13 @@ exit: return status; } -static u32 construct_therm_device_gpu_tsosc(struct gk20a *g, +static int construct_therm_device_gpu_tsosc(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct therm_device_gpu_gpc_tsosc *pdev = NULL; struct therm_device_gpu_gpc_tsosc *ptmp_dev = (struct therm_device_gpu_gpc_tsosc *)pargs; - u32 status = 0; + int status = 0; status = construct_therm_device(g, ppboardobj, size, pargs); if (status != 0) { @@ -118,10 +118,10 @@ static u32 construct_therm_device_gpu_tsosc(struct gk20a *g, return status; } -static u32 therm_device_pmu_data_init_hbm2_site(struct gk20a *g, +static int therm_device_pmu_data_init_hbm2_site(struct gk20a *g, struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct therm_device_hbm2_site *pdev = NULL; struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set *pset; @@ -140,13 +140,13 @@ exit: return status; } -static u32 construct_therm_device_hbm2_site(struct gk20a *g, +static int construct_therm_device_hbm2_site(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct therm_device_hbm2_site *pdev = NULL; struct therm_device_hbm2_site *ptmp_dev = (struct therm_device_hbm2_site *)pargs; - u32 status = 0; + int status = 0; status = construct_therm_device(g, ppboardobj, size, pargs); if (status != 0) { @@ -163,7 +163,7 @@ static u32 construct_therm_device_hbm2_site(struct gk20a *g, return status; } -static u32 construct_therm_device_hbm2_combined(struct gk20a *g, +static int construct_therm_device_hbm2_combined(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { return construct_therm_device(g, ppboardobj, size, pargs); @@ -174,7 +174,7 @@ static struct boardobj *therm_device_construct(struct gk20a *g, void *pargs) { struct boardobj *board_obj_ptr = NULL; - u32 status = 0; + int status = 0; switch (BOARDOBJ_GET_TYPE(pargs)) { case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU: @@ -216,10 +216,10 @@ static struct boardobj *therm_device_construct(struct gk20a *g, return board_obj_ptr; } -static u32 devinit_get_therm_device_table(struct gk20a *g, +static int devinit_get_therm_device_table(struct gk20a *g, struct therm_devices *pthermdeviceobjs) { - u32 status = 0; + int status = 0; u8 *therm_device_table_ptr = NULL; u8 *curr_therm_device_table_ptr = NULL; struct boardobj *boardobj; @@ -324,9 +324,9 @@ done: return status; } -u32 therm_device_sw_setup(struct gk20a *g) +int therm_device_sw_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; struct therm_devices *pthermdeviceobjs; diff --git a/drivers/gpu/nvgpu/therm/thrmdev.h b/drivers/gpu/nvgpu/therm/thrmdev.h index af349c88..df4c199a 100644 --- a/drivers/gpu/nvgpu/therm/thrmdev.h +++ b/drivers/gpu/nvgpu/therm/thrmdev.h @@ -1,7 +1,7 @@ /* * general thermal device structures & definitions * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -53,6 +53,6 @@ struct therm_device_hbm2_combined { struct therm_device super; }; -u32 therm_device_sw_setup(struct gk20a *g); +int therm_device_sw_setup(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.c b/drivers/gpu/nvgpu/therm/thrmpmu.c index 6a79cc3e..7814cf5e 100644 --- a/drivers/gpu/nvgpu/therm/thrmpmu.c +++ b/drivers/gpu/nvgpu/therm/thrmpmu.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -50,9 +50,9 @@ static void therm_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, phandlerparams->success = 1; } -u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g) +int therm_send_pmgr_tables_to_pmu(struct gk20a *g) { - u32 status = 0; + int status = 0; struct boardobjgrp *pboardobjgrp = NULL; if (!BOARDOBJGRP_IS_EMPTY(&g->therm_pmu.therm_deviceobjs.super.super)) { diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.h b/drivers/gpu/nvgpu/therm/thrmpmu.h index 1813ce6c..1341a055 100644 --- a/drivers/gpu/nvgpu/therm/thrmpmu.h +++ b/drivers/gpu/nvgpu/therm/thrmpmu.h @@ -1,7 +1,7 @@ /* * general thermal pmu control structures & definitions * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -24,7 +24,7 @@ #ifndef _THRMPMU_H_ #define _THRMPMU_H_ -u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g); +int therm_send_pmgr_tables_to_pmu(struct gk20a *g); u32 therm_configure_therm_alert(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/volt/volt_dev.c b/drivers/gpu/nvgpu/volt/volt_dev.c index 728b0eaf..b6e69a37 100644 --- a/drivers/gpu/nvgpu/volt/volt_dev.c +++ b/drivers/gpu/nvgpu/volt/volt_dev.c @@ -38,10 +38,10 @@ #define VOLT_DEV_PWM_VOLTAGE_STEPS_INVALID 0 #define VOLT_DEV_PWM_VOLTAGE_STEPS_DEFAULT 1 -static u32 volt_device_pmu_data_init_super(struct gk20a *g, +static int volt_device_pmu_data_init_super(struct gk20a *g, struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) { - u32 status; + int status; struct voltage_device *pdev; struct nv_pmu_volt_volt_device_boardobj_set *pset; @@ -61,10 +61,10 @@ static u32 volt_device_pmu_data_init_super(struct gk20a *g, return status; } -static u32 volt_device_pmu_data_init_pwm(struct gk20a *g, +static int volt_device_pmu_data_init_pwm(struct gk20a *g, struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct voltage_device_pwm *pdev; struct nv_pmu_volt_volt_device_pwm_boardobj_set *pset; @@ -84,12 +84,12 @@ static u32 volt_device_pmu_data_init_pwm(struct gk20a *g, return status; } -static u32 construct_volt_device(struct gk20a *g, +static int construct_volt_device(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct voltage_device *ptmp_dev = (struct voltage_device *)pargs; struct voltage_device *pvolt_dev = NULL; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pargs); if (status) { @@ -113,7 +113,7 @@ static u32 construct_volt_device(struct gk20a *g, return status; } -static u32 construct_pwm_volt_device(struct gk20a *g, +static int construct_pwm_volt_device(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { @@ -121,7 +121,7 @@ static u32 construct_pwm_volt_device(struct gk20a *g, struct voltage_device_pwm *ptmp_dev = (struct voltage_device_pwm *)pargs; struct voltage_device_pwm *pdev = NULL; - u32 status = 0; + int status = 0; status = construct_volt_device(g, ppboardobj, size, pargs); if (status) { @@ -186,7 +186,7 @@ static struct voltage_device *volt_volt_device_construct(struct gk20a *g, struct boardobj *pboard_obj = NULL; if (BOARDOBJ_GET_TYPE(pargs) == CTRL_VOLT_DEVICE_TYPE_PWM) { - u32 status = construct_pwm_volt_device(g, &pboard_obj, + int status = construct_pwm_volt_device(g, &pboard_obj, sizeof(struct voltage_device_pwm), pargs); if (status) { nvgpu_err(g, @@ -199,12 +199,12 @@ static struct voltage_device *volt_volt_device_construct(struct gk20a *g, return (struct voltage_device *)pboard_obj; } -static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, +static int volt_get_voltage_device_table_1x_psv(struct gk20a *g, struct vbios_voltage_device_table_1x_entry *p_bios_entry, struct voltage_device_metadata *p_Volt_Device_Meta_Data, u8 entry_Idx) { - u32 status = 0; + int status = 0; u32 entry_cnt = 0; struct voltage_device *pvolt_dev = NULL; struct voltage_device_pwm *pvolt_dev_pwm = NULL; @@ -413,7 +413,7 @@ done: return status; } -static u32 _volt_device_devgrp_pmudata_instget(struct gk20a *g, +static int _volt_device_devgrp_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) { @@ -435,7 +435,7 @@ static u32 _volt_device_devgrp_pmudata_instget(struct gk20a *g, return 0; } -static u32 _volt_device_devgrp_pmustatus_instget(struct gk20a *g, +static int _volt_device_devgrp_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) { @@ -518,9 +518,9 @@ done: return status; } -u32 volt_dev_pmu_setup(struct gk20a *g) +int volt_dev_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/volt/volt_dev.h b/drivers/gpu/nvgpu/volt/volt_dev.h index a3dc8cf6..98f3bce9 100644 --- a/drivers/gpu/nvgpu/volt/volt_dev.h +++ b/drivers/gpu/nvgpu/volt/volt_dev.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -73,6 +73,6 @@ struct voltage_device_pwm_entry { /* PWM end */ u32 volt_dev_sw_setup(struct gk20a *g); -u32 volt_dev_pmu_setup(struct gk20a *g); +int volt_dev_pmu_setup(struct gk20a *g); #endif /* _VOLTDEV_H_ */ diff --git a/drivers/gpu/nvgpu/volt/volt_policy.c b/drivers/gpu/nvgpu/volt/volt_policy.c index 4c8737d3..e4b081a1 100644 --- a/drivers/gpu/nvgpu/volt/volt_policy.c +++ b/drivers/gpu/nvgpu/volt/volt_policy.c @@ -30,17 +30,17 @@ #include "volt.h" -static u32 volt_policy_pmu_data_init_super(struct gk20a *g, +static int volt_policy_pmu_data_init_super(struct gk20a *g, struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) { return boardobj_pmudatainit_super(g, pboardobj, ppmudata); } -static u32 construct_volt_policy(struct gk20a *g, +static int construct_volt_policy(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pArgs) { struct voltage_policy *pvolt_policy = NULL; - u32 status = 0; + int status = 0; status = boardobj_construct_super(g, ppboardobj, size, pArgs); if (status) { @@ -54,13 +54,13 @@ static u32 construct_volt_policy(struct gk20a *g, return status; } -static u32 construct_volt_policy_split_rail(struct gk20a *g, +static int construct_volt_policy_split_rail(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pArgs) { struct voltage_policy_split_rail *ptmp_policy = (struct voltage_policy_split_rail *)pArgs; struct voltage_policy_split_rail *pvolt_policy = NULL; - u32 status = 0; + int status = 0; status = construct_volt_policy(g, ppboardobj, size, pArgs); if (status) { @@ -79,13 +79,13 @@ static u32 construct_volt_policy_split_rail(struct gk20a *g, return status; } -static u32 construct_volt_policy_single_rail(struct gk20a *g, +static int construct_volt_policy_single_rail(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pArgs) { struct voltage_policy_single_rail *ptmp_policy = (struct voltage_policy_single_rail *)pArgs; struct voltage_policy_single_rail *pvolt_policy = NULL; - u32 status = 0; + int status = 0; status = construct_volt_policy(g, ppboardobj, size, pArgs); if (status) { @@ -99,10 +99,10 @@ static u32 construct_volt_policy_single_rail(struct gk20a *g, return status; } -static u32 volt_policy_pmu_data_init_single_rail(struct gk20a *g, +static int volt_policy_pmu_data_init_single_rail(struct gk20a *g, struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct voltage_policy_single_rail *ppolicy; struct nv_pmu_volt_volt_policy_sr_boardobj_set *pset; @@ -120,10 +120,10 @@ done: return status; } -static u32 volt_policy_pmu_data_init_sr_multi_step(struct gk20a *g, +static int volt_policy_pmu_data_init_sr_multi_step(struct gk20a *g, struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct voltage_policy_single_rail_multi_step *ppolicy; struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *pset; @@ -144,14 +144,14 @@ done: return status; } -static u32 volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g, +static int volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *pboardobj = NULL; struct voltage_policy_single_rail_multi_step *p_volt_policy = NULL; struct voltage_policy_single_rail_multi_step *tmp_policy = (struct voltage_policy_single_rail_multi_step *)pargs; - u32 status = 0; + int status = 0; status = construct_volt_policy_single_rail(g, ppboardobj, size, pargs); if (status) { @@ -174,10 +174,10 @@ static u32 volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g, return status; } -static u32 volt_policy_pmu_data_init_split_rail(struct gk20a *g, +static int volt_policy_pmu_data_init_split_rail(struct gk20a *g, struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct voltage_policy_split_rail *ppolicy; struct nv_pmu_volt_volt_policy_splt_r_boardobj_set *pset; @@ -201,11 +201,11 @@ done: return status; } -static u32 volt_construct_volt_policy_split_rail_single_step(struct gk20a *g, +static int volt_construct_volt_policy_split_rail_single_step(struct gk20a *g, struct boardobj **ppboardobj, u16 size, void *pargs) { struct boardobj *pboardobj = NULL; - u32 status = 0; + int status = 0; status = construct_volt_policy_split_rail(g, ppboardobj, size, pargs); if (status) { @@ -221,7 +221,7 @@ static u32 volt_construct_volt_policy_split_rail_single_step(struct gk20a *g, static struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *pargs) { struct boardobj *pboard_obj = NULL; - u32 status = 0; + int status = 0; switch (BOARDOBJ_GET_TYPE(pargs)) { case CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP: @@ -269,10 +269,10 @@ static u8 volt_policy_type_convert(u8 vbios_type) return CTRL_VOLT_POLICY_TYPE_INVALID; } -static u32 volt_get_volt_policy_table(struct gk20a *g, +static int volt_get_volt_policy_table(struct gk20a *g, struct voltage_policy_metadata *pvolt_policy_metadata) { - u32 status = 0; + int status = 0; u8 *voltage_policy_table_ptr = NULL; struct voltage_policy *ppolicy = NULL; struct vbios_voltage_policy_table_1x_header header = { 0 }; @@ -370,7 +370,7 @@ static u32 volt_get_volt_policy_table(struct gk20a *g, done: return status; } -static u32 _volt_policy_devgrp_pmudata_instget(struct gk20a *g, +static int _volt_policy_devgrp_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) { @@ -392,7 +392,7 @@ static u32 _volt_policy_devgrp_pmudata_instget(struct gk20a *g, return 0; } -static u32 _volt_policy_devgrp_pmustatus_instget(struct gk20a *g, +static int _volt_policy_devgrp_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) { @@ -411,7 +411,7 @@ static u32 _volt_policy_devgrp_pmustatus_instget(struct gk20a *g, return 0; } -static u32 _volt_policy_grp_pmudatainit_super(struct gk20a *g, +static int _volt_policy_grp_pmudatainit_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) { @@ -419,7 +419,7 @@ static u32 _volt_policy_grp_pmudatainit_super(struct gk20a *g, (struct nv_pmu_volt_volt_policy_boardobjgrp_set_header *) pboardobjgrppmu; struct obj_volt *volt = (struct obj_volt *)pboardobjgrp; - u32 status = 0; + int status = 0; status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); if (status) { @@ -435,9 +435,9 @@ done: return status; } -u32 volt_policy_pmu_setup(struct gk20a *g) +int volt_policy_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -455,9 +455,9 @@ u32 volt_policy_pmu_setup(struct gk20a *g) return status; } -u32 volt_policy_sw_setup(struct gk20a *g) +int volt_policy_sw_setup(struct gk20a *g) { - u32 status = 0; + int status = 0; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); diff --git a/drivers/gpu/nvgpu/volt/volt_policy.h b/drivers/gpu/nvgpu/volt/volt_policy.h index 34c8f0f6..af13e02f 100644 --- a/drivers/gpu/nvgpu/volt/volt_policy.h +++ b/drivers/gpu/nvgpu/volt/volt_policy.h @@ -75,6 +75,6 @@ struct voltage_policy_single_rail_multi_step { u32 ramp_down_step_size_uv; }; -u32 volt_policy_sw_setup(struct gk20a *g); -u32 volt_policy_pmu_setup(struct gk20a *g); +int volt_policy_sw_setup(struct gk20a *g); +int volt_policy_pmu_setup(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/volt/volt_rail.c b/drivers/gpu/nvgpu/volt/volt_rail.c index e44d8973..c8dc25f2 100644 --- a/drivers/gpu/nvgpu/volt/volt_rail.c +++ b/drivers/gpu/nvgpu/volt/volt_rail.c @@ -128,10 +128,10 @@ static u32 volt_rail_state_init(struct gk20a *g, return status; } -static u32 volt_rail_init_pmudata_super(struct gk20a *g, +static int volt_rail_init_pmudata_super(struct gk20a *g, struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) { - u32 status = 0; + int status = 0; struct voltage_rail *prail; struct nv_pmu_volt_volt_rail_boardobj_set *rail_pmu_data; u32 i; @@ -183,7 +183,7 @@ static struct voltage_rail *construct_volt_rail(struct gk20a *g, void *pargs) struct boardobj *board_obj_ptr = NULL; struct voltage_rail *ptemp_rail = (struct voltage_rail *)pargs; struct voltage_rail *board_obj_volt_rail_ptr = NULL; - u32 status; + int status; nvgpu_log_info(g, " "); status = boardobj_construct_super(g, &board_obj_ptr, @@ -242,9 +242,9 @@ u8 volt_rail_vbios_volt_domain_convert_to_internal(struct gk20a *g, return CTRL_VOLT_DOMAIN_INVALID; } -u32 volt_rail_pmu_setup(struct gk20a *g) +int volt_rail_pmu_setup(struct gk20a *g) { - u32 status; + int status; struct boardobjgrp *pboardobjgrp = NULL; nvgpu_log_info(g, " "); @@ -261,10 +261,10 @@ u32 volt_rail_pmu_setup(struct gk20a *g) return status; } -static u32 volt_get_volt_rail_table(struct gk20a *g, +static int volt_get_volt_rail_table(struct gk20a *g, struct voltage_rail_metadata *pvolt_rail_metadata) { - u32 status = 0; + int status = 0; u8 *volt_rail_table_ptr = NULL; struct voltage_rail *prail = NULL; struct vbios_voltage_rail_table_1x_header header = { 0 }; @@ -370,7 +370,7 @@ done: return status; } -static u32 _volt_rail_devgrp_pmudata_instget(struct gk20a *g, +static int _volt_rail_devgrp_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) { @@ -392,7 +392,7 @@ static u32 _volt_rail_devgrp_pmudata_instget(struct gk20a *g, return 0; } -static u32 _volt_rail_devgrp_pmustatus_instget(struct gk20a *g, +static int _volt_rail_devgrp_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) { @@ -411,9 +411,9 @@ static u32 _volt_rail_devgrp_pmustatus_instget(struct gk20a *g, return 0; } -u32 volt_rail_sw_setup(struct gk20a *g) +int volt_rail_sw_setup(struct gk20a *g) { - u32 status = 0; + int status = 0; struct boardobjgrp *pboardobjgrp = NULL; struct voltage_rail *pvolt_rail; u8 i; diff --git a/drivers/gpu/nvgpu/volt/volt_rail.h b/drivers/gpu/nvgpu/volt/volt_rail.h index be3cbb72..6c667eed 100644 --- a/drivers/gpu/nvgpu/volt/volt_rail.h +++ b/drivers/gpu/nvgpu/volt/volt_rail.h @@ -85,6 +85,6 @@ u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain); -u32 volt_rail_sw_setup(struct gk20a *g); -u32 volt_rail_pmu_setup(struct gk20a *g); +int volt_rail_sw_setup(struct gk20a *g); +int volt_rail_pmu_setup(struct gk20a *g); #endif -- cgit v1.2.2