From 774899f30aaae13aa92a3490714cf23fceb8ce49 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Tue, 19 Sep 2017 12:04:08 -0700 Subject: gpu: nvgpu: Change VBIOS code to use gp106 headers VBIOS code was the last code using gm206 hardware headers. Change the code to use gp106 headers instead, move the code to gp106 directory and delete gm206 HW headers. JIRA NVGPU-218 Change-Id: I7ccd6c2975c767bca871d77a701dbd3395b17f30 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1563742 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile.nvgpu | 2 +- drivers/gpu/nvgpu/clk/clk_prog.c | 2 +- drivers/gpu/nvgpu/clk/clk_vin.c | 2 +- drivers/gpu/nvgpu/gm206/bios_gm206.c | 240 -- drivers/gpu/nvgpu/gm206/bios_gm206.h | 23 - drivers/gpu/nvgpu/gp106/bios_gp106.c | 240 ++ drivers/gpu/nvgpu/gp106/bios_gp106.h | 23 + drivers/gpu/nvgpu/gp106/hal_gp106.c | 4 +- drivers/gpu/nvgpu/gp106/xve_gp106.c | 2 +- .../nvgpu/include/nvgpu/hw/gm206/hw_bus_gm206.h | 193 - .../nvgpu/include/nvgpu/hw/gm206/hw_ccsr_gm206.h | 125 - .../nvgpu/include/nvgpu/hw/gm206/hw_ce2_gm206.h | 81 - .../include/nvgpu/hw/gm206/hw_ctxsw_prog_gm206.h | 253 -- .../gpu/nvgpu/include/nvgpu/hw/gm206/hw_fb_gm206.h | 337 -- .../nvgpu/include/nvgpu/hw/gm206/hw_fbpa_gm206.h | 61 - .../nvgpu/include/nvgpu/hw/gm206/hw_fifo_gm206.h | 557 --- .../nvgpu/include/nvgpu/hw/gm206/hw_flush_gm206.h | 181 - .../nvgpu/include/nvgpu/hw/gm206/hw_fuse_gm206.h | 129 - .../nvgpu/include/nvgpu/hw/gm206/hw_gmmu_gm206.h | 1189 ------- .../gpu/nvgpu/include/nvgpu/hw/gm206/hw_gr_gm206.h | 3713 -------------------- .../nvgpu/include/nvgpu/hw/gm206/hw_ltc_gm206.h | 497 --- .../gpu/nvgpu/include/nvgpu/hw/gm206/hw_mc_gm206.h | 281 -- .../nvgpu/include/nvgpu/hw/gm206/hw_pbdma_gm206.h | 505 --- .../nvgpu/include/nvgpu/hw/gm206/hw_perf_gm206.h | 205 -- .../nvgpu/hw/gm206/hw_pri_ringmaster_gm206.h | 145 - .../nvgpu/hw/gm206/hw_pri_ringstation_sys_gm206.h | 69 - .../nvgpu/include/nvgpu/hw/gm206/hw_proj_gm206.h | 165 - .../nvgpu/include/nvgpu/hw/gm206/hw_pwr_gm206.h | 825 ----- .../nvgpu/include/nvgpu/hw/gm206/hw_ram_gm206.h | 445 --- .../nvgpu/include/nvgpu/hw/gm206/hw_timer_gm206.h | 109 - .../nvgpu/include/nvgpu/hw/gm206/hw_top_gm206.h | 225 -- .../nvgpu/include/nvgpu/hw/gm206/hw_xve_gm206.h | 69 - drivers/gpu/nvgpu/lpwr/lpwr.c | 2 +- drivers/gpu/nvgpu/lpwr/rppg.c | 2 +- drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 2 +- drivers/gpu/nvgpu/pmgr/pwrdev.c | 2 +- drivers/gpu/nvgpu/pmgr/pwrmonitor.c | 2 +- drivers/gpu/nvgpu/pmgr/pwrpolicy.c | 2 +- drivers/gpu/nvgpu/therm/thrmchannel.c | 2 +- drivers/gpu/nvgpu/therm/thrmdev.c | 2 +- drivers/gpu/nvgpu/volt/volt_dev.c | 2 +- drivers/gpu/nvgpu/volt/volt_pmu.c | 2 +- drivers/gpu/nvgpu/volt/volt_policy.c | 2 +- drivers/gpu/nvgpu/volt/volt_rail.c | 2 +- 44 files changed, 281 insertions(+), 10640 deletions(-) delete mode 100644 drivers/gpu/nvgpu/gm206/bios_gm206.c delete mode 100644 drivers/gpu/nvgpu/gm206/bios_gm206.h create mode 100644 drivers/gpu/nvgpu/gp106/bios_gp106.c create mode 100644 drivers/gpu/nvgpu/gp106/bios_gp106.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_bus_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ccsr_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ce2_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ctxsw_prog_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fb_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fbpa_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fifo_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_flush_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fuse_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gmmu_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gr_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ltc_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_mc_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pbdma_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_perf_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringmaster_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringstation_sys_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_proj_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pwr_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ram_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_timer_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_top_gm206.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_xve_gm206.h diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index e60dc0b6..d02870fb 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu @@ -113,7 +113,6 @@ nvgpu-y := \ gm20b/regops_gm20b.o \ gm20b/cde_gm20b.o \ gm20b/therm_gm20b.o \ - gm206/bios_gm206.o \ boardobj/boardobj.o \ boardobj/boardobjgrp.o \ boardobj/boardobjgrpmask.o \ @@ -199,6 +198,7 @@ nvgpu-y += \ gp106/fifo_gp106.o \ gp106/fb_gp106.o \ gp106/regops_gp106.o \ + gp106/bios_gp106.o \ pstate/pstate.o \ clk/clk_vin.o \ clk/clk_fll.o \ diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c index 047eb04a..9ac70450 100644 --- a/drivers/gpu/nvgpu/clk/clk_prog.c +++ b/drivers/gpu/nvgpu/clk/clk_prog.c @@ -20,7 +20,7 @@ #include "clk_vf_point.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "ctrl/ctrlclk.h" #include "ctrl/ctrlvolt.h" diff --git a/drivers/gpu/nvgpu/clk/clk_vin.c b/drivers/gpu/nvgpu/clk/clk_vin.c index 04f7b231..77f01212 100644 --- a/drivers/gpu/nvgpu/clk/clk_vin.c +++ b/drivers/gpu/nvgpu/clk/clk_vin.c @@ -21,7 +21,7 @@ #include "ctrl/ctrlvolt.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "clk.h" #include "clk_vin.h" diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c deleted file mode 100644 index 62dce777..00000000 --- a/drivers/gpu/nvgpu/gm206/bios_gm206.c +++ /dev/null @@ -1,240 +0,0 @@ -/* - * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include -#include -#include -#include -#include -#include - -#include "gk20a/gk20a.h" -#include "gm20b/fifo_gm20b.h" -#include "bios_gm206.h" -#include "gp106/mclk_gp106.h" -#ifdef CONFIG_DEBUG_FS -#include "common/linux/os_linux.h" -#endif - -#include -#include -#include - -#define PMU_BOOT_TIMEOUT_DEFAULT 100 /* usec */ -#define PMU_BOOT_TIMEOUT_MAX 2000000 /* usec */ -#define BIOS_OVERLAY_NAME "bios-%04x.rom" -#define BIOS_OVERLAY_NAME_FORMATTED "bios-xxxx.rom" -#define ROM_FILE_PAYLOAD_OFFSET 0xa00 -#define BIOS_SIZE 0x40000 - -static void upload_code(struct gk20a *g, u32 dst, - u8 *src, u32 size, u8 port, bool sec) -{ - nvgpu_flcn_copy_to_imem(g->pmu.flcn, dst, src, size, port, sec, - dst >> 8); -} - -static void upload_data(struct gk20a *g, u32 dst, u8 *src, u32 size, u8 port) -{ - u32 i, words; - u32 *src_u32 = (u32 *)src; - u32 blk; - - gk20a_dbg_info("upload %d bytes to %x", size, dst); - - words = DIV_ROUND_UP(size, 4); - - blk = dst >> 8; - - gk20a_dbg_info("upload %d words to %x blk %d", - words, dst, blk); - gk20a_writel(g, pwr_falcon_dmemc_r(port), - pwr_falcon_dmemc_offs_f(dst >> 2) | - pwr_falcon_dmemc_blk_f(blk) | - pwr_falcon_dmemc_aincw_f(1)); - - for (i = 0; i < words; i++) - gk20a_writel(g, pwr_falcon_dmemd_r(port), src_u32[i]); -} - -static int gm206_bios_devinit(struct gk20a *g) -{ - int err = 0; - int devinit_completed; - struct nvgpu_timeout timeout; - - gk20a_dbg_fn(""); - - if (nvgpu_flcn_reset(g->pmu.flcn)) { - err = -ETIMEDOUT; - goto out; - } - - upload_code(g, g->bios.devinit.bootloader_phys_base, - g->bios.devinit.bootloader, - g->bios.devinit.bootloader_size, - 0, 0); - upload_code(g, g->bios.devinit.phys_base, - g->bios.devinit.ucode, - g->bios.devinit.size, - 0, 1); - upload_data(g, g->bios.devinit.dmem_phys_base, - g->bios.devinit.dmem, - g->bios.devinit.dmem_size, - 0); - upload_data(g, g->bios.devinit_tables_phys_base, - g->bios.devinit_tables, - g->bios.devinit_tables_size, - 0); - upload_data(g, g->bios.devinit_script_phys_base, - g->bios.bootscripts, - g->bios.bootscripts_size, - 0); - - nvgpu_flcn_bootstrap(g->pmu.flcn, g->bios.devinit.code_entry_point); - - nvgpu_timeout_init(g, &timeout, - PMU_BOOT_TIMEOUT_MAX / - PMU_BOOT_TIMEOUT_DEFAULT, - NVGPU_TIMER_RETRY_TIMER); - do { - devinit_completed = pwr_falcon_cpuctl_halt_intr_v( - gk20a_readl(g, pwr_falcon_cpuctl_r())) && - top_scratch1_devinit_completed_v( - gk20a_readl(g, top_scratch1_r())); - nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT); - } while (!devinit_completed && !nvgpu_timeout_expired(&timeout)); - - if (nvgpu_timeout_peek_expired(&timeout)) - err = -ETIMEDOUT; - - nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, - gk20a_get_gr_idle_timeout(g)); - -out: - gk20a_dbg_fn("done"); - return err; -} - -static int gm206_bios_preos(struct gk20a *g) -{ - int err = 0; - - gk20a_dbg_fn(""); - - if (nvgpu_flcn_reset(g->pmu.flcn)) { - err = -ETIMEDOUT; - goto out; - } - - upload_code(g, g->bios.preos.bootloader_phys_base, - g->bios.preos.bootloader, - g->bios.preos.bootloader_size, - 0, 0); - upload_code(g, g->bios.preos.phys_base, - g->bios.preos.ucode, - g->bios.preos.size, - 0, 1); - upload_data(g, g->bios.preos.dmem_phys_base, - g->bios.preos.dmem, - g->bios.preos.dmem_size, - 0); - - nvgpu_flcn_bootstrap(g->pmu.flcn, g->bios.preos.code_entry_point); - - if (nvgpu_flcn_wait_for_halt(g->pmu.flcn, - PMU_BOOT_TIMEOUT_MAX / 1000)) { - err = -ETIMEDOUT; - goto out; - } - - nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, - gk20a_get_gr_idle_timeout(g)); - -out: - gk20a_dbg_fn("done"); - return err; -} - -int gm206_bios_init(struct gk20a *g) -{ - unsigned int i; -#ifdef CONFIG_DEBUG_FS - struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); - struct dentry *d; -#endif - int err; - - gk20a_dbg_fn(""); - - gk20a_dbg_info("reading bios from EEPROM"); - g->bios.size = BIOS_SIZE; - g->bios.data = nvgpu_vmalloc(g, BIOS_SIZE); - if (!g->bios.data) - return -ENOMEM; - g->ops.xve.disable_shadow_rom(g); - for (i = 0; i < g->bios.size/4; i++) { - u32 val = be32_to_cpu(gk20a_readl(g, 0x300000 + i*4)); - - g->bios.data[(i*4)] = (val >> 24) & 0xff; - g->bios.data[(i*4)+1] = (val >> 16) & 0xff; - g->bios.data[(i*4)+2] = (val >> 8) & 0xff; - g->bios.data[(i*4)+3] = val & 0xff; - } - g->ops.xve.enable_shadow_rom(g); - - err = nvgpu_bios_parse_rom(g); - if (err) - return err; - - if (g->gpu_characteristics.vbios_version < g->vbios_min_version) { - nvgpu_err(g, "unsupported VBIOS version %08x", - g->gpu_characteristics.vbios_version); - return -EINVAL; - } - - /* WAR for HW2.5 RevA (INA3221 is missing) */ - if ((g->pci_vendor_id == PCI_VENDOR_ID_NVIDIA) && - (g->pci_device_id == 0x1c75) && - (g->gpu_characteristics.vbios_version == 0x86065300)) { - g->power_sensor_missing = true; - } - -#ifdef CONFIG_DEBUG_FS - g->bios_blob.data = g->bios.data; - g->bios_blob.size = g->bios.size; - - d = debugfs_create_blob("bios", S_IRUGO, l->debugfs, - &g->bios_blob); - if (!d) - nvgpu_err(g, "No debugfs?"); -#endif - - gk20a_dbg_fn("done"); - - err = gm206_bios_devinit(g); - if (err) { - nvgpu_err(g, "devinit failed"); - return err; - } - - if (nvgpu_is_enabled(g, NVGPU_PMU_RUN_PREOS)) { - err = gm206_bios_preos(g); - if (err) { - nvgpu_err(g, "pre-os failed"); - return err; - } - } - - return 0; -} diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.h b/drivers/gpu/nvgpu/gm206/bios_gm206.h deleted file mode 100644 index 090c7d24..00000000 --- a/drivers/gpu/nvgpu/gm206/bios_gm206.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef NVGPU_BIOS_GM206_H -#define NVGPU_BIOS_GM206_H - -struct gk20a; -struct gpu_ops; - -int gm206_bios_init(struct gk20a *g); -void gm206_init_bios_ops(struct gpu_ops *gops); - -#endif diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.c b/drivers/gpu/nvgpu/gp106/bios_gp106.c new file mode 100644 index 00000000..f772e267 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/bios_gp106.c @@ -0,0 +1,240 @@ +/* + * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include + +#include "gk20a/gk20a.h" +#include "gm20b/fifo_gm20b.h" +#include "bios_gp106.h" +#include "gp106/mclk_gp106.h" +#ifdef CONFIG_DEBUG_FS +#include "common/linux/os_linux.h" +#endif + +#include +#include +#include + +#define PMU_BOOT_TIMEOUT_DEFAULT 100 /* usec */ +#define PMU_BOOT_TIMEOUT_MAX 2000000 /* usec */ +#define BIOS_OVERLAY_NAME "bios-%04x.rom" +#define BIOS_OVERLAY_NAME_FORMATTED "bios-xxxx.rom" +#define ROM_FILE_PAYLOAD_OFFSET 0xa00 +#define BIOS_SIZE 0x40000 + +static void upload_code(struct gk20a *g, u32 dst, + u8 *src, u32 size, u8 port, bool sec) +{ + nvgpu_flcn_copy_to_imem(g->pmu.flcn, dst, src, size, port, sec, + dst >> 8); +} + +static void upload_data(struct gk20a *g, u32 dst, u8 *src, u32 size, u8 port) +{ + u32 i, words; + u32 *src_u32 = (u32 *)src; + u32 blk; + + gk20a_dbg_info("upload %d bytes to %x", size, dst); + + words = DIV_ROUND_UP(size, 4); + + blk = dst >> 8; + + gk20a_dbg_info("upload %d words to %x blk %d", + words, dst, blk); + gk20a_writel(g, pwr_falcon_dmemc_r(port), + pwr_falcon_dmemc_offs_f(dst >> 2) | + pwr_falcon_dmemc_blk_f(blk) | + pwr_falcon_dmemc_aincw_f(1)); + + for (i = 0; i < words; i++) + gk20a_writel(g, pwr_falcon_dmemd_r(port), src_u32[i]); +} + +static int gp106_bios_devinit(struct gk20a *g) +{ + int err = 0; + int devinit_completed; + struct nvgpu_timeout timeout; + + gk20a_dbg_fn(""); + + if (nvgpu_flcn_reset(g->pmu.flcn)) { + err = -ETIMEDOUT; + goto out; + } + + upload_code(g, g->bios.devinit.bootloader_phys_base, + g->bios.devinit.bootloader, + g->bios.devinit.bootloader_size, + 0, 0); + upload_code(g, g->bios.devinit.phys_base, + g->bios.devinit.ucode, + g->bios.devinit.size, + 0, 1); + upload_data(g, g->bios.devinit.dmem_phys_base, + g->bios.devinit.dmem, + g->bios.devinit.dmem_size, + 0); + upload_data(g, g->bios.devinit_tables_phys_base, + g->bios.devinit_tables, + g->bios.devinit_tables_size, + 0); + upload_data(g, g->bios.devinit_script_phys_base, + g->bios.bootscripts, + g->bios.bootscripts_size, + 0); + + nvgpu_flcn_bootstrap(g->pmu.flcn, g->bios.devinit.code_entry_point); + + nvgpu_timeout_init(g, &timeout, + PMU_BOOT_TIMEOUT_MAX / + PMU_BOOT_TIMEOUT_DEFAULT, + NVGPU_TIMER_RETRY_TIMER); + do { + devinit_completed = pwr_falcon_cpuctl_halt_intr_v( + gk20a_readl(g, pwr_falcon_cpuctl_r())) && + top_scratch1_devinit_completed_v( + gk20a_readl(g, top_scratch1_r())); + nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT); + } while (!devinit_completed && !nvgpu_timeout_expired(&timeout)); + + if (nvgpu_timeout_peek_expired(&timeout)) + err = -ETIMEDOUT; + + nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, + gk20a_get_gr_idle_timeout(g)); + +out: + gk20a_dbg_fn("done"); + return err; +} + +static int gp106_bios_preos(struct gk20a *g) +{ + int err = 0; + + gk20a_dbg_fn(""); + + if (nvgpu_flcn_reset(g->pmu.flcn)) { + err = -ETIMEDOUT; + goto out; + } + + upload_code(g, g->bios.preos.bootloader_phys_base, + g->bios.preos.bootloader, + g->bios.preos.bootloader_size, + 0, 0); + upload_code(g, g->bios.preos.phys_base, + g->bios.preos.ucode, + g->bios.preos.size, + 0, 1); + upload_data(g, g->bios.preos.dmem_phys_base, + g->bios.preos.dmem, + g->bios.preos.dmem_size, + 0); + + nvgpu_flcn_bootstrap(g->pmu.flcn, g->bios.preos.code_entry_point); + + if (nvgpu_flcn_wait_for_halt(g->pmu.flcn, + PMU_BOOT_TIMEOUT_MAX / 1000)) { + err = -ETIMEDOUT; + goto out; + } + + nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, + gk20a_get_gr_idle_timeout(g)); + +out: + gk20a_dbg_fn("done"); + return err; +} + +int gp106_bios_init(struct gk20a *g) +{ + unsigned int i; +#ifdef CONFIG_DEBUG_FS + struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); + struct dentry *d; +#endif + int err; + + gk20a_dbg_fn(""); + + gk20a_dbg_info("reading bios from EEPROM"); + g->bios.size = BIOS_SIZE; + g->bios.data = nvgpu_vmalloc(g, BIOS_SIZE); + if (!g->bios.data) + return -ENOMEM; + g->ops.xve.disable_shadow_rom(g); + for (i = 0; i < g->bios.size/4; i++) { + u32 val = be32_to_cpu(gk20a_readl(g, 0x300000 + i*4)); + + g->bios.data[(i*4)] = (val >> 24) & 0xff; + g->bios.data[(i*4)+1] = (val >> 16) & 0xff; + g->bios.data[(i*4)+2] = (val >> 8) & 0xff; + g->bios.data[(i*4)+3] = val & 0xff; + } + g->ops.xve.enable_shadow_rom(g); + + err = nvgpu_bios_parse_rom(g); + if (err) + return err; + + if (g->gpu_characteristics.vbios_version < g->vbios_min_version) { + nvgpu_err(g, "unsupported VBIOS version %08x", + g->gpu_characteristics.vbios_version); + return -EINVAL; + } + + /* WAR for HW2.5 RevA (INA3221 is missing) */ + if ((g->pci_vendor_id == PCI_VENDOR_ID_NVIDIA) && + (g->pci_device_id == 0x1c75) && + (g->gpu_characteristics.vbios_version == 0x86065300)) { + g->power_sensor_missing = true; + } + +#ifdef CONFIG_DEBUG_FS + g->bios_blob.data = g->bios.data; + g->bios_blob.size = g->bios.size; + + d = debugfs_create_blob("bios", S_IRUGO, l->debugfs, + &g->bios_blob); + if (!d) + nvgpu_err(g, "No debugfs?"); +#endif + + gk20a_dbg_fn("done"); + + err = gp106_bios_devinit(g); + if (err) { + nvgpu_err(g, "devinit failed"); + return err; + } + + if (nvgpu_is_enabled(g, NVGPU_PMU_RUN_PREOS)) { + err = gp106_bios_preos(g); + if (err) { + nvgpu_err(g, "pre-os failed"); + return err; + } + } + + return 0; +} diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.h b/drivers/gpu/nvgpu/gp106/bios_gp106.h new file mode 100644 index 00000000..7eff0772 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/bios_gp106.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef NVGPU_BIOS_GP106_H +#define NVGPU_BIOS_GP106_H + +struct gk20a; +struct gpu_ops; + +int gp106_bios_init(struct gk20a *g); +void gp106_init_bios_ops(struct gpu_ops *gops); + +#endif diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 10b26712..a0546915 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -60,7 +60,7 @@ #include "gp106/clk_gp106.h" #include "gp106/clk_arb_gp106.h" #include "gp106/mclk_gp106.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "gp106/therm_gp106.h" #include "gp106/xve_gp106.h" #include "gp106/fifo_gp106.h" @@ -685,7 +685,7 @@ static const struct gpu_ops gp106_ops = { }, .get_litter_value = gp106_get_litter_value, .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, - .bios_init = gm206_bios_init, + .bios_init = gp106_bios_init, }; int gp106_init_hal(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.c b/drivers/gpu/nvgpu/gp106/xve_gp106.c index 3a84ca17..3b996ef7 100644 --- a/drivers/gpu/nvgpu/gp106/xve_gp106.c +++ b/drivers/gpu/nvgpu/gp106/xve_gp106.c @@ -15,7 +15,7 @@ */ #include "gk20a/gk20a.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "gp106/xve_gp106.h" #include "common/linux/os_linux.h" diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_bus_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_bus_gm206.h deleted file mode 100644 index de1884f5..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_bus_gm206.h +++ /dev/null @@ -1,193 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_bus_gm206_h_ -#define _hw_bus_gm206_h_ - -static inline u32 bus_bar1_block_r(void) -{ - return 0x00001704; -} -static inline u32 bus_bar1_block_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 bus_bar1_block_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 bus_bar1_block_target_sys_mem_coh_f(void) -{ - return 0x20000000; -} -static inline u32 bus_bar1_block_target_sys_mem_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 bus_bar1_block_mode_virtual_f(void) -{ - return 0x80000000; -} -static inline u32 bus_bar2_block_r(void) -{ - return 0x00001714; -} -static inline u32 bus_bar2_block_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 bus_bar2_block_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 bus_bar2_block_target_sys_mem_coh_f(void) -{ - return 0x20000000; -} -static inline u32 bus_bar2_block_target_sys_mem_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 bus_bar2_block_mode_virtual_f(void) -{ - return 0x80000000; -} -static inline u32 bus_bar1_block_ptr_shift_v(void) -{ - return 0x0000000c; -} -static inline u32 bus_bar2_block_ptr_shift_v(void) -{ - return 0x0000000c; -} -static inline u32 bus_bind_status_r(void) -{ - return 0x00001710; -} -static inline u32 bus_bind_status_bar1_pending_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 bus_bind_status_bar1_pending_empty_f(void) -{ - return 0x0; -} -static inline u32 bus_bind_status_bar1_pending_busy_f(void) -{ - return 0x1; -} -static inline u32 bus_bind_status_bar1_outstanding_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 bus_bind_status_bar1_outstanding_false_f(void) -{ - return 0x0; -} -static inline u32 bus_bind_status_bar1_outstanding_true_f(void) -{ - return 0x2; -} -static inline u32 bus_bind_status_bar2_pending_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 bus_bind_status_bar2_pending_empty_f(void) -{ - return 0x0; -} -static inline u32 bus_bind_status_bar2_pending_busy_f(void) -{ - return 0x4; -} -static inline u32 bus_bind_status_bar2_outstanding_v(u32 r) -{ - return (r >> 3) & 0x1; -} -static inline u32 bus_bind_status_bar2_outstanding_false_f(void) -{ - return 0x0; -} -static inline u32 bus_bind_status_bar2_outstanding_true_f(void) -{ - return 0x8; -} -static inline u32 bus_intr_0_r(void) -{ - return 0x00001100; -} -static inline u32 bus_intr_0_pri_squash_m(void) -{ - return 0x1 << 1; -} -static inline u32 bus_intr_0_pri_fecserr_m(void) -{ - return 0x1 << 2; -} -static inline u32 bus_intr_0_pri_timeout_m(void) -{ - return 0x1 << 3; -} -static inline u32 bus_intr_en_0_r(void) -{ - return 0x00001140; -} -static inline u32 bus_intr_en_0_pri_squash_m(void) -{ - return 0x1 << 1; -} -static inline u32 bus_intr_en_0_pri_fecserr_m(void) -{ - return 0x1 << 2; -} -static inline u32 bus_intr_en_0_pri_timeout_m(void) -{ - return 0x1 << 3; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ccsr_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ccsr_gm206.h deleted file mode 100644 index 729ad2e9..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ccsr_gm206.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_ccsr_gm206_h_ -#define _hw_ccsr_gm206_h_ - -static inline u32 ccsr_channel_inst_r(u32 i) -{ - return 0x00800000 + i*8; -} -static inline u32 ccsr_channel_inst__size_1_v(void) -{ - return 0x00001000; -} -static inline u32 ccsr_channel_inst_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 ccsr_channel_inst_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 ccsr_channel_inst_target_sys_mem_coh_f(void) -{ - return 0x20000000; -} -static inline u32 ccsr_channel_inst_target_sys_mem_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 ccsr_channel_inst_bind_false_f(void) -{ - return 0x0; -} -static inline u32 ccsr_channel_inst_bind_true_f(void) -{ - return 0x80000000; -} -static inline u32 ccsr_channel_r(u32 i) -{ - return 0x00800004 + i*8; -} -static inline u32 ccsr_channel__size_1_v(void) -{ - return 0x00001000; -} -static inline u32 ccsr_channel_enable_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ccsr_channel_enable_set_f(u32 v) -{ - return (v & 0x1) << 10; -} -static inline u32 ccsr_channel_enable_set_true_f(void) -{ - return 0x400; -} -static inline u32 ccsr_channel_enable_clr_true_f(void) -{ - return 0x800; -} -static inline u32 ccsr_channel_status_v(u32 r) -{ - return (r >> 24) & 0xf; -} -static inline u32 ccsr_channel_status_pending_ctx_reload_v(void) -{ - return 0x00000002; -} -static inline u32 ccsr_channel_busy_v(u32 r) -{ - return (r >> 28) & 0x1; -} -static inline u32 ccsr_channel_next_v(u32 r) -{ - return (r >> 1) & 0x1; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ce2_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ce2_gm206.h deleted file mode 100644 index 2eda4a9e..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ce2_gm206.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_ce2_gm206_h_ -#define _hw_ce2_gm206_h_ - -static inline u32 ce2_intr_status_r(void) -{ - return 0x00106908; -} -static inline u32 ce2_intr_status_blockpipe_pending_f(void) -{ - return 0x1; -} -static inline u32 ce2_intr_status_blockpipe_reset_f(void) -{ - return 0x1; -} -static inline u32 ce2_intr_status_nonblockpipe_pending_f(void) -{ - return 0x2; -} -static inline u32 ce2_intr_status_nonblockpipe_reset_f(void) -{ - return 0x2; -} -static inline u32 ce2_intr_status_launcherr_pending_f(void) -{ - return 0x4; -} -static inline u32 ce2_intr_status_launcherr_reset_f(void) -{ - return 0x4; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ctxsw_prog_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ctxsw_prog_gm206.h deleted file mode 100644 index adb2f64c..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ctxsw_prog_gm206.h +++ /dev/null @@ -1,253 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_ctxsw_prog_gm206_h_ -#define _hw_ctxsw_prog_gm206_h_ - -static inline u32 ctxsw_prog_fecs_header_v(void) -{ - return 0x00000100; -} -static inline u32 ctxsw_prog_main_image_num_gpcs_o(void) -{ - return 0x00000008; -} -static inline u32 ctxsw_prog_main_image_patch_count_o(void) -{ - return 0x00000010; -} -static inline u32 ctxsw_prog_main_image_patch_adr_lo_o(void) -{ - return 0x00000014; -} -static inline u32 ctxsw_prog_main_image_patch_adr_hi_o(void) -{ - return 0x00000018; -} -static inline u32 ctxsw_prog_main_image_zcull_o(void) -{ - return 0x0000001c; -} -static inline u32 ctxsw_prog_main_image_zcull_mode_no_ctxsw_v(void) -{ - return 0x00000001; -} -static inline u32 ctxsw_prog_main_image_zcull_mode_separate_buffer_v(void) -{ - return 0x00000002; -} -static inline u32 ctxsw_prog_main_image_zcull_ptr_o(void) -{ - return 0x00000020; -} -static inline u32 ctxsw_prog_main_image_pm_o(void) -{ - return 0x00000028; -} -static inline u32 ctxsw_prog_main_image_pm_mode_m(void) -{ - return 0x7 << 0; -} -static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) -{ - return 0x0; -} -static inline u32 ctxsw_prog_main_image_pm_smpc_mode_m(void) -{ - return 0x7 << 3; -} -static inline u32 ctxsw_prog_main_image_pm_smpc_mode_ctxsw_f(void) -{ - return 0x8; -} -static inline u32 ctxsw_prog_main_image_pm_smpc_mode_no_ctxsw_f(void) -{ - return 0x0; -} -static inline u32 ctxsw_prog_main_image_pm_ptr_o(void) -{ - return 0x0000002c; -} -static inline u32 ctxsw_prog_main_image_num_save_ops_o(void) -{ - return 0x000000f4; -} -static inline u32 ctxsw_prog_main_image_num_restore_ops_o(void) -{ - return 0x000000f8; -} -static inline u32 ctxsw_prog_main_image_magic_value_o(void) -{ - return 0x000000fc; -} -static inline u32 ctxsw_prog_main_image_magic_value_v_value_v(void) -{ - return 0x600dc0de; -} -static inline u32 ctxsw_prog_local_priv_register_ctl_o(void) -{ - return 0x0000000c; -} -static inline u32 ctxsw_prog_local_priv_register_ctl_offset_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 ctxsw_prog_local_image_ppc_info_o(void) -{ - return 0x000000f4; -} -static inline u32 ctxsw_prog_local_image_ppc_info_num_ppcs_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 ctxsw_prog_local_image_ppc_info_ppc_mask_v(u32 r) -{ - return (r >> 16) & 0xffff; -} -static inline u32 ctxsw_prog_local_image_num_tpcs_o(void) -{ - return 0x000000f8; -} -static inline u32 ctxsw_prog_local_magic_value_o(void) -{ - return 0x000000fc; -} -static inline u32 ctxsw_prog_local_magic_value_v_value_v(void) -{ - return 0xad0becab; -} -static inline u32 ctxsw_prog_main_extended_buffer_ctl_o(void) -{ - return 0x000000ec; -} -static inline u32 ctxsw_prog_main_extended_buffer_ctl_offset_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 ctxsw_prog_main_extended_buffer_ctl_size_v(u32 r) -{ - return (r >> 16) & 0xff; -} -static inline u32 ctxsw_prog_extended_buffer_segments_size_in_bytes_v(void) -{ - return 0x00000100; -} -static inline u32 ctxsw_prog_extended_marker_size_in_bytes_v(void) -{ - return 0x00000004; -} -static inline u32 ctxsw_prog_extended_sm_dsm_perf_counter_register_stride_v(void) -{ - return 0x00000000; -} -static inline u32 ctxsw_prog_extended_sm_dsm_perf_counter_control_register_stride_v(void) -{ - return 0x00000002; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_config_o(void) -{ - return 0x000000a0; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_s(void) -{ - return 2; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_f(u32 v) -{ - return (v & 0x3) << 0; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_m(void) -{ - return 0x3 << 0; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_v(u32 r) -{ - return (r >> 0) & 0x3; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_allow_all_f(void) -{ - return 0x0; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_use_map_f(void) -{ - return 0x2; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_addr_lo_o(void) -{ - return 0x000000a4; -} -static inline u32 ctxsw_prog_main_image_priv_access_map_addr_hi_o(void) -{ - return 0x000000a8; -} -static inline u32 ctxsw_prog_main_image_misc_options_o(void) -{ - return 0x0000003c; -} -static inline u32 ctxsw_prog_main_image_misc_options_verif_features_m(void) -{ - return 0x1 << 3; -} -static inline u32 ctxsw_prog_main_image_misc_options_verif_features_disabled_f(void) -{ - return 0x0; -} -static inline u32 ctxsw_prog_main_image_preemption_options_o(void) -{ - return 0x00000060; -} -static inline u32 ctxsw_prog_main_image_preemption_options_control_f(u32 v) -{ - return (v & 0x3) << 0; -} -static inline u32 ctxsw_prog_main_image_preemption_options_control_cta_enabled_f(void) -{ - return 0x1; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fb_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fb_gm206.h deleted file mode 100644 index 6d4b31c6..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fb_gm206.h +++ /dev/null @@ -1,337 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_fb_gm206_h_ -#define _hw_fb_gm206_h_ - -static inline u32 fb_fbhub_num_active_ltcs_r(void) -{ - return 0x00100800; -} -static inline u32 fb_mmu_ctrl_r(void) -{ - return 0x00100c80; -} -static inline u32 fb_mmu_ctrl_vm_pg_size_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void) -{ - return 0x1; -} -static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r) -{ - return (r >> 15) & 0x1; -} -static inline u32 fb_mmu_ctrl_pri_fifo_empty_false_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r) -{ - return (r >> 16) & 0xff; -} -static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_v(u32 r) -{ - return (r >> 11) & 0x1; -} -static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_true_f(void) -{ - return 0x800; -} -static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_false_f(void) -{ - return 0x0; -} -static inline u32 fb_priv_mmu_phy_secure_r(void) -{ - return 0x00100ce4; -} -static inline u32 fb_mmu_invalidate_pdb_r(void) -{ - return 0x00100cb8; -} -static inline u32 fb_mmu_invalidate_pdb_aperture_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_invalidate_pdb_aperture_sys_mem_f(void) -{ - return 0x2; -} -static inline u32 fb_mmu_invalidate_pdb_addr_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 fb_mmu_invalidate_r(void) -{ - return 0x00100cbc; -} -static inline u32 fb_mmu_invalidate_all_va_true_f(void) -{ - return 0x1; -} -static inline u32 fb_mmu_invalidate_all_pdb_true_f(void) -{ - return 0x2; -} -static inline u32 fb_mmu_invalidate_trigger_s(void) -{ - return 1; -} -static inline u32 fb_mmu_invalidate_trigger_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 fb_mmu_invalidate_trigger_m(void) -{ - return 0x1 << 31; -} -static inline u32 fb_mmu_invalidate_trigger_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 fb_mmu_invalidate_trigger_true_f(void) -{ - return 0x80000000; -} -static inline u32 fb_mmu_debug_wr_r(void) -{ - return 0x00100cc8; -} -static inline u32 fb_mmu_debug_wr_aperture_s(void) -{ - return 2; -} -static inline u32 fb_mmu_debug_wr_aperture_f(u32 v) -{ - return (v & 0x3) << 0; -} -static inline u32 fb_mmu_debug_wr_aperture_m(void) -{ - return 0x3 << 0; -} -static inline u32 fb_mmu_debug_wr_aperture_v(u32 r) -{ - return (r >> 0) & 0x3; -} -static inline u32 fb_mmu_debug_wr_aperture_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_debug_wr_aperture_sys_mem_coh_f(void) -{ - return 0x2; -} -static inline u32 fb_mmu_debug_wr_aperture_sys_mem_ncoh_f(void) -{ - return 0x3; -} -static inline u32 fb_mmu_debug_wr_vol_false_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_debug_wr_vol_true_v(void) -{ - return 0x00000001; -} -static inline u32 fb_mmu_debug_wr_vol_true_f(void) -{ - return 0x4; -} -static inline u32 fb_mmu_debug_wr_addr_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 fb_mmu_debug_wr_addr_alignment_v(void) -{ - return 0x0000000c; -} -static inline u32 fb_mmu_debug_rd_r(void) -{ - return 0x00100ccc; -} -static inline u32 fb_mmu_debug_rd_aperture_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_debug_rd_aperture_sys_mem_coh_f(void) -{ - return 0x2; -} -static inline u32 fb_mmu_debug_rd_aperture_sys_mem_ncoh_f(void) -{ - return 0x3; -} -static inline u32 fb_mmu_debug_rd_vol_false_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_debug_rd_addr_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 fb_mmu_debug_rd_addr_alignment_v(void) -{ - return 0x0000000c; -} -static inline u32 fb_mmu_debug_ctrl_r(void) -{ - return 0x00100cc4; -} -static inline u32 fb_mmu_debug_ctrl_debug_v(u32 r) -{ - return (r >> 16) & 0x1; -} -static inline u32 fb_mmu_debug_ctrl_debug_m(void) -{ - return 0x1 << 16; -} -static inline u32 fb_mmu_debug_ctrl_debug_enabled_v(void) -{ - return 0x00000001; -} -static inline u32 fb_mmu_debug_ctrl_debug_enabled_f(void) -{ - return 0x10000; -} -static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) -{ - return 0x00000000; -} -static inline u32 fb_mmu_debug_ctrl_debug_disabled_f(void) -{ - return 0x0; -} -static inline u32 fb_mmu_vpr_info_r(void) -{ - return 0x00100cd0; -} -static inline u32 fb_mmu_vpr_info_index_f(u32 v) -{ - return (v & 0x3) << 0; -} -static inline u32 fb_mmu_vpr_info_index_v(u32 r) -{ - return (r >> 0) & 0x3; -} -static inline u32 fb_mmu_vpr_info_index_addr_lo_v(void) -{ - return 0x00000000; -} -static inline u32 fb_mmu_vpr_info_index_addr_hi_v(void) -{ - return 0x00000001; -} -static inline u32 fb_mmu_vpr_info_index_cya_lo_v(void) -{ - return 0x00000002; -} -static inline u32 fb_mmu_vpr_info_index_cya_hi_v(void) -{ - return 0x00000003; -} -static inline u32 fb_mmu_vpr_info_fetch_f(u32 v) -{ - return (v & 0x1) << 2; -} -static inline u32 fb_mmu_vpr_info_fetch_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 fb_mmu_vpr_info_fetch_false_v(void) -{ - return 0x00000000; -} -static inline u32 fb_mmu_vpr_info_fetch_true_v(void) -{ - return 0x00000001; -} -static inline u32 fb_mmu_wpr_info_r(void) -{ - return 0x00100cd4; -} -static inline u32 fb_mmu_wpr_info_index_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 fb_mmu_wpr_info_index_allow_read_v(void) -{ - return 0x00000000; -} -static inline u32 fb_mmu_wpr_info_index_allow_write_v(void) -{ - return 0x00000001; -} -static inline u32 fb_mmu_wpr_info_index_wpr1_addr_lo_v(void) -{ - return 0x00000002; -} -static inline u32 fb_mmu_wpr_info_index_wpr1_addr_hi_v(void) -{ - return 0x00000003; -} -static inline u32 fb_mmu_wpr_info_index_wpr2_addr_lo_v(void) -{ - return 0x00000004; -} -static inline u32 fb_mmu_wpr_info_index_wpr2_addr_hi_v(void) -{ - return 0x00000005; -} -static inline u32 fb_niso_flush_sysmem_addr_r(void) -{ - return 0x00100c10; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fbpa_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fbpa_gm206.h deleted file mode 100644 index 3a1d1981..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fbpa_gm206.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_fbpa_gp106_h_ -#define _hw_fbpa_gp106_h_ - -static inline u32 fbpa_cstatus_r(void) -{ - return 0x0010f20c; -} -static inline u32 fbpa_cstatus_ramamount_v(u32 r) -{ - return (r >> 0) & 0x1ffff; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fifo_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fifo_gm206.h deleted file mode 100644 index 19148b03..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fifo_gm206.h +++ /dev/null @@ -1,557 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_fifo_gm206_h_ -#define _hw_fifo_gm206_h_ - -static inline u32 fifo_bar1_base_r(void) -{ - return 0x00002254; -} -static inline u32 fifo_bar1_base_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 fifo_bar1_base_ptr_align_shift_v(void) -{ - return 0x0000000c; -} -static inline u32 fifo_bar1_base_valid_false_f(void) -{ - return 0x0; -} -static inline u32 fifo_bar1_base_valid_true_f(void) -{ - return 0x10000000; -} -static inline u32 fifo_runlist_base_r(void) -{ - return 0x00002270; -} -static inline u32 fifo_runlist_base_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 fifo_runlist_base_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 fifo_runlist_base_target_sys_mem_coh_f(void) -{ - return 0x20000000; -} -static inline u32 fifo_runlist_base_target_sys_mem_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 fifo_runlist_r(void) -{ - return 0x00002274; -} -static inline u32 fifo_runlist_engine_f(u32 v) -{ - return (v & 0xf) << 20; -} -static inline u32 fifo_eng_runlist_base_r(u32 i) -{ - return 0x00002280 + i*8; -} -static inline u32 fifo_eng_runlist_base__size_1_v(void) -{ - return 0x00000007; -} -static inline u32 fifo_eng_runlist_r(u32 i) -{ - return 0x00002284 + i*8; -} -static inline u32 fifo_eng_runlist__size_1_v(void) -{ - return 0x00000007; -} -static inline u32 fifo_eng_runlist_length_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 fifo_eng_runlist_length_max_v(void) -{ - return 0x0000ffff; -} -static inline u32 fifo_eng_runlist_pending_true_f(void) -{ - return 0x100000; -} -static inline u32 fifo_pb_timeslice_r(u32 i) -{ - return 0x00002350 + i*4; -} -static inline u32 fifo_pb_timeslice_timeout_16_f(void) -{ - return 0x10; -} -static inline u32 fifo_pb_timeslice_timescale_0_f(void) -{ - return 0x0; -} -static inline u32 fifo_pb_timeslice_enable_true_f(void) -{ - return 0x10000000; -} -static inline u32 fifo_pbdma_map_r(u32 i) -{ - return 0x00002390 + i*4; -} -static inline u32 fifo_intr_0_r(void) -{ - return 0x00002100; -} -static inline u32 fifo_intr_0_bind_error_pending_f(void) -{ - return 0x1; -} -static inline u32 fifo_intr_0_bind_error_reset_f(void) -{ - return 0x1; -} -static inline u32 fifo_intr_0_sched_error_pending_f(void) -{ - return 0x100; -} -static inline u32 fifo_intr_0_sched_error_reset_f(void) -{ - return 0x100; -} -static inline u32 fifo_intr_0_chsw_error_pending_f(void) -{ - return 0x10000; -} -static inline u32 fifo_intr_0_chsw_error_reset_f(void) -{ - return 0x10000; -} -static inline u32 fifo_intr_0_fb_flush_timeout_pending_f(void) -{ - return 0x800000; -} -static inline u32 fifo_intr_0_fb_flush_timeout_reset_f(void) -{ - return 0x800000; -} -static inline u32 fifo_intr_0_lb_error_pending_f(void) -{ - return 0x1000000; -} -static inline u32 fifo_intr_0_lb_error_reset_f(void) -{ - return 0x1000000; -} -static inline u32 fifo_intr_0_dropped_mmu_fault_pending_f(void) -{ - return 0x8000000; -} -static inline u32 fifo_intr_0_dropped_mmu_fault_reset_f(void) -{ - return 0x8000000; -} -static inline u32 fifo_intr_0_mmu_fault_pending_f(void) -{ - return 0x10000000; -} -static inline u32 fifo_intr_0_pbdma_intr_pending_f(void) -{ - return 0x20000000; -} -static inline u32 fifo_intr_0_runlist_event_pending_f(void) -{ - return 0x40000000; -} -static inline u32 fifo_intr_0_channel_intr_pending_f(void) -{ - return 0x80000000; -} -static inline u32 fifo_intr_en_0_r(void) -{ - return 0x00002140; -} -static inline u32 fifo_intr_en_0_sched_error_f(u32 v) -{ - return (v & 0x1) << 8; -} -static inline u32 fifo_intr_en_0_sched_error_m(void) -{ - return 0x1 << 8; -} -static inline u32 fifo_intr_en_0_mmu_fault_f(u32 v) -{ - return (v & 0x1) << 28; -} -static inline u32 fifo_intr_en_0_mmu_fault_m(void) -{ - return 0x1 << 28; -} -static inline u32 fifo_intr_en_1_r(void) -{ - return 0x00002528; -} -static inline u32 fifo_intr_bind_error_r(void) -{ - return 0x0000252c; -} -static inline u32 fifo_intr_sched_error_r(void) -{ - return 0x0000254c; -} -static inline u32 fifo_intr_sched_error_code_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 fifo_intr_sched_error_code_ctxsw_timeout_v(void) -{ - return 0x0000000a; -} -static inline u32 fifo_intr_chsw_error_r(void) -{ - return 0x0000256c; -} -static inline u32 fifo_intr_mmu_fault_id_r(void) -{ - return 0x0000259c; -} -static inline u32 fifo_intr_mmu_fault_eng_id_graphics_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_intr_mmu_fault_eng_id_graphics_f(void) -{ - return 0x0; -} -static inline u32 fifo_intr_mmu_fault_inst_r(u32 i) -{ - return 0x00002800 + i*16; -} -static inline u32 fifo_intr_mmu_fault_inst_ptr_v(u32 r) -{ - return (r >> 0) & 0xfffffff; -} -static inline u32 fifo_intr_mmu_fault_inst_ptr_align_shift_v(void) -{ - return 0x0000000c; -} -static inline u32 fifo_intr_mmu_fault_lo_r(u32 i) -{ - return 0x00002804 + i*16; -} -static inline u32 fifo_intr_mmu_fault_hi_r(u32 i) -{ - return 0x00002808 + i*16; -} -static inline u32 fifo_intr_mmu_fault_info_r(u32 i) -{ - return 0x0000280c + i*16; -} -static inline u32 fifo_intr_mmu_fault_info_type_v(u32 r) -{ - return (r >> 0) & 0xf; -} -static inline u32 fifo_intr_mmu_fault_info_engine_subid_v(u32 r) -{ - return (r >> 6) & 0x1; -} -static inline u32 fifo_intr_mmu_fault_info_engine_subid_gpc_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_intr_mmu_fault_info_engine_subid_hub_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_intr_mmu_fault_info_client_v(u32 r) -{ - return (r >> 8) & 0x3f; -} -static inline u32 fifo_intr_pbdma_id_r(void) -{ - return 0x000025a0; -} -static inline u32 fifo_intr_pbdma_id_status_f(u32 v, u32 i) -{ - return (v & 0x1) << (0 + i*1); -} -static inline u32 fifo_intr_pbdma_id_status__size_1_v(void) -{ - return 0x00000003; -} -static inline u32 fifo_intr_runlist_r(void) -{ - return 0x00002a00; -} -static inline u32 fifo_fb_timeout_r(void) -{ - return 0x00002a04; -} -static inline u32 fifo_fb_timeout_period_m(void) -{ - return 0x3fffffff << 0; -} -static inline u32 fifo_fb_timeout_period_max_f(void) -{ - return 0x3fffffff; -} -static inline u32 fifo_error_sched_disable_r(void) -{ - return 0x0000262c; -} -static inline u32 fifo_sched_disable_r(void) -{ - return 0x00002630; -} -static inline u32 fifo_sched_disable_runlist_f(u32 v, u32 i) -{ - return (v & 0x1) << (0 + i*1); -} -static inline u32 fifo_sched_disable_runlist_m(u32 i) -{ - return 0x1 << (0 + i*1); -} -static inline u32 fifo_sched_disable_true_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_preempt_r(void) -{ - return 0x00002634; -} -static inline u32 fifo_preempt_pending_true_f(void) -{ - return 0x100000; -} -static inline u32 fifo_preempt_type_channel_f(void) -{ - return 0x0; -} -static inline u32 fifo_preempt_type_tsg_f(void) -{ - return 0x1000000; -} -static inline u32 fifo_preempt_chid_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 fifo_preempt_id_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 fifo_trigger_mmu_fault_r(u32 i) -{ - return 0x00002a30 + i*4; -} -static inline u32 fifo_trigger_mmu_fault_id_f(u32 v) -{ - return (v & 0x1f) << 0; -} -static inline u32 fifo_trigger_mmu_fault_enable_f(u32 v) -{ - return (v & 0x1) << 8; -} -static inline u32 fifo_engine_status_r(u32 i) -{ - return 0x00002640 + i*8; -} -static inline u32 fifo_engine_status__size_1_v(void) -{ - return 0x00000008; -} -static inline u32 fifo_engine_status_id_v(u32 r) -{ - return (r >> 0) & 0xfff; -} -static inline u32 fifo_engine_status_id_type_v(u32 r) -{ - return (r >> 12) & 0x1; -} -static inline u32 fifo_engine_status_id_type_chid_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_engine_status_id_type_tsgid_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_engine_status_ctx_status_v(u32 r) -{ - return (r >> 13) & 0x7; -} -static inline u32 fifo_engine_status_ctx_status_invalid_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_engine_status_ctx_status_valid_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_engine_status_ctx_status_ctxsw_load_v(void) -{ - return 0x00000005; -} -static inline u32 fifo_engine_status_ctx_status_ctxsw_save_v(void) -{ - return 0x00000006; -} -static inline u32 fifo_engine_status_ctx_status_ctxsw_switch_v(void) -{ - return 0x00000007; -} -static inline u32 fifo_engine_status_next_id_v(u32 r) -{ - return (r >> 16) & 0xfff; -} -static inline u32 fifo_engine_status_next_id_type_v(u32 r) -{ - return (r >> 28) & 0x1; -} -static inline u32 fifo_engine_status_next_id_type_chid_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_engine_status_faulted_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 fifo_engine_status_faulted_true_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_engine_status_engine_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 fifo_engine_status_engine_idle_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_engine_status_engine_busy_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_engine_status_ctxsw_v(u32 r) -{ - return (r >> 15) & 0x1; -} -static inline u32 fifo_engine_status_ctxsw_in_progress_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_engine_status_ctxsw_in_progress_f(void) -{ - return 0x8000; -} -static inline u32 fifo_pbdma_status_r(u32 i) -{ - return 0x00003080 + i*4; -} -static inline u32 fifo_pbdma_status__size_1_v(void) -{ - return 0x00000003; -} -static inline u32 fifo_pbdma_status_id_v(u32 r) -{ - return (r >> 0) & 0xfff; -} -static inline u32 fifo_pbdma_status_id_type_v(u32 r) -{ - return (r >> 12) & 0x1; -} -static inline u32 fifo_pbdma_status_id_type_chid_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_pbdma_status_id_type_tsgid_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_pbdma_status_chan_status_v(u32 r) -{ - return (r >> 13) & 0x7; -} -static inline u32 fifo_pbdma_status_chan_status_valid_v(void) -{ - return 0x00000001; -} -static inline u32 fifo_pbdma_status_chan_status_chsw_load_v(void) -{ - return 0x00000005; -} -static inline u32 fifo_pbdma_status_chan_status_chsw_save_v(void) -{ - return 0x00000006; -} -static inline u32 fifo_pbdma_status_chan_status_chsw_switch_v(void) -{ - return 0x00000007; -} -static inline u32 fifo_pbdma_status_next_id_v(u32 r) -{ - return (r >> 16) & 0xfff; -} -static inline u32 fifo_pbdma_status_next_id_type_v(u32 r) -{ - return (r >> 28) & 0x1; -} -static inline u32 fifo_pbdma_status_next_id_type_chid_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_pbdma_status_chsw_v(u32 r) -{ - return (r >> 15) & 0x1; -} -static inline u32 fifo_pbdma_status_chsw_in_progress_v(void) -{ - return 0x00000001; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_flush_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_flush_gm206.h deleted file mode 100644 index 8a37aecb..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_flush_gm206.h +++ /dev/null @@ -1,181 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_flush_gm206_h_ -#define _hw_flush_gm206_h_ - -static inline u32 flush_l2_system_invalidate_r(void) -{ - return 0x00070004; -} -static inline u32 flush_l2_system_invalidate_pending_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 flush_l2_system_invalidate_pending_busy_v(void) -{ - return 0x00000001; -} -static inline u32 flush_l2_system_invalidate_pending_busy_f(void) -{ - return 0x1; -} -static inline u32 flush_l2_system_invalidate_outstanding_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 flush_l2_system_invalidate_outstanding_true_v(void) -{ - return 0x00000001; -} -static inline u32 flush_l2_flush_dirty_r(void) -{ - return 0x00070010; -} -static inline u32 flush_l2_flush_dirty_pending_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 flush_l2_flush_dirty_pending_empty_v(void) -{ - return 0x00000000; -} -static inline u32 flush_l2_flush_dirty_pending_empty_f(void) -{ - return 0x0; -} -static inline u32 flush_l2_flush_dirty_pending_busy_v(void) -{ - return 0x00000001; -} -static inline u32 flush_l2_flush_dirty_pending_busy_f(void) -{ - return 0x1; -} -static inline u32 flush_l2_flush_dirty_outstanding_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 flush_l2_flush_dirty_outstanding_false_v(void) -{ - return 0x00000000; -} -static inline u32 flush_l2_flush_dirty_outstanding_false_f(void) -{ - return 0x0; -} -static inline u32 flush_l2_flush_dirty_outstanding_true_v(void) -{ - return 0x00000001; -} -static inline u32 flush_l2_clean_comptags_r(void) -{ - return 0x0007000c; -} -static inline u32 flush_l2_clean_comptags_pending_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 flush_l2_clean_comptags_pending_empty_v(void) -{ - return 0x00000000; -} -static inline u32 flush_l2_clean_comptags_pending_empty_f(void) -{ - return 0x0; -} -static inline u32 flush_l2_clean_comptags_pending_busy_v(void) -{ - return 0x00000001; -} -static inline u32 flush_l2_clean_comptags_pending_busy_f(void) -{ - return 0x1; -} -static inline u32 flush_l2_clean_comptags_outstanding_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 flush_l2_clean_comptags_outstanding_false_v(void) -{ - return 0x00000000; -} -static inline u32 flush_l2_clean_comptags_outstanding_false_f(void) -{ - return 0x0; -} -static inline u32 flush_l2_clean_comptags_outstanding_true_v(void) -{ - return 0x00000001; -} -static inline u32 flush_fb_flush_r(void) -{ - return 0x00070000; -} -static inline u32 flush_fb_flush_pending_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 flush_fb_flush_pending_busy_v(void) -{ - return 0x00000001; -} -static inline u32 flush_fb_flush_pending_busy_f(void) -{ - return 0x1; -} -static inline u32 flush_fb_flush_outstanding_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 flush_fb_flush_outstanding_true_v(void) -{ - return 0x00000001; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fuse_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fuse_gm206.h deleted file mode 100644 index f556ccfb..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_fuse_gm206.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_fuse_gm206_h_ -#define _hw_fuse_gm206_h_ - -static inline u32 fuse_status_opt_tpc_gpc_r(u32 i) -{ - return 0x00021c38 + i*4; -} -static inline u32 fuse_ctrl_opt_tpc_gpc_r(u32 i) -{ - return 0x00021838 + i*4; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_r(void) -{ - return 0x00021944; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_f(u32 v) -{ - return (v & 0x3) << 0; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_m(void) -{ - return 0x3 << 0; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_v(u32 r) -{ - return (r >> 0) & 0x3; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_r(void) -{ - return 0x00021948; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_m(void) -{ - return 0x1 << 0; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_yes_f(void) -{ - return 0x1; -} -static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_no_f(void) -{ - return 0x0; -} -static inline u32 fuse_status_opt_fbio_r(void) -{ - return 0x00021c14; -} -static inline u32 fuse_status_opt_fbio_data_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 fuse_status_opt_fbio_data_m(void) -{ - return 0xffff << 0; -} -static inline u32 fuse_status_opt_fbio_data_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 fuse_status_opt_rop_l2_fbp_r(u32 i) -{ - return 0x00021d70 + i*4; -} -static inline u32 fuse_status_opt_fbp_r(void) -{ - return 0x00021d38; -} -static inline u32 fuse_status_opt_fbp_idx_v(u32 r, u32 i) -{ - return (r >> (0 + i*0)) & 0x1; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gmmu_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gmmu_gm206.h deleted file mode 100644 index c098de69..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gmmu_gm206.h +++ /dev/null @@ -1,1189 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_gmmu_gm206_h_ -#define _hw_gmmu_gm206_h_ - -static inline u32 gmmu_pde_aperture_big_w(void) -{ - return 0; -} -static inline u32 gmmu_pde_aperture_big_invalid_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pde_aperture_big_video_memory_f(void) -{ - return 0x1; -} -static inline u32 gmmu_pde_aperture_big_sys_mem_coh_f(void) -{ - return 0x2; -} -static inline u32 gmmu_pde_aperture_big_sys_mem_ncoh_f(void) -{ - return 0x3; -} -static inline u32 gmmu_pde_size_w(void) -{ - return 0; -} -static inline u32 gmmu_pde_size_full_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pde_address_big_sys_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 gmmu_pde_address_big_sys_w(void) -{ - return 0; -} -static inline u32 gmmu_pde_aperture_small_w(void) -{ - return 1; -} -static inline u32 gmmu_pde_aperture_small_invalid_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pde_aperture_small_video_memory_f(void) -{ - return 0x1; -} -static inline u32 gmmu_pde_aperture_small_sys_mem_coh_f(void) -{ - return 0x2; -} -static inline u32 gmmu_pde_aperture_small_sys_mem_ncoh_f(void) -{ - return 0x3; -} -static inline u32 gmmu_pde_vol_small_w(void) -{ - return 1; -} -static inline u32 gmmu_pde_vol_small_true_f(void) -{ - return 0x4; -} -static inline u32 gmmu_pde_vol_small_false_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pde_vol_big_w(void) -{ - return 1; -} -static inline u32 gmmu_pde_vol_big_true_f(void) -{ - return 0x8; -} -static inline u32 gmmu_pde_vol_big_false_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pde_address_small_sys_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 gmmu_pde_address_small_sys_w(void) -{ - return 1; -} -static inline u32 gmmu_pde_address_shift_v(void) -{ - return 0x0000000c; -} -static inline u32 gmmu_pde__size_v(void) -{ - return 0x00000008; -} -static inline u32 gmmu_pte__size_v(void) -{ - return 0x00000008; -} -static inline u32 gmmu_pte_valid_w(void) -{ - return 0; -} -static inline u32 gmmu_pte_valid_true_f(void) -{ - return 0x1; -} -static inline u32 gmmu_pte_valid_false_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pte_privilege_w(void) -{ - return 0; -} -static inline u32 gmmu_pte_privilege_true_f(void) -{ - return 0x2; -} -static inline u32 gmmu_pte_privilege_false_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pte_address_sys_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 gmmu_pte_address_sys_w(void) -{ - return 0; -} -static inline u32 gmmu_pte_vol_w(void) -{ - return 1; -} -static inline u32 gmmu_pte_vol_true_f(void) -{ - return 0x1; -} -static inline u32 gmmu_pte_vol_false_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pte_aperture_w(void) -{ - return 1; -} -static inline u32 gmmu_pte_aperture_video_memory_f(void) -{ - return 0x0; -} -static inline u32 gmmu_pte_aperture_sys_mem_coh_f(void) -{ - return 0x4; -} -static inline u32 gmmu_pte_aperture_sys_mem_ncoh_f(void) -{ - return 0x6; -} -static inline u32 gmmu_pte_read_only_w(void) -{ - return 0; -} -static inline u32 gmmu_pte_read_only_true_f(void) -{ - return 0x4; -} -static inline u32 gmmu_pte_write_disable_w(void) -{ - return 1; -} -static inline u32 gmmu_pte_write_disable_true_f(void) -{ - return 0x80000000; -} -static inline u32 gmmu_pte_read_disable_w(void) -{ - return 1; -} -static inline u32 gmmu_pte_read_disable_true_f(void) -{ - return 0x40000000; -} -static inline u32 gmmu_pte_comptagline_f(u32 v) -{ - return (v & 0x1ffff) << 12; -} -static inline u32 gmmu_pte_comptagline_w(void) -{ - return 1; -} -static inline u32 gmmu_pte_address_shift_v(void) -{ - return 0x0000000c; -} -static inline u32 gmmu_pte_kind_f(u32 v) -{ - return (v & 0xff) << 4; -} -static inline u32 gmmu_pte_kind_w(void) -{ - return 1; -} -static inline u32 gmmu_pte_kind_invalid_v(void) -{ - return 0x000000ff; -} -static inline u32 gmmu_pte_kind_pitch_v(void) -{ - return 0x00000000; -} -static inline u32 gmmu_pte_kind_z16_v(void) -{ - return 0x00000001; -} -static inline u32 gmmu_pte_kind_z16_2c_v(void) -{ - return 0x00000002; -} -static inline u32 gmmu_pte_kind_z16_ms2_2c_v(void) -{ - return 0x00000003; -} -static inline u32 gmmu_pte_kind_z16_ms4_2c_v(void) -{ - return 0x00000004; -} -static inline u32 gmmu_pte_kind_z16_ms8_2c_v(void) -{ - return 0x00000005; -} -static inline u32 gmmu_pte_kind_z16_ms16_2c_v(void) -{ - return 0x00000006; -} -static inline u32 gmmu_pte_kind_z16_2z_v(void) -{ - return 0x00000007; -} -static inline u32 gmmu_pte_kind_z16_ms2_2z_v(void) -{ - return 0x00000008; -} -static inline u32 gmmu_pte_kind_z16_ms4_2z_v(void) -{ - return 0x00000009; -} -static inline u32 gmmu_pte_kind_z16_ms8_2z_v(void) -{ - return 0x0000000a; -} -static inline u32 gmmu_pte_kind_z16_ms16_2z_v(void) -{ - return 0x0000000b; -} -static inline u32 gmmu_pte_kind_z16_4cz_v(void) -{ - return 0x0000000c; -} -static inline u32 gmmu_pte_kind_z16_ms2_4cz_v(void) -{ - return 0x0000000d; -} -static inline u32 gmmu_pte_kind_z16_ms4_4cz_v(void) -{ - return 0x0000000e; -} -static inline u32 gmmu_pte_kind_z16_ms8_4cz_v(void) -{ - return 0x0000000f; -} -static inline u32 gmmu_pte_kind_z16_ms16_4cz_v(void) -{ - return 0x00000010; -} -static inline u32 gmmu_pte_kind_s8z24_v(void) -{ - return 0x00000011; -} -static inline u32 gmmu_pte_kind_s8z24_1z_v(void) -{ - return 0x00000012; -} -static inline u32 gmmu_pte_kind_s8z24_ms2_1z_v(void) -{ - return 0x00000013; -} -static inline u32 gmmu_pte_kind_s8z24_ms4_1z_v(void) -{ - return 0x00000014; -} -static inline u32 gmmu_pte_kind_s8z24_ms8_1z_v(void) -{ - return 0x00000015; -} -static inline u32 gmmu_pte_kind_s8z24_ms16_1z_v(void) -{ - return 0x00000016; -} -static inline u32 gmmu_pte_kind_s8z24_2cz_v(void) -{ - return 0x00000017; -} -static inline u32 gmmu_pte_kind_s8z24_ms2_2cz_v(void) -{ - return 0x00000018; -} -static inline u32 gmmu_pte_kind_s8z24_ms4_2cz_v(void) -{ - return 0x00000019; -} -static inline u32 gmmu_pte_kind_s8z24_ms8_2cz_v(void) -{ - return 0x0000001a; -} -static inline u32 gmmu_pte_kind_s8z24_ms16_2cz_v(void) -{ - return 0x0000001b; -} -static inline u32 gmmu_pte_kind_s8z24_2cs_v(void) -{ - return 0x0000001c; -} -static inline u32 gmmu_pte_kind_s8z24_ms2_2cs_v(void) -{ - return 0x0000001d; -} -static inline u32 gmmu_pte_kind_s8z24_ms4_2cs_v(void) -{ - return 0x0000001e; -} -static inline u32 gmmu_pte_kind_s8z24_ms8_2cs_v(void) -{ - return 0x0000001f; -} -static inline u32 gmmu_pte_kind_s8z24_ms16_2cs_v(void) -{ - return 0x00000020; -} -static inline u32 gmmu_pte_kind_s8z24_4cszv_v(void) -{ - return 0x00000021; -} -static inline u32 gmmu_pte_kind_s8z24_ms2_4cszv_v(void) -{ - return 0x00000022; -} -static inline u32 gmmu_pte_kind_s8z24_ms4_4cszv_v(void) -{ - return 0x00000023; -} -static inline u32 gmmu_pte_kind_s8z24_ms8_4cszv_v(void) -{ - return 0x00000024; -} -static inline u32 gmmu_pte_kind_s8z24_ms16_4cszv_v(void) -{ - return 0x00000025; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_v(void) -{ - return 0x00000026; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_v(void) -{ - return 0x00000027; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_v(void) -{ - return 0x00000028; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_v(void) -{ - return 0x00000029; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_1zv_v(void) -{ - return 0x0000002e; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_1zv_v(void) -{ - return 0x0000002f; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_1zv_v(void) -{ - return 0x00000030; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_1zv_v(void) -{ - return 0x00000031; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2cs_v(void) -{ - return 0x00000032; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2cs_v(void) -{ - return 0x00000033; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2cs_v(void) -{ - return 0x00000034; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2cs_v(void) -{ - return 0x00000035; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2czv_v(void) -{ - return 0x0000003a; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2czv_v(void) -{ - return 0x0000003b; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2czv_v(void) -{ - return 0x0000003c; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2czv_v(void) -{ - return 0x0000003d; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2zv_v(void) -{ - return 0x0000003e; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2zv_v(void) -{ - return 0x0000003f; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2zv_v(void) -{ - return 0x00000040; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2zv_v(void) -{ - return 0x00000041; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_4cszv_v(void) -{ - return 0x00000042; -} -static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_4cszv_v(void) -{ - return 0x00000043; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_4cszv_v(void) -{ - return 0x00000044; -} -static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_4cszv_v(void) -{ - return 0x00000045; -} -static inline u32 gmmu_pte_kind_z24s8_v(void) -{ - return 0x00000046; -} -static inline u32 gmmu_pte_kind_z24s8_1z_v(void) -{ - return 0x00000047; -} -static inline u32 gmmu_pte_kind_z24s8_ms2_1z_v(void) -{ - return 0x00000048; -} -static inline u32 gmmu_pte_kind_z24s8_ms4_1z_v(void) -{ - return 0x00000049; -} -static inline u32 gmmu_pte_kind_z24s8_ms8_1z_v(void) -{ - return 0x0000004a; -} -static inline u32 gmmu_pte_kind_z24s8_ms16_1z_v(void) -{ - return 0x0000004b; -} -static inline u32 gmmu_pte_kind_z24s8_2cs_v(void) -{ - return 0x0000004c; -} -static inline u32 gmmu_pte_kind_z24s8_ms2_2cs_v(void) -{ - return 0x0000004d; -} -static inline u32 gmmu_pte_kind_z24s8_ms4_2cs_v(void) -{ - return 0x0000004e; -} -static inline u32 gmmu_pte_kind_z24s8_ms8_2cs_v(void) -{ - return 0x0000004f; -} -static inline u32 gmmu_pte_kind_z24s8_ms16_2cs_v(void) -{ - return 0x00000050; -} -static inline u32 gmmu_pte_kind_z24s8_2cz_v(void) -{ - return 0x00000051; -} -static inline u32 gmmu_pte_kind_z24s8_ms2_2cz_v(void) -{ - return 0x00000052; -} -static inline u32 gmmu_pte_kind_z24s8_ms4_2cz_v(void) -{ - return 0x00000053; -} -static inline u32 gmmu_pte_kind_z24s8_ms8_2cz_v(void) -{ - return 0x00000054; -} -static inline u32 gmmu_pte_kind_z24s8_ms16_2cz_v(void) -{ - return 0x00000055; -} -static inline u32 gmmu_pte_kind_z24s8_4cszv_v(void) -{ - return 0x00000056; -} -static inline u32 gmmu_pte_kind_z24s8_ms2_4cszv_v(void) -{ - return 0x00000057; -} -static inline u32 gmmu_pte_kind_z24s8_ms4_4cszv_v(void) -{ - return 0x00000058; -} -static inline u32 gmmu_pte_kind_z24s8_ms8_4cszv_v(void) -{ - return 0x00000059; -} -static inline u32 gmmu_pte_kind_z24s8_ms16_4cszv_v(void) -{ - return 0x0000005a; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_v(void) -{ - return 0x0000005b; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_v(void) -{ - return 0x0000005c; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_v(void) -{ - return 0x0000005d; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_v(void) -{ - return 0x0000005e; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_1zv_v(void) -{ - return 0x00000063; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_1zv_v(void) -{ - return 0x00000064; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_1zv_v(void) -{ - return 0x00000065; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_1zv_v(void) -{ - return 0x00000066; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2cs_v(void) -{ - return 0x00000067; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2cs_v(void) -{ - return 0x00000068; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2cs_v(void) -{ - return 0x00000069; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2cs_v(void) -{ - return 0x0000006a; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2czv_v(void) -{ - return 0x0000006f; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2czv_v(void) -{ - return 0x00000070; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2czv_v(void) -{ - return 0x00000071; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2czv_v(void) -{ - return 0x00000072; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2zv_v(void) -{ - return 0x00000073; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2zv_v(void) -{ - return 0x00000074; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2zv_v(void) -{ - return 0x00000075; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2zv_v(void) -{ - return 0x00000076; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_4cszv_v(void) -{ - return 0x00000077; -} -static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_4cszv_v(void) -{ - return 0x00000078; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_4cszv_v(void) -{ - return 0x00000079; -} -static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_4cszv_v(void) -{ - return 0x0000007a; -} -static inline u32 gmmu_pte_kind_zf32_v(void) -{ - return 0x0000007b; -} -static inline u32 gmmu_pte_kind_zf32_1z_v(void) -{ - return 0x0000007c; -} -static inline u32 gmmu_pte_kind_zf32_ms2_1z_v(void) -{ - return 0x0000007d; -} -static inline u32 gmmu_pte_kind_zf32_ms4_1z_v(void) -{ - return 0x0000007e; -} -static inline u32 gmmu_pte_kind_zf32_ms8_1z_v(void) -{ - return 0x0000007f; -} -static inline u32 gmmu_pte_kind_zf32_ms16_1z_v(void) -{ - return 0x00000080; -} -static inline u32 gmmu_pte_kind_zf32_2cs_v(void) -{ - return 0x00000081; -} -static inline u32 gmmu_pte_kind_zf32_ms2_2cs_v(void) -{ - return 0x00000082; -} -static inline u32 gmmu_pte_kind_zf32_ms4_2cs_v(void) -{ - return 0x00000083; -} -static inline u32 gmmu_pte_kind_zf32_ms8_2cs_v(void) -{ - return 0x00000084; -} -static inline u32 gmmu_pte_kind_zf32_ms16_2cs_v(void) -{ - return 0x00000085; -} -static inline u32 gmmu_pte_kind_zf32_2cz_v(void) -{ - return 0x00000086; -} -static inline u32 gmmu_pte_kind_zf32_ms2_2cz_v(void) -{ - return 0x00000087; -} -static inline u32 gmmu_pte_kind_zf32_ms4_2cz_v(void) -{ - return 0x00000088; -} -static inline u32 gmmu_pte_kind_zf32_ms8_2cz_v(void) -{ - return 0x00000089; -} -static inline u32 gmmu_pte_kind_zf32_ms16_2cz_v(void) -{ - return 0x0000008a; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_v(void) -{ - return 0x0000008b; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_v(void) -{ - return 0x0000008c; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_v(void) -{ - return 0x0000008d; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_v(void) -{ - return 0x0000008e; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1cs_v(void) -{ - return 0x0000008f; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1cs_v(void) -{ - return 0x00000090; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1cs_v(void) -{ - return 0x00000091; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1cs_v(void) -{ - return 0x00000092; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1zv_v(void) -{ - return 0x00000097; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1zv_v(void) -{ - return 0x00000098; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1zv_v(void) -{ - return 0x00000099; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1zv_v(void) -{ - return 0x0000009a; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1czv_v(void) -{ - return 0x0000009b; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1czv_v(void) -{ - return 0x0000009c; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1czv_v(void) -{ - return 0x0000009d; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1czv_v(void) -{ - return 0x0000009e; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cs_v(void) -{ - return 0x0000009f; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cs_v(void) -{ - return 0x000000a0; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cs_v(void) -{ - return 0x000000a1; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cs_v(void) -{ - return 0x000000a2; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cszv_v(void) -{ - return 0x000000a3; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cszv_v(void) -{ - return 0x000000a4; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cszv_v(void) -{ - return 0x000000a5; -} -static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cszv_v(void) -{ - return 0x000000a6; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_v(void) -{ - return 0x000000a7; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_v(void) -{ - return 0x000000a8; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_v(void) -{ - return 0x000000a9; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_v(void) -{ - return 0x000000aa; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1cs_v(void) -{ - return 0x000000ab; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1cs_v(void) -{ - return 0x000000ac; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1cs_v(void) -{ - return 0x000000ad; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1cs_v(void) -{ - return 0x000000ae; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1zv_v(void) -{ - return 0x000000b3; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1zv_v(void) -{ - return 0x000000b4; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1zv_v(void) -{ - return 0x000000b5; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1zv_v(void) -{ - return 0x000000b6; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1czv_v(void) -{ - return 0x000000b7; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1czv_v(void) -{ - return 0x000000b8; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1czv_v(void) -{ - return 0x000000b9; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1czv_v(void) -{ - return 0x000000ba; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cs_v(void) -{ - return 0x000000bb; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cs_v(void) -{ - return 0x000000bc; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cs_v(void) -{ - return 0x000000bd; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cs_v(void) -{ - return 0x000000be; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cszv_v(void) -{ - return 0x000000bf; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cszv_v(void) -{ - return 0x000000c0; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cszv_v(void) -{ - return 0x000000c1; -} -static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cszv_v(void) -{ - return 0x000000c2; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_v(void) -{ - return 0x000000c3; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_1cs_v(void) -{ - return 0x000000c4; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_1cs_v(void) -{ - return 0x000000c5; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_1cs_v(void) -{ - return 0x000000c6; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_1cs_v(void) -{ - return 0x000000c7; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_1cs_v(void) -{ - return 0x000000c8; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_2cszv_v(void) -{ - return 0x000000ce; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cszv_v(void) -{ - return 0x000000cf; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cszv_v(void) -{ - return 0x000000d0; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cszv_v(void) -{ - return 0x000000d1; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cszv_v(void) -{ - return 0x000000d2; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_2cs_v(void) -{ - return 0x000000d3; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cs_v(void) -{ - return 0x000000d4; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cs_v(void) -{ - return 0x000000d5; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cs_v(void) -{ - return 0x000000d6; -} -static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cs_v(void) -{ - return 0x000000d7; -} -static inline u32 gmmu_pte_kind_generic_16bx2_v(void) -{ - return 0x000000fe; -} -static inline u32 gmmu_pte_kind_c32_2c_v(void) -{ - return 0x000000d8; -} -static inline u32 gmmu_pte_kind_c32_2cbr_v(void) -{ - return 0x000000d9; -} -static inline u32 gmmu_pte_kind_c32_2cba_v(void) -{ - return 0x000000da; -} -static inline u32 gmmu_pte_kind_c32_2cra_v(void) -{ - return 0x000000db; -} -static inline u32 gmmu_pte_kind_c32_2bra_v(void) -{ - return 0x000000dc; -} -static inline u32 gmmu_pte_kind_c32_ms2_2c_v(void) -{ - return 0x000000dd; -} -static inline u32 gmmu_pte_kind_c32_ms2_2cbr_v(void) -{ - return 0x000000de; -} -static inline u32 gmmu_pte_kind_c32_ms2_2cra_v(void) -{ - return 0x000000cc; -} -static inline u32 gmmu_pte_kind_c32_ms4_2c_v(void) -{ - return 0x000000df; -} -static inline u32 gmmu_pte_kind_c32_ms4_2cbr_v(void) -{ - return 0x000000e0; -} -static inline u32 gmmu_pte_kind_c32_ms4_2cba_v(void) -{ - return 0x000000e1; -} -static inline u32 gmmu_pte_kind_c32_ms4_2cra_v(void) -{ - return 0x000000e2; -} -static inline u32 gmmu_pte_kind_c32_ms4_2bra_v(void) -{ - return 0x000000e3; -} -static inline u32 gmmu_pte_kind_c32_ms8_ms16_2c_v(void) -{ - return 0x000000e4; -} -static inline u32 gmmu_pte_kind_c32_ms8_ms16_2cra_v(void) -{ - return 0x000000e5; -} -static inline u32 gmmu_pte_kind_c64_2c_v(void) -{ - return 0x000000e6; -} -static inline u32 gmmu_pte_kind_c64_2cbr_v(void) -{ - return 0x000000e7; -} -static inline u32 gmmu_pte_kind_c64_2cba_v(void) -{ - return 0x000000e8; -} -static inline u32 gmmu_pte_kind_c64_2cra_v(void) -{ - return 0x000000e9; -} -static inline u32 gmmu_pte_kind_c64_2bra_v(void) -{ - return 0x000000ea; -} -static inline u32 gmmu_pte_kind_c64_ms2_2c_v(void) -{ - return 0x000000eb; -} -static inline u32 gmmu_pte_kind_c64_ms2_2cbr_v(void) -{ - return 0x000000ec; -} -static inline u32 gmmu_pte_kind_c64_ms2_2cra_v(void) -{ - return 0x000000cd; -} -static inline u32 gmmu_pte_kind_c64_ms4_2c_v(void) -{ - return 0x000000ed; -} -static inline u32 gmmu_pte_kind_c64_ms4_2cbr_v(void) -{ - return 0x000000ee; -} -static inline u32 gmmu_pte_kind_c64_ms4_2cba_v(void) -{ - return 0x000000ef; -} -static inline u32 gmmu_pte_kind_c64_ms4_2cra_v(void) -{ - return 0x000000f0; -} -static inline u32 gmmu_pte_kind_c64_ms4_2bra_v(void) -{ - return 0x000000f1; -} -static inline u32 gmmu_pte_kind_c64_ms8_ms16_2c_v(void) -{ - return 0x000000f2; -} -static inline u32 gmmu_pte_kind_c64_ms8_ms16_2cra_v(void) -{ - return 0x000000f3; -} -static inline u32 gmmu_pte_kind_c128_2c_v(void) -{ - return 0x000000f4; -} -static inline u32 gmmu_pte_kind_c128_2cr_v(void) -{ - return 0x000000f5; -} -static inline u32 gmmu_pte_kind_c128_ms2_2c_v(void) -{ - return 0x000000f6; -} -static inline u32 gmmu_pte_kind_c128_ms2_2cr_v(void) -{ - return 0x000000f7; -} -static inline u32 gmmu_pte_kind_c128_ms4_2c_v(void) -{ - return 0x000000f8; -} -static inline u32 gmmu_pte_kind_c128_ms4_2cr_v(void) -{ - return 0x000000f9; -} -static inline u32 gmmu_pte_kind_c128_ms8_ms16_2c_v(void) -{ - return 0x000000fa; -} -static inline u32 gmmu_pte_kind_c128_ms8_ms16_2cr_v(void) -{ - return 0x000000fb; -} -static inline u32 gmmu_pte_kind_x8c24_v(void) -{ - return 0x000000fc; -} -static inline u32 gmmu_pte_kind_pitch_no_swizzle_v(void) -{ - return 0x000000fd; -} -static inline u32 gmmu_pte_kind_smsked_message_v(void) -{ - return 0x000000ca; -} -static inline u32 gmmu_pte_kind_smhost_message_v(void) -{ - return 0x000000cb; -} -static inline u32 gmmu_pte_kind_s8_v(void) -{ - return 0x0000002a; -} -static inline u32 gmmu_pte_kind_s8_2s_v(void) -{ - return 0x0000002b; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gr_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gr_gm206.h deleted file mode 100644 index 34c46855..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_gr_gm206.h +++ /dev/null @@ -1,3713 +0,0 @@ -/* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_gr_gm206_h_ -#define _hw_gr_gm206_h_ - -static inline u32 gr_intr_r(void) -{ - return 0x00400100; -} -static inline u32 gr_intr_notify_pending_f(void) -{ - return 0x1; -} -static inline u32 gr_intr_notify_reset_f(void) -{ - return 0x1; -} -static inline u32 gr_intr_semaphore_pending_f(void) -{ - return 0x2; -} -static inline u32 gr_intr_semaphore_reset_f(void) -{ - return 0x2; -} -static inline u32 gr_intr_illegal_method_pending_f(void) -{ - return 0x10; -} -static inline u32 gr_intr_illegal_method_reset_f(void) -{ - return 0x10; -} -static inline u32 gr_intr_illegal_notify_pending_f(void) -{ - return 0x40; -} -static inline u32 gr_intr_illegal_notify_reset_f(void) -{ - return 0x40; -} -static inline u32 gr_intr_firmware_method_f(u32 v) -{ - return (v & 0x1) << 8; -} -static inline u32 gr_intr_firmware_method_pending_f(void) -{ - return 0x100; -} -static inline u32 gr_intr_firmware_method_reset_f(void) -{ - return 0x100; -} -static inline u32 gr_intr_illegal_class_pending_f(void) -{ - return 0x20; -} -static inline u32 gr_intr_illegal_class_reset_f(void) -{ - return 0x20; -} -static inline u32 gr_intr_fecs_error_pending_f(void) -{ - return 0x80000; -} -static inline u32 gr_intr_fecs_error_reset_f(void) -{ - return 0x80000; -} -static inline u32 gr_intr_class_error_pending_f(void) -{ - return 0x100000; -} -static inline u32 gr_intr_class_error_reset_f(void) -{ - return 0x100000; -} -static inline u32 gr_intr_exception_pending_f(void) -{ - return 0x200000; -} -static inline u32 gr_intr_exception_reset_f(void) -{ - return 0x200000; -} -static inline u32 gr_fecs_intr_r(void) -{ - return 0x00400144; -} -static inline u32 gr_class_error_r(void) -{ - return 0x00400110; -} -static inline u32 gr_class_error_code_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 gr_intr_nonstall_r(void) -{ - return 0x00400120; -} -static inline u32 gr_intr_nonstall_trap_pending_f(void) -{ - return 0x2; -} -static inline u32 gr_intr_en_r(void) -{ - return 0x0040013c; -} -static inline u32 gr_exception_r(void) -{ - return 0x00400108; -} -static inline u32 gr_exception_fe_m(void) -{ - return 0x1 << 0; -} -static inline u32 gr_exception_gpc_m(void) -{ - return 0x1 << 24; -} -static inline u32 gr_exception_memfmt_m(void) -{ - return 0x1 << 1; -} -static inline u32 gr_exception_ds_m(void) -{ - return 0x1 << 4; -} -static inline u32 gr_exception1_r(void) -{ - return 0x00400118; -} -static inline u32 gr_exception1_gpc_0_pending_f(void) -{ - return 0x1; -} -static inline u32 gr_exception2_r(void) -{ - return 0x0040011c; -} -static inline u32 gr_exception_en_r(void) -{ - return 0x00400138; -} -static inline u32 gr_exception_en_fe_m(void) -{ - return 0x1 << 0; -} -static inline u32 gr_exception1_en_r(void) -{ - return 0x00400130; -} -static inline u32 gr_exception2_en_r(void) -{ - return 0x00400134; -} -static inline u32 gr_gpfifo_ctl_r(void) -{ - return 0x00400500; -} -static inline u32 gr_gpfifo_ctl_access_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 gr_gpfifo_ctl_access_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_gpfifo_ctl_access_enabled_f(void) -{ - return 0x1; -} -static inline u32 gr_gpfifo_ctl_semaphore_access_f(u32 v) -{ - return (v & 0x1) << 16; -} -static inline u32 gr_gpfifo_ctl_semaphore_access_enabled_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpfifo_ctl_semaphore_access_enabled_f(void) -{ - return 0x10000; -} -static inline u32 gr_gpfifo_status_r(void) -{ - return 0x00400504; -} -static inline u32 gr_trapped_addr_r(void) -{ - return 0x00400704; -} -static inline u32 gr_trapped_addr_mthd_v(u32 r) -{ - return (r >> 2) & 0xfff; -} -static inline u32 gr_trapped_addr_subch_v(u32 r) -{ - return (r >> 16) & 0x7; -} -static inline u32 gr_trapped_data_lo_r(void) -{ - return 0x00400708; -} -static inline u32 gr_trapped_data_hi_r(void) -{ - return 0x0040070c; -} -static inline u32 gr_status_r(void) -{ - return 0x00400700; -} -static inline u32 gr_status_fe_method_upper_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 gr_status_fe_method_lower_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 gr_status_fe_method_lower_idle_v(void) -{ - return 0x00000000; -} -static inline u32 gr_status_fe_gi_v(u32 r) -{ - return (r >> 21) & 0x1; -} -static inline u32 gr_status_mask_r(void) -{ - return 0x00400610; -} -static inline u32 gr_status_1_r(void) -{ - return 0x00400604; -} -static inline u32 gr_status_2_r(void) -{ - return 0x00400608; -} -static inline u32 gr_engine_status_r(void) -{ - return 0x0040060c; -} -static inline u32 gr_engine_status_value_busy_f(void) -{ - return 0x1; -} -static inline u32 gr_pri_be0_becs_be_exception_r(void) -{ - return 0x00410204; -} -static inline u32 gr_pri_be0_becs_be_exception_en_r(void) -{ - return 0x00410208; -} -static inline u32 gr_pri_gpc0_gpccs_gpc_exception_r(void) -{ - return 0x00502c90; -} -static inline u32 gr_pri_gpc0_gpccs_gpc_exception_en_r(void) -{ - return 0x00502c94; -} -static inline u32 gr_pri_gpc0_tpc0_tpccs_tpc_exception_r(void) -{ - return 0x00504508; -} -static inline u32 gr_pri_gpc0_tpc0_tpccs_tpc_exception_en_r(void) -{ - return 0x0050450c; -} -static inline u32 gr_activity_0_r(void) -{ - return 0x00400380; -} -static inline u32 gr_activity_1_r(void) -{ - return 0x00400384; -} -static inline u32 gr_activity_2_r(void) -{ - return 0x00400388; -} -static inline u32 gr_activity_4_r(void) -{ - return 0x00400390; -} -static inline u32 gr_pri_gpc0_gcc_dbg_r(void) -{ - return 0x00501000; -} -static inline u32 gr_pri_gpcs_gcc_dbg_r(void) -{ - return 0x00419000; -} -static inline u32 gr_pri_gpcs_gcc_dbg_invalidate_m(void) -{ - return 0x1 << 1; -} -static inline u32 gr_pri_gpc0_tpc0_sm_cache_control_r(void) -{ - return 0x005046a4; -} -static inline u32 gr_pri_gpcs_tpcs_sm_cache_control_r(void) -{ - return 0x00419ea4; -} -static inline u32 gr_pri_gpcs_tpcs_sm_cache_control_invalidate_cache_m(void) -{ - return 0x1 << 0; -} -static inline u32 gr_pri_sked_activity_r(void) -{ - return 0x00407054; -} -static inline u32 gr_pri_gpc0_gpccs_gpc_activity0_r(void) -{ - return 0x00502c80; -} -static inline u32 gr_pri_gpc0_gpccs_gpc_activity1_r(void) -{ - return 0x00502c84; -} -static inline u32 gr_pri_gpc0_gpccs_gpc_activity2_r(void) -{ - return 0x00502c88; -} -static inline u32 gr_pri_gpc0_gpccs_gpc_activity3_r(void) -{ - return 0x00502c8c; -} -static inline u32 gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r(void) -{ - return 0x00504500; -} -static inline u32 gr_pri_gpc0_tpc1_tpccs_tpc_activity_0_r(void) -{ - return 0x00504d00; -} -static inline u32 gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r(void) -{ - return 0x00501d00; -} -static inline u32 gr_pri_gpcs_gpccs_gpc_activity_0_r(void) -{ - return 0x0041ac80; -} -static inline u32 gr_pri_gpcs_gpccs_gpc_activity_1_r(void) -{ - return 0x0041ac84; -} -static inline u32 gr_pri_gpcs_gpccs_gpc_activity_2_r(void) -{ - return 0x0041ac88; -} -static inline u32 gr_pri_gpcs_gpccs_gpc_activity_3_r(void) -{ - return 0x0041ac8c; -} -static inline u32 gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r(void) -{ - return 0x0041c500; -} -static inline u32 gr_pri_gpcs_tpc1_tpccs_tpc_activity_0_r(void) -{ - return 0x0041cd00; -} -static inline u32 gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r(void) -{ - return 0x00419d00; -} -static inline u32 gr_pri_be0_becs_be_activity0_r(void) -{ - return 0x00410200; -} -static inline u32 gr_pri_be1_becs_be_activity0_r(void) -{ - return 0x00410600; -} -static inline u32 gr_pri_bes_becs_be_activity0_r(void) -{ - return 0x00408a00; -} -static inline u32 gr_pri_ds_mpipe_status_r(void) -{ - return 0x00405858; -} -static inline u32 gr_pri_fe_go_idle_on_status_r(void) -{ - return 0x00404150; -} -static inline u32 gr_pri_fe_go_idle_check_r(void) -{ - return 0x00404158; -} -static inline u32 gr_pri_fe_go_idle_info_r(void) -{ - return 0x00404194; -} -static inline u32 gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r(void) -{ - return 0x00504238; -} -static inline u32 gr_pri_be0_crop_status1_r(void) -{ - return 0x00410134; -} -static inline u32 gr_pri_bes_crop_status1_r(void) -{ - return 0x00408934; -} -static inline u32 gr_pri_be0_zrop_status_r(void) -{ - return 0x00410048; -} -static inline u32 gr_pri_be0_zrop_status2_r(void) -{ - return 0x0041004c; -} -static inline u32 gr_pri_bes_zrop_status_r(void) -{ - return 0x00408848; -} -static inline u32 gr_pri_bes_zrop_status2_r(void) -{ - return 0x0040884c; -} -static inline u32 gr_pipe_bundle_address_r(void) -{ - return 0x00400200; -} -static inline u32 gr_pipe_bundle_address_value_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 gr_pipe_bundle_data_r(void) -{ - return 0x00400204; -} -static inline u32 gr_pipe_bundle_config_r(void) -{ - return 0x00400208; -} -static inline u32 gr_pipe_bundle_config_override_pipe_mode_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_pipe_bundle_config_override_pipe_mode_enabled_f(void) -{ - return 0x80000000; -} -static inline u32 gr_fe_hww_esr_r(void) -{ - return 0x00404000; -} -static inline u32 gr_fe_hww_esr_reset_active_f(void) -{ - return 0x40000000; -} -static inline u32 gr_fe_hww_esr_en_enable_f(void) -{ - return 0x80000000; -} -static inline u32 gr_fe_go_idle_timeout_r(void) -{ - return 0x00404154; -} -static inline u32 gr_fe_go_idle_timeout_count_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_fe_go_idle_timeout_count_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_fe_go_idle_timeout_count_prod_f(void) -{ - return 0x800; -} -static inline u32 gr_fe_object_table_r(u32 i) -{ - return 0x00404200 + i*4; -} -static inline u32 gr_fe_object_table_nvclass_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 gr_fe_tpc_fs_r(void) -{ - return 0x004041c4; -} -static inline u32 gr_pri_mme_shadow_raw_index_r(void) -{ - return 0x00404488; -} -static inline u32 gr_pri_mme_shadow_raw_index_write_trigger_f(void) -{ - return 0x80000000; -} -static inline u32 gr_pri_mme_shadow_raw_data_r(void) -{ - return 0x0040448c; -} -static inline u32 gr_mme_hww_esr_r(void) -{ - return 0x00404490; -} -static inline u32 gr_mme_hww_esr_reset_active_f(void) -{ - return 0x40000000; -} -static inline u32 gr_mme_hww_esr_en_enable_f(void) -{ - return 0x80000000; -} -static inline u32 gr_memfmt_hww_esr_r(void) -{ - return 0x00404600; -} -static inline u32 gr_memfmt_hww_esr_reset_active_f(void) -{ - return 0x40000000; -} -static inline u32 gr_memfmt_hww_esr_en_enable_f(void) -{ - return 0x80000000; -} -static inline u32 gr_fecs_cpuctl_r(void) -{ - return 0x00409100; -} -static inline u32 gr_fecs_cpuctl_startcpu_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 gr_fecs_cpuctl_alias_r(void) -{ - return 0x00409130; -} -static inline u32 gr_fecs_cpuctl_alias_startcpu_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 gr_fecs_dmactl_r(void) -{ - return 0x0040910c; -} -static inline u32 gr_fecs_dmactl_require_ctx_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 gr_fecs_dmactl_dmem_scrubbing_m(void) -{ - return 0x1 << 1; -} -static inline u32 gr_fecs_dmactl_imem_scrubbing_m(void) -{ - return 0x1 << 2; -} -static inline u32 gr_fecs_os_r(void) -{ - return 0x00409080; -} -static inline u32 gr_fecs_idlestate_r(void) -{ - return 0x0040904c; -} -static inline u32 gr_fecs_mailbox0_r(void) -{ - return 0x00409040; -} -static inline u32 gr_fecs_mailbox1_r(void) -{ - return 0x00409044; -} -static inline u32 gr_fecs_irqstat_r(void) -{ - return 0x00409008; -} -static inline u32 gr_fecs_irqmode_r(void) -{ - return 0x0040900c; -} -static inline u32 gr_fecs_irqmask_r(void) -{ - return 0x00409018; -} -static inline u32 gr_fecs_irqdest_r(void) -{ - return 0x0040901c; -} -static inline u32 gr_fecs_curctx_r(void) -{ - return 0x00409050; -} -static inline u32 gr_fecs_nxtctx_r(void) -{ - return 0x00409054; -} -static inline u32 gr_fecs_engctl_r(void) -{ - return 0x004090a4; -} -static inline u32 gr_fecs_debug1_r(void) -{ - return 0x00409090; -} -static inline u32 gr_fecs_debuginfo_r(void) -{ - return 0x00409094; -} -static inline u32 gr_fecs_icd_cmd_r(void) -{ - return 0x00409200; -} -static inline u32 gr_fecs_icd_cmd_opc_s(void) -{ - return 4; -} -static inline u32 gr_fecs_icd_cmd_opc_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 gr_fecs_icd_cmd_opc_m(void) -{ - return 0xf << 0; -} -static inline u32 gr_fecs_icd_cmd_opc_v(u32 r) -{ - return (r >> 0) & 0xf; -} -static inline u32 gr_fecs_icd_cmd_opc_rreg_f(void) -{ - return 0x8; -} -static inline u32 gr_fecs_icd_cmd_opc_rstat_f(void) -{ - return 0xe; -} -static inline u32 gr_fecs_icd_cmd_idx_f(u32 v) -{ - return (v & 0x1f) << 8; -} -static inline u32 gr_fecs_icd_rdata_r(void) -{ - return 0x0040920c; -} -static inline u32 gr_fecs_imemc_r(u32 i) -{ - return 0x00409180 + i*16; -} -static inline u32 gr_fecs_imemc_offs_f(u32 v) -{ - return (v & 0x3f) << 2; -} -static inline u32 gr_fecs_imemc_blk_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_fecs_imemc_aincw_f(u32 v) -{ - return (v & 0x1) << 24; -} -static inline u32 gr_fecs_imemd_r(u32 i) -{ - return 0x00409184 + i*16; -} -static inline u32 gr_fecs_imemt_r(u32 i) -{ - return 0x00409188 + i*16; -} -static inline u32 gr_fecs_imemt_tag_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_fecs_dmemc_r(u32 i) -{ - return 0x004091c0 + i*8; -} -static inline u32 gr_fecs_dmemc_offs_s(void) -{ - return 6; -} -static inline u32 gr_fecs_dmemc_offs_f(u32 v) -{ - return (v & 0x3f) << 2; -} -static inline u32 gr_fecs_dmemc_offs_m(void) -{ - return 0x3f << 2; -} -static inline u32 gr_fecs_dmemc_offs_v(u32 r) -{ - return (r >> 2) & 0x3f; -} -static inline u32 gr_fecs_dmemc_blk_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_fecs_dmemc_aincw_f(u32 v) -{ - return (v & 0x1) << 24; -} -static inline u32 gr_fecs_dmemd_r(u32 i) -{ - return 0x004091c4 + i*8; -} -static inline u32 gr_fecs_dmatrfbase_r(void) -{ - return 0x00409110; -} -static inline u32 gr_fecs_dmatrfmoffs_r(void) -{ - return 0x00409114; -} -static inline u32 gr_fecs_dmatrffboffs_r(void) -{ - return 0x0040911c; -} -static inline u32 gr_fecs_dmatrfcmd_r(void) -{ - return 0x00409118; -} -static inline u32 gr_fecs_dmatrfcmd_imem_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 gr_fecs_dmatrfcmd_write_f(u32 v) -{ - return (v & 0x1) << 5; -} -static inline u32 gr_fecs_dmatrfcmd_size_f(u32 v) -{ - return (v & 0x7) << 8; -} -static inline u32 gr_fecs_dmatrfcmd_ctxdma_f(u32 v) -{ - return (v & 0x7) << 12; -} -static inline u32 gr_fecs_bootvec_r(void) -{ - return 0x00409104; -} -static inline u32 gr_fecs_bootvec_vec_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_fecs_falcon_hwcfg_r(void) -{ - return 0x00409108; -} -static inline u32 gr_gpcs_gpccs_falcon_hwcfg_r(void) -{ - return 0x0041a108; -} -static inline u32 gr_fecs_falcon_rm_r(void) -{ - return 0x00409084; -} -static inline u32 gr_fecs_current_ctx_r(void) -{ - return 0x00409b00; -} -static inline u32 gr_fecs_current_ctx_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 gr_fecs_current_ctx_ptr_v(u32 r) -{ - return (r >> 0) & 0xfffffff; -} -static inline u32 gr_fecs_current_ctx_target_s(void) -{ - return 2; -} -static inline u32 gr_fecs_current_ctx_target_f(u32 v) -{ - return (v & 0x3) << 28; -} -static inline u32 gr_fecs_current_ctx_target_m(void) -{ - return 0x3 << 28; -} -static inline u32 gr_fecs_current_ctx_target_v(u32 r) -{ - return (r >> 28) & 0x3; -} -static inline u32 gr_fecs_current_ctx_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_current_ctx_target_sys_mem_coh_f(void) -{ - return 0x20000000; -} -static inline u32 gr_fecs_current_ctx_target_sys_mem_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 gr_fecs_current_ctx_valid_s(void) -{ - return 1; -} -static inline u32 gr_fecs_current_ctx_valid_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 gr_fecs_current_ctx_valid_m(void) -{ - return 0x1 << 31; -} -static inline u32 gr_fecs_current_ctx_valid_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 gr_fecs_current_ctx_valid_false_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_method_data_r(void) -{ - return 0x00409500; -} -static inline u32 gr_fecs_method_push_r(void) -{ - return 0x00409504; -} -static inline u32 gr_fecs_method_push_adr_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 gr_fecs_method_push_adr_bind_pointer_v(void) -{ - return 0x00000003; -} -static inline u32 gr_fecs_method_push_adr_bind_pointer_f(void) -{ - return 0x3; -} -static inline u32 gr_fecs_method_push_adr_discover_image_size_v(void) -{ - return 0x00000010; -} -static inline u32 gr_fecs_method_push_adr_wfi_golden_save_v(void) -{ - return 0x00000009; -} -static inline u32 gr_fecs_method_push_adr_restore_golden_v(void) -{ - return 0x00000015; -} -static inline u32 gr_fecs_method_push_adr_discover_zcull_image_size_v(void) -{ - return 0x00000016; -} -static inline u32 gr_fecs_method_push_adr_discover_pm_image_size_v(void) -{ - return 0x00000025; -} -static inline u32 gr_fecs_method_push_adr_discover_reglist_image_size_v(void) -{ - return 0x00000030; -} -static inline u32 gr_fecs_method_push_adr_set_reglist_bind_instance_v(void) -{ - return 0x00000031; -} -static inline u32 gr_fecs_method_push_adr_set_reglist_virtual_address_v(void) -{ - return 0x00000032; -} -static inline u32 gr_fecs_method_push_adr_stop_ctxsw_v(void) -{ - return 0x00000038; -} -static inline u32 gr_fecs_method_push_adr_start_ctxsw_v(void) -{ - return 0x00000039; -} -static inline u32 gr_fecs_method_push_adr_set_watchdog_timeout_f(void) -{ - return 0x21; -} -static inline u32 gr_fecs_method_push_adr_halt_pipeline_v(void) -{ - return 0x00000004; -} -static inline u32 gr_fecs_host_int_status_r(void) -{ - return 0x00409c18; -} -static inline u32 gr_fecs_host_int_status_fault_during_ctxsw_f(u32 v) -{ - return (v & 0x1) << 16; -} -static inline u32 gr_fecs_host_int_status_umimp_firmware_method_f(u32 v) -{ - return (v & 0x1) << 17; -} -static inline u32 gr_fecs_host_int_status_umimp_illegal_method_f(u32 v) -{ - return (v & 0x1) << 18; -} -static inline u32 gr_fecs_host_int_clear_r(void) -{ - return 0x00409c20; -} -static inline u32 gr_fecs_host_int_enable_r(void) -{ - return 0x00409c24; -} -static inline u32 gr_fecs_host_int_enable_fault_during_ctxsw_enable_f(void) -{ - return 0x10000; -} -static inline u32 gr_fecs_host_int_enable_umimp_firmware_method_enable_f(void) -{ - return 0x20000; -} -static inline u32 gr_fecs_host_int_enable_umimp_illegal_method_enable_f(void) -{ - return 0x40000; -} -static inline u32 gr_fecs_host_int_enable_watchdog_enable_f(void) -{ - return 0x80000; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_r(void) -{ - return 0x00409614; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_sys_halt_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_gpc_halt_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_halt_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_sys_engine_reset_disabled_f(void) -{ - return 0x10; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_gpc_engine_reset_disabled_f(void) -{ - return 0x20; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_engine_reset_disabled_f(void) -{ - return 0x40; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_sys_context_reset_enabled_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_sys_context_reset_disabled_f(void) -{ - return 0x100; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_gpc_context_reset_enabled_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_gpc_context_reset_disabled_f(void) -{ - return 0x200; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_context_reset_s(void) -{ - return 1; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_context_reset_f(u32 v) -{ - return (v & 0x1) << 10; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_context_reset_m(void) -{ - return 0x1 << 10; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_context_reset_v(u32 r) -{ - return (r >> 10) & 0x1; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_context_reset_enabled_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_ctxsw_reset_ctl_be_context_reset_disabled_f(void) -{ - return 0x400; -} -static inline u32 gr_fecs_ctx_state_store_major_rev_id_r(void) -{ - return 0x0040960c; -} -static inline u32 gr_fecs_ctxsw_mailbox_r(u32 i) -{ - return 0x00409800 + i*4; -} -static inline u32 gr_fecs_ctxsw_mailbox__size_1_v(void) -{ - return 0x00000010; -} -static inline u32 gr_fecs_ctxsw_mailbox_value_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_fecs_ctxsw_mailbox_value_pass_v(void) -{ - return 0x00000001; -} -static inline u32 gr_fecs_ctxsw_mailbox_value_fail_v(void) -{ - return 0x00000002; -} -static inline u32 gr_fecs_ctxsw_mailbox_set_r(u32 i) -{ - return 0x004098c0 + i*4; -} -static inline u32 gr_fecs_ctxsw_mailbox_set_value_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_fecs_ctxsw_mailbox_clear_r(u32 i) -{ - return 0x00409840 + i*4; -} -static inline u32 gr_fecs_ctxsw_mailbox_clear_value_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_fecs_fs_r(void) -{ - return 0x00409604; -} -static inline u32 gr_fecs_fs_num_available_gpcs_s(void) -{ - return 5; -} -static inline u32 gr_fecs_fs_num_available_gpcs_f(u32 v) -{ - return (v & 0x1f) << 0; -} -static inline u32 gr_fecs_fs_num_available_gpcs_m(void) -{ - return 0x1f << 0; -} -static inline u32 gr_fecs_fs_num_available_gpcs_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 gr_fecs_fs_num_available_fbps_s(void) -{ - return 5; -} -static inline u32 gr_fecs_fs_num_available_fbps_f(u32 v) -{ - return (v & 0x1f) << 16; -} -static inline u32 gr_fecs_fs_num_available_fbps_m(void) -{ - return 0x1f << 16; -} -static inline u32 gr_fecs_fs_num_available_fbps_v(u32 r) -{ - return (r >> 16) & 0x1f; -} -static inline u32 gr_fecs_cfg_r(void) -{ - return 0x00409620; -} -static inline u32 gr_fecs_cfg_imem_sz_v(u32 r) -{ - return (r >> 0) & 0xff; -} -static inline u32 gr_fecs_rc_lanes_r(void) -{ - return 0x00409880; -} -static inline u32 gr_fecs_rc_lanes_num_chains_s(void) -{ - return 6; -} -static inline u32 gr_fecs_rc_lanes_num_chains_f(u32 v) -{ - return (v & 0x3f) << 0; -} -static inline u32 gr_fecs_rc_lanes_num_chains_m(void) -{ - return 0x3f << 0; -} -static inline u32 gr_fecs_rc_lanes_num_chains_v(u32 r) -{ - return (r >> 0) & 0x3f; -} -static inline u32 gr_fecs_ctxsw_status_1_r(void) -{ - return 0x00409400; -} -static inline u32 gr_fecs_ctxsw_status_1_arb_busy_s(void) -{ - return 1; -} -static inline u32 gr_fecs_ctxsw_status_1_arb_busy_f(u32 v) -{ - return (v & 0x1) << 12; -} -static inline u32 gr_fecs_ctxsw_status_1_arb_busy_m(void) -{ - return 0x1 << 12; -} -static inline u32 gr_fecs_ctxsw_status_1_arb_busy_v(u32 r) -{ - return (r >> 12) & 0x1; -} -static inline u32 gr_fecs_arb_ctx_adr_r(void) -{ - return 0x00409a24; -} -static inline u32 gr_fecs_new_ctx_r(void) -{ - return 0x00409b04; -} -static inline u32 gr_fecs_new_ctx_ptr_s(void) -{ - return 28; -} -static inline u32 gr_fecs_new_ctx_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 gr_fecs_new_ctx_ptr_m(void) -{ - return 0xfffffff << 0; -} -static inline u32 gr_fecs_new_ctx_ptr_v(u32 r) -{ - return (r >> 0) & 0xfffffff; -} -static inline u32 gr_fecs_new_ctx_target_s(void) -{ - return 2; -} -static inline u32 gr_fecs_new_ctx_target_f(u32 v) -{ - return (v & 0x3) << 28; -} -static inline u32 gr_fecs_new_ctx_target_m(void) -{ - return 0x3 << 28; -} -static inline u32 gr_fecs_new_ctx_target_v(u32 r) -{ - return (r >> 28) & 0x3; -} -static inline u32 gr_fecs_new_ctx_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_new_ctx_target_sys_mem_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 gr_fecs_new_ctx_valid_s(void) -{ - return 1; -} -static inline u32 gr_fecs_new_ctx_valid_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 gr_fecs_new_ctx_valid_m(void) -{ - return 0x1 << 31; -} -static inline u32 gr_fecs_new_ctx_valid_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 gr_fecs_arb_ctx_ptr_r(void) -{ - return 0x00409a0c; -} -static inline u32 gr_fecs_arb_ctx_ptr_ptr_s(void) -{ - return 28; -} -static inline u32 gr_fecs_arb_ctx_ptr_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 gr_fecs_arb_ctx_ptr_ptr_m(void) -{ - return 0xfffffff << 0; -} -static inline u32 gr_fecs_arb_ctx_ptr_ptr_v(u32 r) -{ - return (r >> 0) & 0xfffffff; -} -static inline u32 gr_fecs_arb_ctx_ptr_target_s(void) -{ - return 2; -} -static inline u32 gr_fecs_arb_ctx_ptr_target_f(u32 v) -{ - return (v & 0x3) << 28; -} -static inline u32 gr_fecs_arb_ctx_ptr_target_m(void) -{ - return 0x3 << 28; -} -static inline u32 gr_fecs_arb_ctx_ptr_target_v(u32 r) -{ - return (r >> 28) & 0x3; -} -static inline u32 gr_fecs_arb_ctx_ptr_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 gr_fecs_arb_ctx_ptr_target_sys_mem_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 gr_fecs_arb_ctx_cmd_r(void) -{ - return 0x00409a10; -} -static inline u32 gr_fecs_arb_ctx_cmd_cmd_s(void) -{ - return 5; -} -static inline u32 gr_fecs_arb_ctx_cmd_cmd_f(u32 v) -{ - return (v & 0x1f) << 0; -} -static inline u32 gr_fecs_arb_ctx_cmd_cmd_m(void) -{ - return 0x1f << 0; -} -static inline u32 gr_fecs_arb_ctx_cmd_cmd_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 gr_fecs_ctxsw_status_fe_0_r(void) -{ - return 0x00409c00; -} -static inline u32 gr_gpc0_gpccs_ctxsw_status_gpc_0_r(void) -{ - return 0x00502c04; -} -static inline u32 gr_gpc0_gpccs_ctxsw_status_1_r(void) -{ - return 0x00502400; -} -static inline u32 gr_fecs_ctxsw_idlestate_r(void) -{ - return 0x00409420; -} -static inline u32 gr_gpc0_gpccs_ctxsw_idlestate_r(void) -{ - return 0x00502420; -} -static inline u32 gr_rstr2d_gpc_map0_r(void) -{ - return 0x0040780c; -} -static inline u32 gr_rstr2d_gpc_map1_r(void) -{ - return 0x00407810; -} -static inline u32 gr_rstr2d_gpc_map2_r(void) -{ - return 0x00407814; -} -static inline u32 gr_rstr2d_gpc_map3_r(void) -{ - return 0x00407818; -} -static inline u32 gr_rstr2d_gpc_map4_r(void) -{ - return 0x0040781c; -} -static inline u32 gr_rstr2d_gpc_map5_r(void) -{ - return 0x00407820; -} -static inline u32 gr_rstr2d_map_table_cfg_r(void) -{ - return 0x004078bc; -} -static inline u32 gr_rstr2d_map_table_cfg_row_offset_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_rstr2d_map_table_cfg_num_entries_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_pd_hww_esr_r(void) -{ - return 0x00406018; -} -static inline u32 gr_pd_hww_esr_reset_active_f(void) -{ - return 0x40000000; -} -static inline u32 gr_pd_hww_esr_en_enable_f(void) -{ - return 0x80000000; -} -static inline u32 gr_pd_num_tpc_per_gpc_r(u32 i) -{ - return 0x00406028 + i*4; -} -static inline u32 gr_pd_num_tpc_per_gpc__size_1_v(void) -{ - return 0x00000004; -} -static inline u32 gr_pd_num_tpc_per_gpc_count0_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 gr_pd_num_tpc_per_gpc_count1_f(u32 v) -{ - return (v & 0xf) << 4; -} -static inline u32 gr_pd_num_tpc_per_gpc_count2_f(u32 v) -{ - return (v & 0xf) << 8; -} -static inline u32 gr_pd_num_tpc_per_gpc_count3_f(u32 v) -{ - return (v & 0xf) << 12; -} -static inline u32 gr_pd_num_tpc_per_gpc_count4_f(u32 v) -{ - return (v & 0xf) << 16; -} -static inline u32 gr_pd_num_tpc_per_gpc_count5_f(u32 v) -{ - return (v & 0xf) << 20; -} -static inline u32 gr_pd_num_tpc_per_gpc_count6_f(u32 v) -{ - return (v & 0xf) << 24; -} -static inline u32 gr_pd_num_tpc_per_gpc_count7_f(u32 v) -{ - return (v & 0xf) << 28; -} -static inline u32 gr_pd_ab_dist_cfg0_r(void) -{ - return 0x004064c0; -} -static inline u32 gr_pd_ab_dist_cfg0_timeslice_enable_en_f(void) -{ - return 0x80000000; -} -static inline u32 gr_pd_ab_dist_cfg0_timeslice_enable_dis_f(void) -{ - return 0x0; -} -static inline u32 gr_pd_ab_dist_cfg1_r(void) -{ - return 0x004064c4; -} -static inline u32 gr_pd_ab_dist_cfg1_max_batches_init_f(void) -{ - return 0xffff; -} -static inline u32 gr_pd_ab_dist_cfg1_max_output_f(u32 v) -{ - return (v & 0xffff) << 16; -} -static inline u32 gr_pd_ab_dist_cfg1_max_output_granularity_v(void) -{ - return 0x00000080; -} -static inline u32 gr_pd_ab_dist_cfg2_r(void) -{ - return 0x004064c8; -} -static inline u32 gr_pd_ab_dist_cfg2_token_limit_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 gr_pd_ab_dist_cfg2_token_limit_init_v(void) -{ - return 0x00000780; -} -static inline u32 gr_pd_ab_dist_cfg2_state_limit_f(u32 v) -{ - return (v & 0xfff) << 16; -} -static inline u32 gr_pd_ab_dist_cfg2_state_limit_scc_bundle_granularity_v(void) -{ - return 0x00000020; -} -static inline u32 gr_pd_ab_dist_cfg2_state_limit_min_gpm_fifo_depths_v(void) -{ - return 0x00000780; -} -static inline u32 gr_pd_pagepool_r(void) -{ - return 0x004064cc; -} -static inline u32 gr_pd_pagepool_total_pages_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_pd_pagepool_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 gr_pd_dist_skip_table_r(u32 i) -{ - return 0x004064d0 + i*4; -} -static inline u32 gr_pd_dist_skip_table__size_1_v(void) -{ - return 0x00000008; -} -static inline u32 gr_pd_dist_skip_table_gpc_4n0_mask_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_pd_dist_skip_table_gpc_4n1_mask_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_pd_dist_skip_table_gpc_4n2_mask_f(u32 v) -{ - return (v & 0xff) << 16; -} -static inline u32 gr_pd_dist_skip_table_gpc_4n3_mask_f(u32 v) -{ - return (v & 0xff) << 24; -} -static inline u32 gr_ds_debug_r(void) -{ - return 0x00405800; -} -static inline u32 gr_ds_debug_timeslice_mode_disable_f(void) -{ - return 0x0; -} -static inline u32 gr_ds_debug_timeslice_mode_enable_f(void) -{ - return 0x8000000; -} -static inline u32 gr_ds_zbc_color_r_r(void) -{ - return 0x00405804; -} -static inline u32 gr_ds_zbc_color_r_val_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_ds_zbc_color_g_r(void) -{ - return 0x00405808; -} -static inline u32 gr_ds_zbc_color_g_val_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_ds_zbc_color_b_r(void) -{ - return 0x0040580c; -} -static inline u32 gr_ds_zbc_color_b_val_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_ds_zbc_color_a_r(void) -{ - return 0x00405810; -} -static inline u32 gr_ds_zbc_color_a_val_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_ds_zbc_color_fmt_r(void) -{ - return 0x00405814; -} -static inline u32 gr_ds_zbc_color_fmt_val_f(u32 v) -{ - return (v & 0x7f) << 0; -} -static inline u32 gr_ds_zbc_color_fmt_val_invalid_f(void) -{ - return 0x0; -} -static inline u32 gr_ds_zbc_color_fmt_val_zero_v(void) -{ - return 0x00000001; -} -static inline u32 gr_ds_zbc_color_fmt_val_unorm_one_v(void) -{ - return 0x00000002; -} -static inline u32 gr_ds_zbc_color_fmt_val_rf32_gf32_bf32_af32_v(void) -{ - return 0x00000004; -} -static inline u32 gr_ds_zbc_color_fmt_val_a8_b8_g8_r8_v(void) -{ - return 0x00000028; -} -static inline u32 gr_ds_zbc_z_r(void) -{ - return 0x00405818; -} -static inline u32 gr_ds_zbc_z_val_s(void) -{ - return 32; -} -static inline u32 gr_ds_zbc_z_val_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_ds_zbc_z_val_m(void) -{ - return 0xffffffff << 0; -} -static inline u32 gr_ds_zbc_z_val_v(u32 r) -{ - return (r >> 0) & 0xffffffff; -} -static inline u32 gr_ds_zbc_z_val__init_v(void) -{ - return 0x00000000; -} -static inline u32 gr_ds_zbc_z_val__init_f(void) -{ - return 0x0; -} -static inline u32 gr_ds_zbc_z_fmt_r(void) -{ - return 0x0040581c; -} -static inline u32 gr_ds_zbc_z_fmt_val_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 gr_ds_zbc_z_fmt_val_invalid_f(void) -{ - return 0x0; -} -static inline u32 gr_ds_zbc_z_fmt_val_fp32_v(void) -{ - return 0x00000001; -} -static inline u32 gr_ds_zbc_tbl_index_r(void) -{ - return 0x00405820; -} -static inline u32 gr_ds_zbc_tbl_index_val_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 gr_ds_zbc_tbl_ld_r(void) -{ - return 0x00405824; -} -static inline u32 gr_ds_zbc_tbl_ld_select_c_f(void) -{ - return 0x0; -} -static inline u32 gr_ds_zbc_tbl_ld_select_z_f(void) -{ - return 0x1; -} -static inline u32 gr_ds_zbc_tbl_ld_action_write_f(void) -{ - return 0x0; -} -static inline u32 gr_ds_zbc_tbl_ld_trigger_active_f(void) -{ - return 0x4; -} -static inline u32 gr_ds_tga_constraintlogic_r(void) -{ - return 0x00405830; -} -static inline u32 gr_ds_tga_constraintlogic_beta_cbsize_f(u32 v) -{ - return (v & 0xffff) << 16; -} -static inline u32 gr_ds_tga_constraintlogic_alpha_cbsize_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_ds_hww_esr_r(void) -{ - return 0x00405840; -} -static inline u32 gr_ds_hww_esr_reset_s(void) -{ - return 1; -} -static inline u32 gr_ds_hww_esr_reset_f(u32 v) -{ - return (v & 0x1) << 30; -} -static inline u32 gr_ds_hww_esr_reset_m(void) -{ - return 0x1 << 30; -} -static inline u32 gr_ds_hww_esr_reset_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 gr_ds_hww_esr_reset_task_v(void) -{ - return 0x00000001; -} -static inline u32 gr_ds_hww_esr_reset_task_f(void) -{ - return 0x40000000; -} -static inline u32 gr_ds_hww_esr_en_enabled_f(void) -{ - return 0x80000000; -} -static inline u32 gr_ds_hww_esr_2_r(void) -{ - return 0x00405848; -} -static inline u32 gr_ds_hww_esr_2_reset_s(void) -{ - return 1; -} -static inline u32 gr_ds_hww_esr_2_reset_f(u32 v) -{ - return (v & 0x1) << 30; -} -static inline u32 gr_ds_hww_esr_2_reset_m(void) -{ - return 0x1 << 30; -} -static inline u32 gr_ds_hww_esr_2_reset_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 gr_ds_hww_esr_2_reset_task_v(void) -{ - return 0x00000001; -} -static inline u32 gr_ds_hww_esr_2_reset_task_f(void) -{ - return 0x40000000; -} -static inline u32 gr_ds_hww_esr_2_en_enabled_f(void) -{ - return 0x80000000; -} -static inline u32 gr_ds_hww_report_mask_r(void) -{ - return 0x00405844; -} -static inline u32 gr_ds_hww_report_mask_sph0_err_report_f(void) -{ - return 0x1; -} -static inline u32 gr_ds_hww_report_mask_sph1_err_report_f(void) -{ - return 0x2; -} -static inline u32 gr_ds_hww_report_mask_sph2_err_report_f(void) -{ - return 0x4; -} -static inline u32 gr_ds_hww_report_mask_sph3_err_report_f(void) -{ - return 0x8; -} -static inline u32 gr_ds_hww_report_mask_sph4_err_report_f(void) -{ - return 0x10; -} -static inline u32 gr_ds_hww_report_mask_sph5_err_report_f(void) -{ - return 0x20; -} -static inline u32 gr_ds_hww_report_mask_sph6_err_report_f(void) -{ - return 0x40; -} -static inline u32 gr_ds_hww_report_mask_sph7_err_report_f(void) -{ - return 0x80; -} -static inline u32 gr_ds_hww_report_mask_sph8_err_report_f(void) -{ - return 0x100; -} -static inline u32 gr_ds_hww_report_mask_sph9_err_report_f(void) -{ - return 0x200; -} -static inline u32 gr_ds_hww_report_mask_sph10_err_report_f(void) -{ - return 0x400; -} -static inline u32 gr_ds_hww_report_mask_sph11_err_report_f(void) -{ - return 0x800; -} -static inline u32 gr_ds_hww_report_mask_sph12_err_report_f(void) -{ - return 0x1000; -} -static inline u32 gr_ds_hww_report_mask_sph13_err_report_f(void) -{ - return 0x2000; -} -static inline u32 gr_ds_hww_report_mask_sph14_err_report_f(void) -{ - return 0x4000; -} -static inline u32 gr_ds_hww_report_mask_sph15_err_report_f(void) -{ - return 0x8000; -} -static inline u32 gr_ds_hww_report_mask_sph16_err_report_f(void) -{ - return 0x10000; -} -static inline u32 gr_ds_hww_report_mask_sph17_err_report_f(void) -{ - return 0x20000; -} -static inline u32 gr_ds_hww_report_mask_sph18_err_report_f(void) -{ - return 0x40000; -} -static inline u32 gr_ds_hww_report_mask_sph19_err_report_f(void) -{ - return 0x80000; -} -static inline u32 gr_ds_hww_report_mask_sph20_err_report_f(void) -{ - return 0x100000; -} -static inline u32 gr_ds_hww_report_mask_sph21_err_report_f(void) -{ - return 0x200000; -} -static inline u32 gr_ds_hww_report_mask_sph22_err_report_f(void) -{ - return 0x400000; -} -static inline u32 gr_ds_hww_report_mask_sph23_err_report_f(void) -{ - return 0x800000; -} -static inline u32 gr_ds_hww_report_mask_2_r(void) -{ - return 0x0040584c; -} -static inline u32 gr_ds_hww_report_mask_2_sph24_err_report_f(void) -{ - return 0x1; -} -static inline u32 gr_ds_num_tpc_per_gpc_r(u32 i) -{ - return 0x00405870 + i*4; -} -static inline u32 gr_scc_bundle_cb_base_r(void) -{ - return 0x00408004; -} -static inline u32 gr_scc_bundle_cb_base_addr_39_8_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_scc_bundle_cb_base_addr_39_8_align_bits_v(void) -{ - return 0x00000008; -} -static inline u32 gr_scc_bundle_cb_size_r(void) -{ - return 0x00408008; -} -static inline u32 gr_scc_bundle_cb_size_div_256b_f(u32 v) -{ - return (v & 0x7ff) << 0; -} -static inline u32 gr_scc_bundle_cb_size_div_256b__prod_v(void) -{ - return 0x00000030; -} -static inline u32 gr_scc_bundle_cb_size_div_256b_byte_granularity_v(void) -{ - return 0x00000100; -} -static inline u32 gr_scc_bundle_cb_size_valid_false_v(void) -{ - return 0x00000000; -} -static inline u32 gr_scc_bundle_cb_size_valid_false_f(void) -{ - return 0x0; -} -static inline u32 gr_scc_bundle_cb_size_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 gr_scc_pagepool_base_r(void) -{ - return 0x0040800c; -} -static inline u32 gr_scc_pagepool_base_addr_39_8_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_scc_pagepool_base_addr_39_8_align_bits_v(void) -{ - return 0x00000008; -} -static inline u32 gr_scc_pagepool_r(void) -{ - return 0x00408010; -} -static inline u32 gr_scc_pagepool_total_pages_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_scc_pagepool_total_pages_hwmax_v(void) -{ - return 0x00000000; -} -static inline u32 gr_scc_pagepool_total_pages_hwmax_value_v(void) -{ - return 0x00000080; -} -static inline u32 gr_scc_pagepool_total_pages_byte_granularity_v(void) -{ - return 0x00000100; -} -static inline u32 gr_scc_pagepool_max_valid_pages_s(void) -{ - return 8; -} -static inline u32 gr_scc_pagepool_max_valid_pages_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_scc_pagepool_max_valid_pages_m(void) -{ - return 0xff << 8; -} -static inline u32 gr_scc_pagepool_max_valid_pages_v(u32 r) -{ - return (r >> 8) & 0xff; -} -static inline u32 gr_scc_pagepool_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 gr_scc_init_r(void) -{ - return 0x0040802c; -} -static inline u32 gr_scc_init_ram_trigger_f(void) -{ - return 0x1; -} -static inline u32 gr_scc_hww_esr_r(void) -{ - return 0x00408030; -} -static inline u32 gr_scc_hww_esr_reset_active_f(void) -{ - return 0x40000000; -} -static inline u32 gr_scc_hww_esr_en_enable_f(void) -{ - return 0x80000000; -} -static inline u32 gr_sked_hww_esr_r(void) -{ - return 0x00407020; -} -static inline u32 gr_sked_hww_esr_reset_active_f(void) -{ - return 0x40000000; -} -static inline u32 gr_cwd_fs_r(void) -{ - return 0x00405b00; -} -static inline u32 gr_cwd_fs_num_gpcs_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_cwd_fs_num_tpcs_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_cwd_gpc_tpc_id_r(u32 i) -{ - return 0x00405b60 + i*4; -} -static inline u32 gr_cwd_gpc_tpc_id_tpc0_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 gr_cwd_gpc_tpc_id_tpc1_f(u32 v) -{ - return (v & 0xf) << 8; -} -static inline u32 gr_cwd_sm_id_r(u32 i) -{ - return 0x00405ba0 + i*4; -} -static inline u32 gr_cwd_sm_id_tpc0_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_cwd_sm_id_tpc1_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_gpc0_fs_gpc_r(void) -{ - return 0x00502608; -} -static inline u32 gr_gpc0_fs_gpc_num_available_tpcs_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 gr_gpc0_fs_gpc_num_available_zculls_v(u32 r) -{ - return (r >> 16) & 0x1f; -} -static inline u32 gr_gpc0_cfg_r(void) -{ - return 0x00502620; -} -static inline u32 gr_gpc0_cfg_imem_sz_v(u32 r) -{ - return (r >> 0) & 0xff; -} -static inline u32 gr_gpccs_rc_lanes_r(void) -{ - return 0x00502880; -} -static inline u32 gr_gpccs_rc_lanes_num_chains_s(void) -{ - return 6; -} -static inline u32 gr_gpccs_rc_lanes_num_chains_f(u32 v) -{ - return (v & 0x3f) << 0; -} -static inline u32 gr_gpccs_rc_lanes_num_chains_m(void) -{ - return 0x3f << 0; -} -static inline u32 gr_gpccs_rc_lanes_num_chains_v(u32 r) -{ - return (r >> 0) & 0x3f; -} -static inline u32 gr_gpccs_rc_lane_size_r(u32 i) -{ - return 0x00502910 + i*0; -} -static inline u32 gr_gpccs_rc_lane_size__size_1_v(void) -{ - return 0x00000010; -} -static inline u32 gr_gpccs_rc_lane_size_v_s(void) -{ - return 24; -} -static inline u32 gr_gpccs_rc_lane_size_v_f(u32 v) -{ - return (v & 0xffffff) << 0; -} -static inline u32 gr_gpccs_rc_lane_size_v_m(void) -{ - return 0xffffff << 0; -} -static inline u32 gr_gpccs_rc_lane_size_v_v(u32 r) -{ - return (r >> 0) & 0xffffff; -} -static inline u32 gr_gpccs_rc_lane_size_v_0_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpccs_rc_lane_size_v_0_f(void) -{ - return 0x0; -} -static inline u32 gr_gpc0_zcull_fs_r(void) -{ - return 0x00500910; -} -static inline u32 gr_gpc0_zcull_fs_num_sms_f(u32 v) -{ - return (v & 0x1ff) << 0; -} -static inline u32 gr_gpc0_zcull_fs_num_active_banks_f(u32 v) -{ - return (v & 0xf) << 16; -} -static inline u32 gr_gpc0_zcull_ram_addr_r(void) -{ - return 0x00500914; -} -static inline u32 gr_gpc0_zcull_ram_addr_tiles_per_hypertile_row_per_gpc_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 gr_gpc0_zcull_ram_addr_row_offset_f(u32 v) -{ - return (v & 0xf) << 8; -} -static inline u32 gr_gpc0_zcull_sm_num_rcp_r(void) -{ - return 0x00500918; -} -static inline u32 gr_gpc0_zcull_sm_num_rcp_conservative_f(u32 v) -{ - return (v & 0xffffff) << 0; -} -static inline u32 gr_gpc0_zcull_sm_num_rcp_conservative__max_v(void) -{ - return 0x00800000; -} -static inline u32 gr_gpc0_zcull_total_ram_size_r(void) -{ - return 0x00500920; -} -static inline u32 gr_gpc0_zcull_total_ram_size_num_aliquots_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_gpc0_zcull_zcsize_r(u32 i) -{ - return 0x00500a04 + i*32; -} -static inline u32 gr_gpc0_zcull_zcsize_height_subregion__multiple_v(void) -{ - return 0x00000040; -} -static inline u32 gr_gpc0_zcull_zcsize_width_subregion__multiple_v(void) -{ - return 0x00000010; -} -static inline u32 gr_gpc0_gpm_pd_sm_id_r(u32 i) -{ - return 0x00500c10 + i*4; -} -static inline u32 gr_gpc0_gpm_pd_sm_id_id_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_gpc0_gpm_pd_pes_tpc_id_mask_r(u32 i) -{ - return 0x00500c30 + i*4; -} -static inline u32 gr_gpc0_gpm_pd_pes_tpc_id_mask_mask_v(u32 r) -{ - return (r >> 0) & 0xff; -} -static inline u32 gr_gpc0_tpc0_pe_cfg_smid_r(void) -{ - return 0x00504088; -} -static inline u32 gr_gpc0_tpc0_pe_cfg_smid_value_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_gpc0_tpc0_sm_cfg_r(void) -{ - return 0x00504698; -} -static inline u32 gr_gpc0_tpc0_sm_cfg_sm_id_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_gpc0_tpc0_sm_arch_r(void) -{ - return 0x0050469c; -} -static inline u32 gr_gpc0_tpc0_sm_arch_warp_count_v(u32 r) -{ - return (r >> 0) & 0xff; -} -static inline u32 gr_gpc0_tpc0_sm_arch_spa_version_v(u32 r) -{ - return (r >> 8) & 0xfff; -} -static inline u32 gr_gpc0_tpc0_sm_arch_sm_version_v(u32 r) -{ - return (r >> 20) & 0xfff; -} -static inline u32 gr_gpc0_ppc0_pes_vsc_strem_r(void) -{ - return 0x00503018; -} -static inline u32 gr_gpc0_ppc0_pes_vsc_strem_master_pe_m(void) -{ - return 0x1 << 0; -} -static inline u32 gr_gpc0_ppc0_pes_vsc_strem_master_pe_true_f(void) -{ - return 0x1; -} -static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_r(void) -{ - return 0x005030c0; -} -static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_m(void) -{ - return 0xffff << 0; -} -static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v(void) -{ - return 0x00000400; -} -static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_granularity_v(void) -{ - return 0x00000020; -} -static inline u32 gr_gpc0_ppc0_cbm_beta_cb_offset_r(void) -{ - return 0x005030f4; -} -static inline u32 gr_gpc0_ppc0_cbm_alpha_cb_size_r(void) -{ - return 0x005030e4; -} -static inline u32 gr_gpc0_ppc0_cbm_alpha_cb_size_v_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_gpc0_ppc0_cbm_alpha_cb_size_v_m(void) -{ - return 0xffff << 0; -} -static inline u32 gr_gpc0_ppc0_cbm_alpha_cb_size_v_default_v(void) -{ - return 0x00001000; -} -static inline u32 gr_gpc0_ppc0_cbm_alpha_cb_size_v_granularity_v(void) -{ - return 0x00000020; -} -static inline u32 gr_gpc0_ppc0_cbm_alpha_cb_offset_r(void) -{ - return 0x005030f8; -} -static inline u32 gr_gpccs_falcon_addr_r(void) -{ - return 0x0041a0ac; -} -static inline u32 gr_gpccs_falcon_addr_lsb_s(void) -{ - return 6; -} -static inline u32 gr_gpccs_falcon_addr_lsb_f(u32 v) -{ - return (v & 0x3f) << 0; -} -static inline u32 gr_gpccs_falcon_addr_lsb_m(void) -{ - return 0x3f << 0; -} -static inline u32 gr_gpccs_falcon_addr_lsb_v(u32 r) -{ - return (r >> 0) & 0x3f; -} -static inline u32 gr_gpccs_falcon_addr_lsb_init_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpccs_falcon_addr_lsb_init_f(void) -{ - return 0x0; -} -static inline u32 gr_gpccs_falcon_addr_msb_s(void) -{ - return 6; -} -static inline u32 gr_gpccs_falcon_addr_msb_f(u32 v) -{ - return (v & 0x3f) << 6; -} -static inline u32 gr_gpccs_falcon_addr_msb_m(void) -{ - return 0x3f << 6; -} -static inline u32 gr_gpccs_falcon_addr_msb_v(u32 r) -{ - return (r >> 6) & 0x3f; -} -static inline u32 gr_gpccs_falcon_addr_msb_init_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpccs_falcon_addr_msb_init_f(void) -{ - return 0x0; -} -static inline u32 gr_gpccs_falcon_addr_ext_s(void) -{ - return 12; -} -static inline u32 gr_gpccs_falcon_addr_ext_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 gr_gpccs_falcon_addr_ext_m(void) -{ - return 0xfff << 0; -} -static inline u32 gr_gpccs_falcon_addr_ext_v(u32 r) -{ - return (r >> 0) & 0xfff; -} -static inline u32 gr_gpccs_cpuctl_r(void) -{ - return 0x0041a100; -} -static inline u32 gr_gpccs_cpuctl_startcpu_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 gr_gpccs_dmactl_r(void) -{ - return 0x0041a10c; -} -static inline u32 gr_gpccs_dmactl_require_ctx_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 gr_gpccs_dmactl_dmem_scrubbing_m(void) -{ - return 0x1 << 1; -} -static inline u32 gr_gpccs_dmactl_imem_scrubbing_m(void) -{ - return 0x1 << 2; -} -static inline u32 gr_gpccs_imemc_r(u32 i) -{ - return 0x0041a180 + i*16; -} -static inline u32 gr_gpccs_imemc_offs_f(u32 v) -{ - return (v & 0x3f) << 2; -} -static inline u32 gr_gpccs_imemc_blk_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_gpccs_imemc_aincw_f(u32 v) -{ - return (v & 0x1) << 24; -} -static inline u32 gr_gpccs_imemd_r(u32 i) -{ - return 0x0041a184 + i*16; -} -static inline u32 gr_gpccs_imemt_r(u32 i) -{ - return 0x0041a188 + i*16; -} -static inline u32 gr_gpccs_imemt__size_1_v(void) -{ - return 0x00000004; -} -static inline u32 gr_gpccs_imemt_tag_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_gpccs_dmemc_r(u32 i) -{ - return 0x0041a1c0 + i*8; -} -static inline u32 gr_gpccs_dmemc_offs_f(u32 v) -{ - return (v & 0x3f) << 2; -} -static inline u32 gr_gpccs_dmemc_blk_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_gpccs_dmemc_aincw_f(u32 v) -{ - return (v & 0x1) << 24; -} -static inline u32 gr_gpccs_dmemd_r(u32 i) -{ - return 0x0041a1c4 + i*8; -} -static inline u32 gr_gpccs_ctxsw_mailbox_r(u32 i) -{ - return 0x0041a800 + i*4; -} -static inline u32 gr_gpccs_ctxsw_mailbox_value_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_gpcs_swdx_bundle_cb_base_r(void) -{ - return 0x00418e24; -} -static inline u32 gr_gpcs_swdx_bundle_cb_base_addr_39_8_s(void) -{ - return 32; -} -static inline u32 gr_gpcs_swdx_bundle_cb_base_addr_39_8_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_gpcs_swdx_bundle_cb_base_addr_39_8_m(void) -{ - return 0xffffffff << 0; -} -static inline u32 gr_gpcs_swdx_bundle_cb_base_addr_39_8_v(u32 r) -{ - return (r >> 0) & 0xffffffff; -} -static inline u32 gr_gpcs_swdx_bundle_cb_base_addr_39_8_init_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpcs_swdx_bundle_cb_base_addr_39_8_init_f(void) -{ - return 0x0; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_r(void) -{ - return 0x00418e28; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_div_256b_s(void) -{ - return 11; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_div_256b_f(u32 v) -{ - return (v & 0x7ff) << 0; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_div_256b_m(void) -{ - return 0x7ff << 0; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_div_256b_v(u32 r) -{ - return (r >> 0) & 0x7ff; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_div_256b_init_v(void) -{ - return 0x00000030; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_div_256b_init_f(void) -{ - return 0x30; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_s(void) -{ - return 1; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_m(void) -{ - return 0x1 << 31; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_false_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_false_f(void) -{ - return 0x0; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_true_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpcs_swdx_bundle_cb_size_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 gr_gpcs_swdx_tc_beta_cb_size_r(u32 i) -{ - return 0x00418ea0 + i*4; -} -static inline u32 gr_gpcs_swdx_tc_beta_cb_size_v_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 gr_gpcs_swdx_tc_beta_cb_size_v_m(void) -{ - return 0xffff << 0; -} -static inline u32 gr_gpcs_swdx_tc_beta_cb_size_div3_f(u32 v) -{ - return (v & 0xffff) << 16; -} -static inline u32 gr_gpcs_swdx_tc_beta_cb_size_div3_m(void) -{ - return 0xffff << 16; -} -static inline u32 gr_gpcs_swdx_rm_pagepool_r(void) -{ - return 0x00418e30; -} -static inline u32 gr_gpcs_swdx_rm_pagepool_total_pages_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_gpcs_swdx_rm_pagepool_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 gr_gpcs_setup_attrib_cb_base_r(void) -{ - return 0x00418810; -} -static inline u32 gr_gpcs_setup_attrib_cb_base_addr_39_12_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 gr_gpcs_setup_attrib_cb_base_addr_39_12_align_bits_v(void) -{ - return 0x0000000c; -} -static inline u32 gr_gpcs_setup_attrib_cb_base_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 gr_crstr_gpc_map0_r(void) -{ - return 0x00418b08; -} -static inline u32 gr_crstr_gpc_map0_tile0_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_crstr_gpc_map0_tile1_f(u32 v) -{ - return (v & 0x7) << 5; -} -static inline u32 gr_crstr_gpc_map0_tile2_f(u32 v) -{ - return (v & 0x7) << 10; -} -static inline u32 gr_crstr_gpc_map0_tile3_f(u32 v) -{ - return (v & 0x7) << 15; -} -static inline u32 gr_crstr_gpc_map0_tile4_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_crstr_gpc_map0_tile5_f(u32 v) -{ - return (v & 0x7) << 25; -} -static inline u32 gr_crstr_gpc_map1_r(void) -{ - return 0x00418b0c; -} -static inline u32 gr_crstr_gpc_map1_tile6_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_crstr_gpc_map1_tile7_f(u32 v) -{ - return (v & 0x7) << 5; -} -static inline u32 gr_crstr_gpc_map1_tile8_f(u32 v) -{ - return (v & 0x7) << 10; -} -static inline u32 gr_crstr_gpc_map1_tile9_f(u32 v) -{ - return (v & 0x7) << 15; -} -static inline u32 gr_crstr_gpc_map1_tile10_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_crstr_gpc_map1_tile11_f(u32 v) -{ - return (v & 0x7) << 25; -} -static inline u32 gr_crstr_gpc_map2_r(void) -{ - return 0x00418b10; -} -static inline u32 gr_crstr_gpc_map2_tile12_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_crstr_gpc_map2_tile13_f(u32 v) -{ - return (v & 0x7) << 5; -} -static inline u32 gr_crstr_gpc_map2_tile14_f(u32 v) -{ - return (v & 0x7) << 10; -} -static inline u32 gr_crstr_gpc_map2_tile15_f(u32 v) -{ - return (v & 0x7) << 15; -} -static inline u32 gr_crstr_gpc_map2_tile16_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_crstr_gpc_map2_tile17_f(u32 v) -{ - return (v & 0x7) << 25; -} -static inline u32 gr_crstr_gpc_map3_r(void) -{ - return 0x00418b14; -} -static inline u32 gr_crstr_gpc_map3_tile18_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_crstr_gpc_map3_tile19_f(u32 v) -{ - return (v & 0x7) << 5; -} -static inline u32 gr_crstr_gpc_map3_tile20_f(u32 v) -{ - return (v & 0x7) << 10; -} -static inline u32 gr_crstr_gpc_map3_tile21_f(u32 v) -{ - return (v & 0x7) << 15; -} -static inline u32 gr_crstr_gpc_map3_tile22_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_crstr_gpc_map3_tile23_f(u32 v) -{ - return (v & 0x7) << 25; -} -static inline u32 gr_crstr_gpc_map4_r(void) -{ - return 0x00418b18; -} -static inline u32 gr_crstr_gpc_map4_tile24_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_crstr_gpc_map4_tile25_f(u32 v) -{ - return (v & 0x7) << 5; -} -static inline u32 gr_crstr_gpc_map4_tile26_f(u32 v) -{ - return (v & 0x7) << 10; -} -static inline u32 gr_crstr_gpc_map4_tile27_f(u32 v) -{ - return (v & 0x7) << 15; -} -static inline u32 gr_crstr_gpc_map4_tile28_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_crstr_gpc_map4_tile29_f(u32 v) -{ - return (v & 0x7) << 25; -} -static inline u32 gr_crstr_gpc_map5_r(void) -{ - return 0x00418b1c; -} -static inline u32 gr_crstr_gpc_map5_tile30_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_crstr_gpc_map5_tile31_f(u32 v) -{ - return (v & 0x7) << 5; -} -static inline u32 gr_crstr_gpc_map5_tile32_f(u32 v) -{ - return (v & 0x7) << 10; -} -static inline u32 gr_crstr_gpc_map5_tile33_f(u32 v) -{ - return (v & 0x7) << 15; -} -static inline u32 gr_crstr_gpc_map5_tile34_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_crstr_gpc_map5_tile35_f(u32 v) -{ - return (v & 0x7) << 25; -} -static inline u32 gr_crstr_map_table_cfg_r(void) -{ - return 0x00418bb8; -} -static inline u32 gr_crstr_map_table_cfg_row_offset_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_crstr_map_table_cfg_num_entries_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_r(void) -{ - return 0x00418980; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_0_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_1_f(u32 v) -{ - return (v & 0x7) << 4; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_2_f(u32 v) -{ - return (v & 0x7) << 8; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_3_f(u32 v) -{ - return (v & 0x7) << 12; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_4_f(u32 v) -{ - return (v & 0x7) << 16; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_5_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_6_f(u32 v) -{ - return (v & 0x7) << 24; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map0_tile_7_f(u32 v) -{ - return (v & 0x7) << 28; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_r(void) -{ - return 0x00418984; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_8_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_9_f(u32 v) -{ - return (v & 0x7) << 4; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_10_f(u32 v) -{ - return (v & 0x7) << 8; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_11_f(u32 v) -{ - return (v & 0x7) << 12; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_12_f(u32 v) -{ - return (v & 0x7) << 16; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_13_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_14_f(u32 v) -{ - return (v & 0x7) << 24; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map1_tile_15_f(u32 v) -{ - return (v & 0x7) << 28; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_r(void) -{ - return 0x00418988; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_16_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_17_f(u32 v) -{ - return (v & 0x7) << 4; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_18_f(u32 v) -{ - return (v & 0x7) << 8; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_19_f(u32 v) -{ - return (v & 0x7) << 12; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_20_f(u32 v) -{ - return (v & 0x7) << 16; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_21_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_22_f(u32 v) -{ - return (v & 0x7) << 24; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_23_s(void) -{ - return 3; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_23_f(u32 v) -{ - return (v & 0x7) << 28; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_23_m(void) -{ - return 0x7 << 28; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map2_tile_23_v(u32 r) -{ - return (r >> 28) & 0x7; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_r(void) -{ - return 0x0041898c; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_24_f(u32 v) -{ - return (v & 0x7) << 0; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_25_f(u32 v) -{ - return (v & 0x7) << 4; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_26_f(u32 v) -{ - return (v & 0x7) << 8; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_27_f(u32 v) -{ - return (v & 0x7) << 12; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_28_f(u32 v) -{ - return (v & 0x7) << 16; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_29_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_30_f(u32 v) -{ - return (v & 0x7) << 24; -} -static inline u32 gr_gpcs_zcull_sm_in_gpc_number_map3_tile_31_f(u32 v) -{ - return (v & 0x7) << 28; -} -static inline u32 gr_gpcs_gpm_pd_cfg_r(void) -{ - return 0x00418c6c; -} -static inline u32 gr_gpcs_gpm_pd_cfg_timeslice_mode_disable_f(void) -{ - return 0x0; -} -static inline u32 gr_gpcs_gpm_pd_cfg_timeslice_mode_enable_f(void) -{ - return 0x1; -} -static inline u32 gr_gpcs_gcc_pagepool_base_r(void) -{ - return 0x00419004; -} -static inline u32 gr_gpcs_gcc_pagepool_base_addr_39_8_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 gr_gpcs_gcc_pagepool_r(void) -{ - return 0x00419008; -} -static inline u32 gr_gpcs_gcc_pagepool_total_pages_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_gpcs_tpcs_pe_vaf_r(void) -{ - return 0x0041980c; -} -static inline u32 gr_gpcs_tpcs_pe_vaf_fast_mode_switch_true_f(void) -{ - return 0x10; -} -static inline u32 gr_gpcs_tpcs_pe_pin_cb_global_base_addr_r(void) -{ - return 0x00419848; -} -static inline u32 gr_gpcs_tpcs_pe_pin_cb_global_base_addr_v_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 gr_gpcs_tpcs_pe_pin_cb_global_base_addr_valid_f(u32 v) -{ - return (v & 0x1) << 28; -} -static inline u32 gr_gpcs_tpcs_pe_pin_cb_global_base_addr_valid_true_f(void) -{ - return 0x10000000; -} -static inline u32 gr_gpcs_tpcs_mpc_vtg_debug_r(void) -{ - return 0x00419c00; -} -static inline u32 gr_gpcs_tpcs_mpc_vtg_debug_timeslice_mode_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_gpcs_tpcs_mpc_vtg_debug_timeslice_mode_enabled_f(void) -{ - return 0x8; -} -static inline u32 gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_r(void) -{ - return 0x00419c2c; -} -static inline u32 gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_v_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_valid_f(u32 v) -{ - return (v & 0x1) << 28; -} -static inline u32 gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_valid_true_f(void) -{ - return 0x10000000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_r(void) -{ - return 0x00419e44; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_stack_error_report_f(void) -{ - return 0x2; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_api_stack_error_report_f(void) -{ - return 0x4; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_ret_empty_stack_error_report_f(void) -{ - return 0x8; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_pc_wrap_report_f(void) -{ - return 0x10; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_misaligned_pc_report_f(void) -{ - return 0x20; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_pc_overflow_report_f(void) -{ - return 0x40; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_misaligned_immc_addr_report_f(void) -{ - return 0x80; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_misaligned_reg_report_f(void) -{ - return 0x100; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_illegal_instr_encoding_report_f(void) -{ - return 0x200; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_illegal_sph_instr_combo_report_f(void) -{ - return 0x400; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_illegal_instr_param_report_f(void) -{ - return 0x800; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_invalid_const_addr_report_f(void) -{ - return 0x1000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_oor_reg_report_f(void) -{ - return 0x2000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_oor_addr_report_f(void) -{ - return 0x4000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_misaligned_addr_report_f(void) -{ - return 0x8000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_invalid_addr_space_report_f(void) -{ - return 0x10000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_illegal_instr_param2_report_f(void) -{ - return 0x20000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_invalid_const_addr_ldc_report_f(void) -{ - return 0x40000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_mmu_fault_report_f(void) -{ - return 0x800000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_stack_overflow_report_f(void) -{ - return 0x400000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_geometry_sm_error_report_f(void) -{ - return 0x80000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_divergent_report_f(void) -{ - return 0x100000; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_r(void) -{ - return 0x00419e4c; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_sm_to_sm_fault_report_f(void) -{ - return 0x1; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_l1_error_report_f(void) -{ - return 0x2; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_multiple_warp_errors_report_f(void) -{ - return 0x4; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_physical_stack_overflow_error_report_f(void) -{ - return 0x8; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_bpt_int_report_f(void) -{ - return 0x10; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_bpt_pause_report_f(void) -{ - return 0x20; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_report_mask_single_step_complete_report_f(void) -{ - return 0x40; -} -static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_r(void) -{ - return 0x00419d0c; -} -static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_sm_enabled_f(void) -{ - return 0x2; -} -static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_tex_enabled_f(void) -{ - return 0x1; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_r(void) -{ - return 0x0050450c; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_sm_enabled_f(void) -{ - return 0x2; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_sm_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 gr_gpcs_gpccs_gpc_exception_en_r(void) -{ - return 0x0041ac94; -} -static inline u32 gr_gpcs_gpccs_gpc_exception_en_tpc_f(u32 v) -{ - return (v & 0xff) << 16; -} -static inline u32 gr_gpc0_gpccs_gpc_exception_r(void) -{ - return 0x00502c90; -} -static inline u32 gr_gpc0_gpccs_gpc_exception_gcc_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 gr_gpc0_gpccs_gpc_exception_tpc_v(u32 r) -{ - return (r >> 16) & 0xff; -} -static inline u32 gr_gpc0_gpccs_gpc_exception_tpc_0_pending_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_r(void) -{ - return 0x00504508; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_tex_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_tex_pending_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_sm_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_sm_pending_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_r(void) -{ - return 0x00504610; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(void) -{ - return 0x1 << 0; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_f(void) -{ - return 0x1; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_f(void) -{ - return 0x0; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_enable_f(void) -{ - return 0x80000000; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_disable_f(void) -{ - return 0x0; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_run_trigger_task_f(void) -{ - return 0x40000000; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_m(void) -{ - return 0x1 << 1; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) -{ - return (r >> 1) & 0x1; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f(void) -{ - return 0x0; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_m(void) -{ - return 0x1 << 2; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_disable_f(void) -{ - return 0x0; -} -static inline u32 gr_gpc0_tpc0_sm_warp_valid_mask_r(void) -{ - return 0x00504614; -} -static inline u32 gr_gpc0_tpc0_sm_warp_valid_mask_1_r(void) -{ - return 0x00504618; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_bpt_pause_mask_r(void) -{ - return 0x00504624; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_bpt_pause_mask_1_r(void) -{ - return 0x00504628; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_bpt_trap_mask_r(void) -{ - return 0x00504634; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_bpt_trap_mask_1_r(void) -{ - return 0x00504638; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_bpt_pause_mask_r(void) -{ - return 0x00419e24; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_bpt_pause_mask_stop_on_any_warp_disable_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_bpt_pause_mask_stop_on_any_sm_disable_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_status0_r(void) -{ - return 0x0050460c; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_status0_sm_in_trap_mode_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_status0_locked_down_v(u32 r) -{ - return (r >> 4) & 0x1; -} -static inline u32 gr_gpc0_tpc0_sm_dbgr_status0_locked_down_true_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_r(void) -{ - return 0x00419e50; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_bpt_int_pending_f(void) -{ - return 0x10; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_bpt_pause_pending_f(void) -{ - return 0x20; -} -static inline u32 gr_gpcs_tpcs_sm_hww_global_esr_single_step_complete_pending_f(void) -{ - return 0x40; -} -static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_r(void) -{ - return 0x00504650; -} -static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_bpt_int_pending_f(void) -{ - return 0x10; -} -static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_bpt_pause_pending_f(void) -{ - return 0x20; -} -static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_single_step_complete_pending_f(void) -{ - return 0x40; -} -static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_r(void) -{ - return 0x00504224; -} -static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_intr_pending_f(void) -{ - return 0x1; -} -static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_r(void) -{ - return 0x00504648; -} -static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_error_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_error_none_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_error_none_f(void) -{ - return 0x0; -} -static inline u32 gr_gpc0_tpc0_sm_halfctl_ctrl_r(void) -{ - return 0x00504770; -} -static inline u32 gr_gpcs_tpcs_sm_halfctl_ctrl_r(void) -{ - return 0x00419f70; -} -static inline u32 gr_gpcs_tpcs_sm_halfctl_ctrl_sctl_read_quad_ctl_m(void) -{ - return 0x1 << 4; -} -static inline u32 gr_gpcs_tpcs_sm_halfctl_ctrl_sctl_read_quad_ctl_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 gr_gpc0_tpc0_sm_debug_sfe_control_r(void) -{ - return 0x0050477c; -} -static inline u32 gr_gpcs_tpcs_sm_debug_sfe_control_r(void) -{ - return 0x00419f7c; -} -static inline u32 gr_gpcs_tpcs_sm_debug_sfe_control_read_half_ctl_m(void) -{ - return 0x1 << 0; -} -static inline u32 gr_gpcs_tpcs_sm_debug_sfe_control_read_half_ctl_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 gr_gpcs_tpcs_pes_vsc_vpc_r(void) -{ - return 0x0041be08; -} -static inline u32 gr_gpcs_tpcs_pes_vsc_vpc_fast_mode_switch_true_f(void) -{ - return 0x4; -} -static inline u32 gr_ppcs_wwdx_map_gpc_map0_r(void) -{ - return 0x0041bf00; -} -static inline u32 gr_ppcs_wwdx_map_gpc_map1_r(void) -{ - return 0x0041bf04; -} -static inline u32 gr_ppcs_wwdx_map_gpc_map2_r(void) -{ - return 0x0041bf08; -} -static inline u32 gr_ppcs_wwdx_map_gpc_map3_r(void) -{ - return 0x0041bf0c; -} -static inline u32 gr_ppcs_wwdx_map_gpc_map4_r(void) -{ - return 0x0041bf10; -} -static inline u32 gr_ppcs_wwdx_map_gpc_map5_r(void) -{ - return 0x0041bf14; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg_r(void) -{ - return 0x0041bfd0; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg_row_offset_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg_num_entries_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg_normalized_num_entries_f(u32 v) -{ - return (v & 0x1f) << 16; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg_normalized_shift_value_f(u32 v) -{ - return (v & 0x7) << 21; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg_coeff5_mod_value_f(u32 v) -{ - return (v & 0x1f) << 24; -} -static inline u32 gr_gpcs_ppcs_wwdx_sm_num_rcp_r(void) -{ - return 0x0041bfd4; -} -static inline u32 gr_gpcs_ppcs_wwdx_sm_num_rcp_conservative_f(u32 v) -{ - return (v & 0xffffff) << 0; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg2_r(void) -{ - return 0x0041bfe4; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg2_coeff6_mod_value_f(u32 v) -{ - return (v & 0x1f) << 0; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg2_coeff7_mod_value_f(u32 v) -{ - return (v & 0x1f) << 5; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg2_coeff8_mod_value_f(u32 v) -{ - return (v & 0x1f) << 10; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg2_coeff9_mod_value_f(u32 v) -{ - return (v & 0x1f) << 15; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg2_coeff10_mod_value_f(u32 v) -{ - return (v & 0x1f) << 20; -} -static inline u32 gr_ppcs_wwdx_map_table_cfg2_coeff11_mod_value_f(u32 v) -{ - return (v & 0x1f) << 25; -} -static inline u32 gr_bes_zrop_settings_r(void) -{ - return 0x00408850; -} -static inline u32 gr_bes_zrop_settings_num_active_ltcs_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 gr_be0_crop_debug3_r(void) -{ - return 0x00410108; -} -static inline u32 gr_bes_crop_debug3_r(void) -{ - return 0x00408908; -} -static inline u32 gr_bes_crop_debug3_comp_vdc_4to2_disable_m(void) -{ - return 0x1 << 31; -} -static inline u32 gr_bes_crop_settings_r(void) -{ - return 0x00408958; -} -static inline u32 gr_bes_crop_settings_num_active_ltcs_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 gr_zcull_bytes_per_aliquot_per_gpu_v(void) -{ - return 0x00000020; -} -static inline u32 gr_zcull_save_restore_header_bytes_per_gpc_v(void) -{ - return 0x00000020; -} -static inline u32 gr_zcull_save_restore_subregion_header_bytes_per_gpc_v(void) -{ - return 0x000000c0; -} -static inline u32 gr_zcull_subregion_qty_v(void) -{ - return 0x00000010; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control_sel0_r(void) -{ - return 0x00504604; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control_sel1_r(void) -{ - return 0x00504608; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control0_r(void) -{ - return 0x0050465c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control1_r(void) -{ - return 0x00504660; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control2_r(void) -{ - return 0x00504664; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control3_r(void) -{ - return 0x00504668; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control4_r(void) -{ - return 0x0050466c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control5_r(void) -{ - return 0x00504658; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter0_control_r(void) -{ - return 0x00504730; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter1_control_r(void) -{ - return 0x00504734; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter2_control_r(void) -{ - return 0x00504738; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter3_control_r(void) -{ - return 0x0050473c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter4_control_r(void) -{ - return 0x00504740; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter5_control_r(void) -{ - return 0x00504744; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter6_control_r(void) -{ - return 0x00504748; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter7_control_r(void) -{ - return 0x0050474c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_status_s1_r(void) -{ - return 0x00504678; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_status1_r(void) -{ - return 0x00504694; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter0_s0_r(void) -{ - return 0x005046f0; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter0_s1_r(void) -{ - return 0x00504700; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter1_s0_r(void) -{ - return 0x005046f4; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter1_s1_r(void) -{ - return 0x00504704; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter2_s0_r(void) -{ - return 0x005046f8; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter2_s1_r(void) -{ - return 0x00504708; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter3_s0_r(void) -{ - return 0x005046fc; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter3_s1_r(void) -{ - return 0x0050470c; -} -static inline u32 gr_fe_pwr_mode_r(void) -{ - return 0x00404170; -} -static inline u32 gr_fe_pwr_mode_mode_auto_f(void) -{ - return 0x0; -} -static inline u32 gr_fe_pwr_mode_mode_force_on_f(void) -{ - return 0x2; -} -static inline u32 gr_fe_pwr_mode_req_v(u32 r) -{ - return (r >> 4) & 0x1; -} -static inline u32 gr_fe_pwr_mode_req_send_f(void) -{ - return 0x10; -} -static inline u32 gr_fe_pwr_mode_req_done_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_r(void) -{ - return 0x00418880; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_vm_pg_size_m(void) -{ - return 0x1 << 0; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_use_pdb_big_page_size_m(void) -{ - return 0x1 << 11; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_use_full_comp_tag_line_m(void) -{ - return 0x1 << 12; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_vol_fault_m(void) -{ - return 0x1 << 1; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_comp_fault_m(void) -{ - return 0x1 << 2; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_miss_gran_m(void) -{ - return 0x3 << 3; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_cache_mode_m(void) -{ - return 0x3 << 5; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_mmu_aperture_m(void) -{ - return 0x3 << 28; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_mmu_vol_m(void) -{ - return 0x1 << 30; -} -static inline u32 gr_gpcs_pri_mmu_ctrl_mmu_disable_m(void) -{ - return 0x1 << 31; -} -static inline u32 gr_gpcs_pri_mmu_pm_unit_mask_r(void) -{ - return 0x00418890; -} -static inline u32 gr_gpcs_pri_mmu_pm_req_mask_r(void) -{ - return 0x00418894; -} -static inline u32 gr_gpcs_pri_mmu_debug_ctrl_r(void) -{ - return 0x004188b0; -} -static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_m(void) -{ - return 0x1 << 16; -} -static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_v(u32 r) -{ - return (r >> 16) & 0x1; -} -static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_f(void) -{ - return 0x10000; -} -static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_disabled_v(void) -{ - return 0x00000000; -} -static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_disabled_f(void) -{ - return 0x0; -} -static inline u32 gr_gpcs_pri_mmu_debug_wr_r(void) -{ - return 0x004188b4; -} -static inline u32 gr_gpcs_pri_mmu_debug_rd_r(void) -{ - return 0x004188b8; -} -static inline u32 gr_gpcs_mmu_num_active_ltcs_r(void) -{ - return 0x004188ac; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_r(void) -{ - return 0x00419e10; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_debugger_mode_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_debugger_mode_on_v(void) -{ - return 0x00000001; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_stop_trigger_m(void) -{ - return 0x1 << 31; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_stop_trigger_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_stop_trigger_enable_f(void) -{ - return 0x80000000; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_stop_trigger_disable_f(void) -{ - return 0x0; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_run_trigger_m(void) -{ - return 0x1 << 30; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_run_trigger_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_run_trigger_task_f(void) -{ - return 0x40000000; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ltc_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ltc_gm206.h deleted file mode 100644 index 66afd80b..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ltc_gm206.h +++ /dev/null @@ -1,497 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_ltc_gm206_h_ -#define _hw_ltc_gm206_h_ - -static inline u32 ltc_ltcs_lts0_cbc_ctrl1_r(void) -{ - return 0x0014046c; -} -static inline u32 ltc_ltc0_lts0_dstg_cfg0_r(void) -{ - return 0x00140518; -} -static inline u32 ltc_ltcs_ltss_dstg_cfg0_r(void) -{ - return 0x0017e318; -} -static inline u32 ltc_ltcs_ltss_dstg_cfg0_vdc_4to2_disable_m(void) -{ - return 0x1 << 15; -} -static inline u32 ltc_ltc0_lts0_tstg_cfg1_r(void) -{ - return 0x00140494; -} -static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_ways_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_v(u32 r) -{ - return (r >> 16) & 0x3; -} -static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_all_v(void) -{ - return 0x00000000; -} -static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_half_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_quarter_v(void) -{ - return 0x00000002; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl1_r(void) -{ - return 0x0017e26c; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clean_active_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl1_invalidate_active_f(void) -{ - return 0x2; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_active_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_active_f(void) -{ - return 0x4; -} -static inline u32 ltc_ltc0_lts0_cbc_ctrl1_r(void) -{ - return 0x0014046c; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl2_r(void) -{ - return 0x0017e270; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl2_clear_lower_bound_f(u32 v) -{ - return (v & 0x1ffff) << 0; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl3_r(void) -{ - return 0x0017e274; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_f(u32 v) -{ - return (v & 0x1ffff) << 0; -} -static inline u32 ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_init_v(void) -{ - return 0x0001ffff; -} -static inline u32 ltc_ltcs_ltss_cbc_base_r(void) -{ - return 0x0017e278; -} -static inline u32 ltc_ltcs_ltss_cbc_base_alignment_shift_v(void) -{ - return 0x0000000b; -} -static inline u32 ltc_ltcs_ltss_cbc_base_address_v(u32 r) -{ - return (r >> 0) & 0x3ffffff; -} -static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_r(void) -{ - return 0x0017e27c; -} -static inline u32 ltc_ltcs_misc_ltc_num_active_ltcs_r(void) -{ - return 0x0017e000; -} -static inline u32 ltc_ltcs_ltss_cbc_param_r(void) -{ - return 0x0017e280; -} -static inline u32 ltc_ltcs_ltss_cbc_param_comptags_per_cache_line_v(u32 r) -{ - return (r >> 0) & 0xffff; -} -static inline u32 ltc_ltcs_ltss_cbc_param_cache_line_size_v(u32 r) -{ - return (r >> 24) & 0xf; -} -static inline u32 ltc_ltcs_ltss_cbc_param_slices_per_ltc_v(u32 r) -{ - return (r >> 28) & 0xf; -} -static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_r(void) -{ - return 0x0017e2ac; -} -static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_max_ways_evict_last_f(u32 v) -{ - return (v & 0x1f) << 16; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_index_r(void) -{ - return 0x0017e338; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_index_address_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_color_clear_value_r(u32 i) -{ - return 0x0017e33c + i*4; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_color_clear_value__size_1_v(void) -{ - return 0x00000004; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_r(void) -{ - return 0x0017e34c; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_s(void) -{ - return 32; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_m(void) -{ - return 0xffffffff << 0; -} -static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_v(u32 r) -{ - return (r >> 0) & 0xffffffff; -} -static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_r(void) -{ - return 0x0017e2b0; -} -static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(void) -{ - return 0x10000000; -} -static inline u32 ltc_ltcs_ltss_g_elpg_r(void) -{ - return 0x0017e214; -} -static inline u32 ltc_ltcs_ltss_g_elpg_flush_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltc0_ltss_g_elpg_r(void) -{ - return 0x00140214; -} -static inline u32 ltc_ltc0_ltss_g_elpg_flush_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltc1_ltss_g_elpg_r(void) -{ - return 0x00142214; -} -static inline u32 ltc_ltc1_ltss_g_elpg_flush_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltc1_ltss_g_elpg_flush_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltc1_ltss_g_elpg_flush_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltcs_ltss_intr_r(void) -{ - return 0x0017e20c; -} -static inline u32 ltc_ltcs_ltss_intr_en_evicted_cb_m(void) -{ - return 0x1 << 20; -} -static inline u32 ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(void) -{ - return 0x1 << 30; -} -static inline u32 ltc_ltc0_lts0_intr_r(void) -{ - return 0x0014040c; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_r(void) -{ - return 0x0017e2a0; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_v(u32 r) -{ - return (r >> 8) & 0xf; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_3_v(void) -{ - return 0x00000003; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_3_f(void) -{ - return 0x300; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_v(u32 r) -{ - return (r >> 28) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_true_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_true_f(void) -{ - return 0x10000000; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_v(u32 r) -{ - return (r >> 29) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_true_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_true_f(void) -{ - return 0x20000000; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_true_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_true_f(void) -{ - return 0x40000000; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_r(void) -{ - return 0x0017e2a4; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_v(u32 r) -{ - return (r >> 8) & 0xf; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_3_v(void) -{ - return 0x00000003; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_3_f(void) -{ - return 0x300; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_v(u32 r) -{ - return (r >> 16) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_true_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_true_f(void) -{ - return 0x10000; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_v(u32 r) -{ - return (r >> 28) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_true_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_true_f(void) -{ - return 0x10000000; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_v(u32 r) -{ - return (r >> 29) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_true_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_true_f(void) -{ - return 0x20000000; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_true_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_true_f(void) -{ - return 0x40000000; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_r(void) -{ - return 0x001402a0; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_r(void) -{ - return 0x001402a4; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_r(void) -{ - return 0x001422a0; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_pending_f(void) -{ - return 0x1; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_r(void) -{ - return 0x001422a4; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_pending_v(void) -{ - return 0x00000001; -} -static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_pending_f(void) -{ - return 0x1; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_mc_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_mc_gm206.h deleted file mode 100644 index afbf556f..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_mc_gm206.h +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_mc_gm206_h_ -#define _hw_mc_gm206_h_ - -static inline u32 mc_boot_0_r(void) -{ - return 0x00000000; -} -static inline u32 mc_boot_0_architecture_v(u32 r) -{ - return (r >> 24) & 0x1f; -} -static inline u32 mc_boot_0_implementation_v(u32 r) -{ - return (r >> 20) & 0xf; -} -static inline u32 mc_boot_0_major_revision_v(u32 r) -{ - return (r >> 4) & 0xf; -} -static inline u32 mc_boot_0_minor_revision_v(u32 r) -{ - return (r >> 0) & 0xf; -} -static inline u32 mc_intr_r(u32 i) -{ - return 0x00000100 + i*4; -} -static inline u32 mc_intr_pfifo_pending_f(void) -{ - return 0x100; -} -static inline u32 mc_intr_pmu_pending_f(void) -{ - return 0x1000000; -} -static inline u32 mc_intr_ltc_pending_f(void) -{ - return 0x2000000; -} -static inline u32 mc_intr_priv_ring_pending_f(void) -{ - return 0x40000000; -} -static inline u32 mc_intr_pbus_pending_f(void) -{ - return 0x10000000; -} -static inline u32 mc_intr_mask_0_r(void) -{ - return 0x00000640; -} -static inline u32 mc_intr_mask_0_pmu_enabled_f(void) -{ - return 0x1000000; -} -static inline u32 mc_intr_en_0_r(void) -{ - return 0x00000140; -} -static inline u32 mc_intr_en_0_inta_disabled_f(void) -{ - return 0x0; -} -static inline u32 mc_intr_en_0_inta_hardware_f(void) -{ - return 0x1; -} -static inline u32 mc_intr_mask_1_r(void) -{ - return 0x00000644; -} -static inline u32 mc_intr_mask_1_pmu_s(void) -{ - return 1; -} -static inline u32 mc_intr_mask_1_pmu_f(u32 v) -{ - return (v & 0x1) << 24; -} -static inline u32 mc_intr_mask_1_pmu_m(void) -{ - return 0x1 << 24; -} -static inline u32 mc_intr_mask_1_pmu_v(u32 r) -{ - return (r >> 24) & 0x1; -} -static inline u32 mc_intr_mask_1_pmu_enabled_f(void) -{ - return 0x1000000; -} -static inline u32 mc_intr_en_1_r(void) -{ - return 0x00000144; -} -static inline u32 mc_intr_en_1_inta_disabled_f(void) -{ - return 0x0; -} -static inline u32 mc_intr_en_1_inta_hardware_f(void) -{ - return 0x1; -} -static inline u32 mc_enable_r(void) -{ - return 0x00000200; -} -static inline u32 mc_enable_xbar_enabled_f(void) -{ - return 0x4; -} -static inline u32 mc_enable_l2_enabled_f(void) -{ - return 0x8; -} -static inline u32 mc_enable_pmedia_s(void) -{ - return 1; -} -static inline u32 mc_enable_pmedia_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 mc_enable_pmedia_m(void) -{ - return 0x1 << 4; -} -static inline u32 mc_enable_pmedia_v(u32 r) -{ - return (r >> 4) & 0x1; -} -static inline u32 mc_enable_priv_ring_enabled_f(void) -{ - return 0x20; -} -static inline u32 mc_enable_ce0_m(void) -{ - return 0x1 << 6; -} -static inline u32 mc_enable_pfifo_enabled_f(void) -{ - return 0x100; -} -static inline u32 mc_enable_pgraph_enabled_f(void) -{ - return 0x1000; -} -static inline u32 mc_enable_pwr_v(u32 r) -{ - return (r >> 13) & 0x1; -} -static inline u32 mc_enable_pwr_disabled_v(void) -{ - return 0x00000000; -} -static inline u32 mc_enable_pwr_enabled_f(void) -{ - return 0x2000; -} -static inline u32 mc_enable_pfb_enabled_f(void) -{ - return 0x100000; -} -static inline u32 mc_enable_ce2_m(void) -{ - return 0x1 << 21; -} -static inline u32 mc_enable_ce2_enabled_f(void) -{ - return 0x200000; -} -static inline u32 mc_enable_blg_enabled_f(void) -{ - return 0x8000000; -} -static inline u32 mc_enable_perfmon_enabled_f(void) -{ - return 0x10000000; -} -static inline u32 mc_enable_hub_enabled_f(void) -{ - return 0x20000000; -} -static inline u32 mc_intr_ltc_r(void) -{ - return 0x0000017c; -} -static inline u32 mc_enable_pb_r(void) -{ - return 0x00000204; -} -static inline u32 mc_enable_pb_0_s(void) -{ - return 1; -} -static inline u32 mc_enable_pb_0_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 mc_enable_pb_0_m(void) -{ - return 0x1 << 0; -} -static inline u32 mc_enable_pb_0_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 mc_enable_pb_0_enabled_v(void) -{ - return 0x00000001; -} -static inline u32 mc_enable_pb_sel_f(u32 v, u32 i) -{ - return (v & 0x1) << (0 + i*1); -} -static inline u32 mc_elpg_enable_r(void) -{ - return 0x0000020c; -} -static inline u32 mc_elpg_enable_xbar_enabled_f(void) -{ - return 0x4; -} -static inline u32 mc_elpg_enable_pfb_enabled_f(void) -{ - return 0x100000; -} -static inline u32 mc_elpg_enable_hub_enabled_f(void) -{ - return 0x20000000; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pbdma_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pbdma_gm206.h deleted file mode 100644 index ea8dad45..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pbdma_gm206.h +++ /dev/null @@ -1,505 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_pbdma_gm206_h_ -#define _hw_pbdma_gm206_h_ - -static inline u32 pbdma_gp_entry1_r(void) -{ - return 0x10000004; -} -static inline u32 pbdma_gp_entry1_get_hi_v(u32 r) -{ - return (r >> 0) & 0xff; -} -static inline u32 pbdma_gp_entry1_length_f(u32 v) -{ - return (v & 0x1fffff) << 10; -} -static inline u32 pbdma_gp_entry1_length_v(u32 r) -{ - return (r >> 10) & 0x1fffff; -} -static inline u32 pbdma_gp_base_r(u32 i) -{ - return 0x00040048 + i*8192; -} -static inline u32 pbdma_gp_base__size_1_v(void) -{ - return 0x00000003; -} -static inline u32 pbdma_gp_base_offset_f(u32 v) -{ - return (v & 0x1fffffff) << 3; -} -static inline u32 pbdma_gp_base_rsvd_s(void) -{ - return 3; -} -static inline u32 pbdma_gp_base_hi_r(u32 i) -{ - return 0x0004004c + i*8192; -} -static inline u32 pbdma_gp_base_hi_offset_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 pbdma_gp_base_hi_limit2_f(u32 v) -{ - return (v & 0x1f) << 16; -} -static inline u32 pbdma_gp_fetch_r(u32 i) -{ - return 0x00040050 + i*8192; -} -static inline u32 pbdma_gp_get_r(u32 i) -{ - return 0x00040014 + i*8192; -} -static inline u32 pbdma_gp_put_r(u32 i) -{ - return 0x00040000 + i*8192; -} -static inline u32 pbdma_pb_fetch_r(u32 i) -{ - return 0x00040054 + i*8192; -} -static inline u32 pbdma_pb_fetch_hi_r(u32 i) -{ - return 0x00040058 + i*8192; -} -static inline u32 pbdma_get_r(u32 i) -{ - return 0x00040018 + i*8192; -} -static inline u32 pbdma_get_hi_r(u32 i) -{ - return 0x0004001c + i*8192; -} -static inline u32 pbdma_put_r(u32 i) -{ - return 0x0004005c + i*8192; -} -static inline u32 pbdma_put_hi_r(u32 i) -{ - return 0x00040060 + i*8192; -} -static inline u32 pbdma_formats_r(u32 i) -{ - return 0x0004009c + i*8192; -} -static inline u32 pbdma_formats_gp_fermi0_f(void) -{ - return 0x0; -} -static inline u32 pbdma_formats_pb_fermi1_f(void) -{ - return 0x100; -} -static inline u32 pbdma_formats_mp_fermi0_f(void) -{ - return 0x0; -} -static inline u32 pbdma_pb_header_r(u32 i) -{ - return 0x00040084 + i*8192; -} -static inline u32 pbdma_pb_header_priv_user_f(void) -{ - return 0x0; -} -static inline u32 pbdma_pb_header_method_zero_f(void) -{ - return 0x0; -} -static inline u32 pbdma_pb_header_subchannel_zero_f(void) -{ - return 0x0; -} -static inline u32 pbdma_pb_header_level_main_f(void) -{ - return 0x0; -} -static inline u32 pbdma_pb_header_first_true_f(void) -{ - return 0x400000; -} -static inline u32 pbdma_pb_header_type_inc_f(void) -{ - return 0x20000000; -} -static inline u32 pbdma_pb_header_type_non_inc_f(void) -{ - return 0x60000000; -} -static inline u32 pbdma_hdr_shadow_r(u32 i) -{ - return 0x00040118 + i*8192; -} -static inline u32 pbdma_subdevice_r(u32 i) -{ - return 0x00040094 + i*8192; -} -static inline u32 pbdma_subdevice_id_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 pbdma_subdevice_status_active_f(void) -{ - return 0x10000000; -} -static inline u32 pbdma_subdevice_channel_dma_enable_f(void) -{ - return 0x20000000; -} -static inline u32 pbdma_method0_r(u32 i) -{ - return 0x000400c0 + i*8192; -} -static inline u32 pbdma_method0_fifo_size_v(void) -{ - return 0x00000004; -} -static inline u32 pbdma_method0_addr_f(u32 v) -{ - return (v & 0xfff) << 2; -} -static inline u32 pbdma_method0_addr_v(u32 r) -{ - return (r >> 2) & 0xfff; -} -static inline u32 pbdma_method0_subch_v(u32 r) -{ - return (r >> 16) & 0x7; -} -static inline u32 pbdma_method0_first_true_f(void) -{ - return 0x400000; -} -static inline u32 pbdma_method0_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 pbdma_method1_r(u32 i) -{ - return 0x000400c8 + i*8192; -} -static inline u32 pbdma_method2_r(u32 i) -{ - return 0x000400d0 + i*8192; -} -static inline u32 pbdma_method3_r(u32 i) -{ - return 0x000400d8 + i*8192; -} -static inline u32 pbdma_data0_r(u32 i) -{ - return 0x000400c4 + i*8192; -} -static inline u32 pbdma_target_r(u32 i) -{ - return 0x000400ac + i*8192; -} -static inline u32 pbdma_target_engine_sw_f(void) -{ - return 0x1f; -} -static inline u32 pbdma_acquire_r(u32 i) -{ - return 0x00040030 + i*8192; -} -static inline u32 pbdma_acquire_retry_man_2_f(void) -{ - return 0x2; -} -static inline u32 pbdma_acquire_retry_exp_2_f(void) -{ - return 0x100; -} -static inline u32 pbdma_acquire_timeout_exp_max_f(void) -{ - return 0x7800; -} -static inline u32 pbdma_acquire_timeout_man_max_f(void) -{ - return 0x7fff8000; -} -static inline u32 pbdma_acquire_timeout_en_disable_f(void) -{ - return 0x0; -} -static inline u32 pbdma_status_r(u32 i) -{ - return 0x00040100 + i*8192; -} -static inline u32 pbdma_channel_r(u32 i) -{ - return 0x00040120 + i*8192; -} -static inline u32 pbdma_signature_r(u32 i) -{ - return 0x00040010 + i*8192; -} -static inline u32 pbdma_signature_hw_valid_f(void) -{ - return 0xface; -} -static inline u32 pbdma_signature_sw_zero_f(void) -{ - return 0x0; -} -static inline u32 pbdma_userd_r(u32 i) -{ - return 0x00040008 + i*8192; -} -static inline u32 pbdma_userd_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 pbdma_userd_target_sys_mem_coh_f(void) -{ - return 0x2; -} -static inline u32 pbdma_userd_target_sys_mem_ncoh_f(void) -{ - return 0x3; -} -static inline u32 pbdma_userd_addr_f(u32 v) -{ - return (v & 0x7fffff) << 9; -} -static inline u32 pbdma_userd_hi_r(u32 i) -{ - return 0x0004000c + i*8192; -} -static inline u32 pbdma_userd_hi_addr_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 pbdma_hce_ctrl_r(u32 i) -{ - return 0x000400e4 + i*8192; -} -static inline u32 pbdma_hce_ctrl_hce_priv_mode_yes_f(void) -{ - return 0x20; -} -static inline u32 pbdma_intr_0_r(u32 i) -{ - return 0x00040108 + i*8192; -} -static inline u32 pbdma_intr_0_memreq_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 pbdma_intr_0_memreq_pending_f(void) -{ - return 0x1; -} -static inline u32 pbdma_intr_0_memack_timeout_pending_f(void) -{ - return 0x2; -} -static inline u32 pbdma_intr_0_memack_extra_pending_f(void) -{ - return 0x4; -} -static inline u32 pbdma_intr_0_memdat_timeout_pending_f(void) -{ - return 0x8; -} -static inline u32 pbdma_intr_0_memdat_extra_pending_f(void) -{ - return 0x10; -} -static inline u32 pbdma_intr_0_memflush_pending_f(void) -{ - return 0x20; -} -static inline u32 pbdma_intr_0_memop_pending_f(void) -{ - return 0x40; -} -static inline u32 pbdma_intr_0_lbconnect_pending_f(void) -{ - return 0x80; -} -static inline u32 pbdma_intr_0_lbreq_pending_f(void) -{ - return 0x100; -} -static inline u32 pbdma_intr_0_lback_timeout_pending_f(void) -{ - return 0x200; -} -static inline u32 pbdma_intr_0_lback_extra_pending_f(void) -{ - return 0x400; -} -static inline u32 pbdma_intr_0_lbdat_timeout_pending_f(void) -{ - return 0x800; -} -static inline u32 pbdma_intr_0_lbdat_extra_pending_f(void) -{ - return 0x1000; -} -static inline u32 pbdma_intr_0_gpfifo_pending_f(void) -{ - return 0x2000; -} -static inline u32 pbdma_intr_0_gpptr_pending_f(void) -{ - return 0x4000; -} -static inline u32 pbdma_intr_0_gpentry_pending_f(void) -{ - return 0x8000; -} -static inline u32 pbdma_intr_0_gpcrc_pending_f(void) -{ - return 0x10000; -} -static inline u32 pbdma_intr_0_pbptr_pending_f(void) -{ - return 0x20000; -} -static inline u32 pbdma_intr_0_pbentry_pending_f(void) -{ - return 0x40000; -} -static inline u32 pbdma_intr_0_pbcrc_pending_f(void) -{ - return 0x80000; -} -static inline u32 pbdma_intr_0_xbarconnect_pending_f(void) -{ - return 0x100000; -} -static inline u32 pbdma_intr_0_method_pending_f(void) -{ - return 0x200000; -} -static inline u32 pbdma_intr_0_methodcrc_pending_f(void) -{ - return 0x400000; -} -static inline u32 pbdma_intr_0_device_pending_f(void) -{ - return 0x800000; -} -static inline u32 pbdma_intr_0_semaphore_pending_f(void) -{ - return 0x2000000; -} -static inline u32 pbdma_intr_0_acquire_pending_f(void) -{ - return 0x4000000; -} -static inline u32 pbdma_intr_0_pri_pending_f(void) -{ - return 0x8000000; -} -static inline u32 pbdma_intr_0_no_ctxsw_seg_pending_f(void) -{ - return 0x20000000; -} -static inline u32 pbdma_intr_0_pbseg_pending_f(void) -{ - return 0x40000000; -} -static inline u32 pbdma_intr_0_signature_pending_f(void) -{ - return 0x80000000; -} -static inline u32 pbdma_intr_1_r(u32 i) -{ - return 0x00040148 + i*8192; -} -static inline u32 pbdma_intr_en_0_r(u32 i) -{ - return 0x0004010c + i*8192; -} -static inline u32 pbdma_intr_en_0_lbreq_enabled_f(void) -{ - return 0x100; -} -static inline u32 pbdma_intr_en_1_r(u32 i) -{ - return 0x0004014c + i*8192; -} -static inline u32 pbdma_intr_stall_r(u32 i) -{ - return 0x0004013c + i*8192; -} -static inline u32 pbdma_intr_stall_lbreq_enabled_f(void) -{ - return 0x100; -} -static inline u32 pbdma_udma_nop_r(void) -{ - return 0x00000008; -} -static inline u32 pbdma_runlist_timeslice_r(u32 i) -{ - return 0x000400f8 + i*8192; -} -static inline u32 pbdma_runlist_timeslice_timeout_128_f(void) -{ - return 0x80; -} -static inline u32 pbdma_runlist_timeslice_timescale_3_f(void) -{ - return 0x3000; -} -static inline u32 pbdma_runlist_timeslice_enable_true_f(void) -{ - return 0x10000000; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_perf_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_perf_gm206.h deleted file mode 100644 index 5ac573c7..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_perf_gm206.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_perf_gm206_h_ -#define _hw_perf_gm206_h_ - -static inline u32 perf_pmasys_control_r(void) -{ - return 0x001b4000; -} -static inline u32 perf_pmasys_control_membuf_status_v(u32 r) -{ - return (r >> 4) & 0x1; -} -static inline u32 perf_pmasys_control_membuf_status_overflowed_v(void) -{ - return 0x00000001; -} -static inline u32 perf_pmasys_control_membuf_status_overflowed_f(void) -{ - return 0x10; -} -static inline u32 perf_pmasys_control_membuf_clear_status_f(u32 v) -{ - return (v & 0x1) << 5; -} -static inline u32 perf_pmasys_control_membuf_clear_status_v(u32 r) -{ - return (r >> 5) & 0x1; -} -static inline u32 perf_pmasys_control_membuf_clear_status_doit_v(void) -{ - return 0x00000001; -} -static inline u32 perf_pmasys_control_membuf_clear_status_doit_f(void) -{ - return 0x20; -} -static inline u32 perf_pmasys_mem_block_r(void) -{ - return 0x001b4070; -} -static inline u32 perf_pmasys_mem_block_base_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 perf_pmasys_mem_block_target_f(u32 v) -{ - return (v & 0x3) << 28; -} -static inline u32 perf_pmasys_mem_block_target_v(u32 r) -{ - return (r >> 28) & 0x3; -} -static inline u32 perf_pmasys_mem_block_target_lfb_v(void) -{ - return 0x00000000; -} -static inline u32 perf_pmasys_mem_block_target_lfb_f(void) -{ - return 0x0; -} -static inline u32 perf_pmasys_mem_block_target_sys_coh_v(void) -{ - return 0x00000002; -} -static inline u32 perf_pmasys_mem_block_target_sys_coh_f(void) -{ - return 0x20000000; -} -static inline u32 perf_pmasys_mem_block_target_sys_ncoh_v(void) -{ - return 0x00000003; -} -static inline u32 perf_pmasys_mem_block_target_sys_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 perf_pmasys_mem_block_valid_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 perf_pmasys_mem_block_valid_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 perf_pmasys_mem_block_valid_true_v(void) -{ - return 0x00000001; -} -static inline u32 perf_pmasys_mem_block_valid_true_f(void) -{ - return 0x80000000; -} -static inline u32 perf_pmasys_mem_block_valid_false_v(void) -{ - return 0x00000000; -} -static inline u32 perf_pmasys_mem_block_valid_false_f(void) -{ - return 0x0; -} -static inline u32 perf_pmasys_outbase_r(void) -{ - return 0x001b4074; -} -static inline u32 perf_pmasys_outbase_ptr_f(u32 v) -{ - return (v & 0x7ffffff) << 5; -} -static inline u32 perf_pmasys_outbaseupper_r(void) -{ - return 0x001b4078; -} -static inline u32 perf_pmasys_outbaseupper_ptr_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 perf_pmasys_outsize_r(void) -{ - return 0x001b407c; -} -static inline u32 perf_pmasys_outsize_numbytes_f(u32 v) -{ - return (v & 0x7ffffff) << 5; -} -static inline u32 perf_pmasys_mem_bytes_r(void) -{ - return 0x001b4084; -} -static inline u32 perf_pmasys_mem_bytes_numbytes_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 perf_pmasys_mem_bump_r(void) -{ - return 0x001b4088; -} -static inline u32 perf_pmasys_mem_bump_numbytes_f(u32 v) -{ - return (v & 0xfffffff) << 4; -} -static inline u32 perf_pmasys_enginestatus_r(void) -{ - return 0x001b40a4; -} -static inline u32 perf_pmasys_enginestatus_rbufempty_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 perf_pmasys_enginestatus_rbufempty_empty_v(void) -{ - return 0x00000001; -} -static inline u32 perf_pmasys_enginestatus_rbufempty_empty_f(void) -{ - return 0x10; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringmaster_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringmaster_gm206.h deleted file mode 100644 index 6dcd9434..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringmaster_gm206.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_pri_ringmaster_gm206_h_ -#define _hw_pri_ringmaster_gm206_h_ - -static inline u32 pri_ringmaster_command_r(void) -{ - return 0x0012004c; -} -static inline u32 pri_ringmaster_command_cmd_m(void) -{ - return 0x3f << 0; -} -static inline u32 pri_ringmaster_command_cmd_v(u32 r) -{ - return (r >> 0) & 0x3f; -} -static inline u32 pri_ringmaster_command_cmd_no_cmd_v(void) -{ - return 0x00000000; -} -static inline u32 pri_ringmaster_command_cmd_start_ring_f(void) -{ - return 0x1; -} -static inline u32 pri_ringmaster_command_cmd_ack_interrupt_f(void) -{ - return 0x2; -} -static inline u32 pri_ringmaster_command_cmd_enumerate_stations_f(void) -{ - return 0x3; -} -static inline u32 pri_ringmaster_command_cmd_enumerate_stations_bc_grp_all_f(void) -{ - return 0x0; -} -static inline u32 pri_ringmaster_command_data_r(void) -{ - return 0x00120048; -} -static inline u32 pri_ringmaster_start_results_r(void) -{ - return 0x00120050; -} -static inline u32 pri_ringmaster_start_results_connectivity_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 pri_ringmaster_start_results_connectivity_pass_v(void) -{ - return 0x00000001; -} -static inline u32 pri_ringmaster_intr_status0_r(void) -{ - return 0x00120058; -} -static inline u32 pri_ringmaster_intr_status1_r(void) -{ - return 0x0012005c; -} -static inline u32 pri_ringmaster_global_ctl_r(void) -{ - return 0x00120060; -} -static inline u32 pri_ringmaster_global_ctl_ring_reset_asserted_f(void) -{ - return 0x1; -} -static inline u32 pri_ringmaster_global_ctl_ring_reset_deasserted_f(void) -{ - return 0x0; -} -static inline u32 pri_ringmaster_enum_fbp_r(void) -{ - return 0x00120074; -} -static inline u32 pri_ringmaster_enum_fbp_count_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 pri_ringmaster_enum_gpc_r(void) -{ - return 0x00120078; -} -static inline u32 pri_ringmaster_enum_gpc_count_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 pri_ringmaster_enum_ltc_r(void) -{ - return 0x0012006c; -} -static inline u32 pri_ringmaster_enum_ltc_count_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringstation_sys_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringstation_sys_gm206.h deleted file mode 100644 index 94efe04f..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pri_ringstation_sys_gm206.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_pri_ringstation_sys_gm206_h_ -#define _hw_pri_ringstation_sys_gm206_h_ - -static inline u32 pri_ringstation_sys_master_config_r(u32 i) -{ - return 0x00122300 + i*4; -} -static inline u32 pri_ringstation_sys_decode_config_r(void) -{ - return 0x00122204; -} -static inline u32 pri_ringstation_sys_decode_config_ring_m(void) -{ - return 0x7 << 0; -} -static inline u32 pri_ringstation_sys_decode_config_ring_drop_on_ring_not_started_f(void) -{ - return 0x1; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_proj_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_proj_gm206.h deleted file mode 100644 index bdca905f..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_proj_gm206.h +++ /dev/null @@ -1,165 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_proj_gm206_h_ -#define _hw_proj_gm206_h_ - -static inline u32 proj_gpc_base_v(void) -{ - return 0x00500000; -} -static inline u32 proj_gpc_shared_base_v(void) -{ - return 0x00418000; -} -static inline u32 proj_gpc_stride_v(void) -{ - return 0x00008000; -} -static inline u32 proj_ltc_stride_v(void) -{ - return 0x00002000; -} -static inline u32 proj_lts_stride_v(void) -{ - return 0x00000200; -} -static inline u32 proj_fbpa_base_v(void) -{ - return 0x00110000; -} -static inline u32 proj_fbpa_shared_base_v(void) -{ - return 0x0010f000; -} -static inline u32 proj_fbpa_stride_v(void) -{ - return 0x00001000; -} -static inline u32 proj_ppc_in_gpc_base_v(void) -{ - return 0x00003000; -} -static inline u32 proj_ppc_in_gpc_shared_base_v(void) -{ - return 0x00003e00; -} -static inline u32 proj_ppc_in_gpc_stride_v(void) -{ - return 0x00000200; -} -static inline u32 proj_rop_base_v(void) -{ - return 0x00410000; -} -static inline u32 proj_rop_shared_base_v(void) -{ - return 0x00408800; -} -static inline u32 proj_rop_stride_v(void) -{ - return 0x00000400; -} -static inline u32 proj_tpc_in_gpc_base_v(void) -{ - return 0x00004000; -} -static inline u32 proj_tpc_in_gpc_stride_v(void) -{ - return 0x00000800; -} -static inline u32 proj_tpc_in_gpc_shared_base_v(void) -{ - return 0x00001800; -} -static inline u32 proj_host_num_engines_v(void) -{ - return 0x00000008; -} -static inline u32 proj_host_num_pbdma_v(void) -{ - return 0x00000003; -} -static inline u32 proj_scal_litter_num_tpc_per_gpc_v(void) -{ - return 0x00000004; -} -static inline u32 proj_scal_litter_num_fbps_v(void) -{ - return 0x00000006; -} -static inline u32 proj_scal_litter_num_fbpas_v(void) -{ - return 0x00000006; -} -static inline u32 proj_scal_litter_num_gpcs_v(void) -{ - return 0x00000006; -} -static inline u32 proj_scal_litter_num_pes_per_gpc_v(void) -{ - return 0x00000002; -} -static inline u32 proj_scal_litter_num_tpcs_per_pes_v(void) -{ - return 0x00000002; -} -static inline u32 proj_scal_litter_num_zcull_banks_v(void) -{ - return 0x00000004; -} -static inline u32 proj_scal_max_gpcs_v(void) -{ - return 0x00000020; -} -static inline u32 proj_scal_max_tpc_per_gpc_v(void) -{ - return 0x00000008; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pwr_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pwr_gm206.h deleted file mode 100644 index 8e755fcf..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_pwr_gm206.h +++ /dev/null @@ -1,825 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_pwr_gm206_h_ -#define _hw_pwr_gm206_h_ - -static inline u32 pwr_falcon_irqsset_r(void) -{ - return 0x0010a000; -} -static inline u32 pwr_falcon_irqsset_swgen0_set_f(void) -{ - return 0x40; -} -static inline u32 pwr_falcon_irqsclr_r(void) -{ - return 0x0010a004; -} -static inline u32 pwr_falcon_irqstat_r(void) -{ - return 0x0010a008; -} -static inline u32 pwr_falcon_irqstat_halt_true_f(void) -{ - return 0x10; -} -static inline u32 pwr_falcon_irqstat_exterr_true_f(void) -{ - return 0x20; -} -static inline u32 pwr_falcon_irqstat_swgen0_true_f(void) -{ - return 0x40; -} -static inline u32 pwr_falcon_irqmode_r(void) -{ - return 0x0010a00c; -} -static inline u32 pwr_falcon_irqmset_r(void) -{ - return 0x0010a010; -} -static inline u32 pwr_falcon_irqmset_gptmr_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 pwr_falcon_irqmset_wdtmr_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 pwr_falcon_irqmset_mthd_f(u32 v) -{ - return (v & 0x1) << 2; -} -static inline u32 pwr_falcon_irqmset_ctxsw_f(u32 v) -{ - return (v & 0x1) << 3; -} -static inline u32 pwr_falcon_irqmset_halt_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 pwr_falcon_irqmset_exterr_f(u32 v) -{ - return (v & 0x1) << 5; -} -static inline u32 pwr_falcon_irqmset_swgen0_f(u32 v) -{ - return (v & 0x1) << 6; -} -static inline u32 pwr_falcon_irqmset_swgen1_f(u32 v) -{ - return (v & 0x1) << 7; -} -static inline u32 pwr_falcon_irqmclr_r(void) -{ - return 0x0010a014; -} -static inline u32 pwr_falcon_irqmclr_gptmr_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 pwr_falcon_irqmclr_wdtmr_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 pwr_falcon_irqmclr_mthd_f(u32 v) -{ - return (v & 0x1) << 2; -} -static inline u32 pwr_falcon_irqmclr_ctxsw_f(u32 v) -{ - return (v & 0x1) << 3; -} -static inline u32 pwr_falcon_irqmclr_halt_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 pwr_falcon_irqmclr_exterr_f(u32 v) -{ - return (v & 0x1) << 5; -} -static inline u32 pwr_falcon_irqmclr_swgen0_f(u32 v) -{ - return (v & 0x1) << 6; -} -static inline u32 pwr_falcon_irqmclr_swgen1_f(u32 v) -{ - return (v & 0x1) << 7; -} -static inline u32 pwr_falcon_irqmclr_ext_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 pwr_falcon_irqmask_r(void) -{ - return 0x0010a018; -} -static inline u32 pwr_falcon_irqdest_r(void) -{ - return 0x0010a01c; -} -static inline u32 pwr_falcon_irqdest_host_gptmr_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 pwr_falcon_irqdest_host_wdtmr_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 pwr_falcon_irqdest_host_mthd_f(u32 v) -{ - return (v & 0x1) << 2; -} -static inline u32 pwr_falcon_irqdest_host_ctxsw_f(u32 v) -{ - return (v & 0x1) << 3; -} -static inline u32 pwr_falcon_irqdest_host_halt_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 pwr_falcon_irqdest_host_exterr_f(u32 v) -{ - return (v & 0x1) << 5; -} -static inline u32 pwr_falcon_irqdest_host_swgen0_f(u32 v) -{ - return (v & 0x1) << 6; -} -static inline u32 pwr_falcon_irqdest_host_swgen1_f(u32 v) -{ - return (v & 0x1) << 7; -} -static inline u32 pwr_falcon_irqdest_host_ext_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 pwr_falcon_irqdest_target_gptmr_f(u32 v) -{ - return (v & 0x1) << 16; -} -static inline u32 pwr_falcon_irqdest_target_wdtmr_f(u32 v) -{ - return (v & 0x1) << 17; -} -static inline u32 pwr_falcon_irqdest_target_mthd_f(u32 v) -{ - return (v & 0x1) << 18; -} -static inline u32 pwr_falcon_irqdest_target_ctxsw_f(u32 v) -{ - return (v & 0x1) << 19; -} -static inline u32 pwr_falcon_irqdest_target_halt_f(u32 v) -{ - return (v & 0x1) << 20; -} -static inline u32 pwr_falcon_irqdest_target_exterr_f(u32 v) -{ - return (v & 0x1) << 21; -} -static inline u32 pwr_falcon_irqdest_target_swgen0_f(u32 v) -{ - return (v & 0x1) << 22; -} -static inline u32 pwr_falcon_irqdest_target_swgen1_f(u32 v) -{ - return (v & 0x1) << 23; -} -static inline u32 pwr_falcon_irqdest_target_ext_f(u32 v) -{ - return (v & 0xff) << 24; -} -static inline u32 pwr_falcon_curctx_r(void) -{ - return 0x0010a050; -} -static inline u32 pwr_falcon_nxtctx_r(void) -{ - return 0x0010a054; -} -static inline u32 pwr_falcon_mailbox0_r(void) -{ - return 0x0010a040; -} -static inline u32 pwr_falcon_mailbox1_r(void) -{ - return 0x0010a044; -} -static inline u32 pwr_falcon_itfen_r(void) -{ - return 0x0010a048; -} -static inline u32 pwr_falcon_itfen_ctxen_enable_f(void) -{ - return 0x1; -} -static inline u32 pwr_falcon_idlestate_r(void) -{ - return 0x0010a04c; -} -static inline u32 pwr_falcon_idlestate_falcon_busy_v(u32 r) -{ - return (r >> 0) & 0x1; -} -static inline u32 pwr_falcon_idlestate_ext_busy_v(u32 r) -{ - return (r >> 1) & 0x7fff; -} -static inline u32 pwr_falcon_os_r(void) -{ - return 0x0010a080; -} -static inline u32 pwr_falcon_engctl_r(void) -{ - return 0x0010a0a4; -} -static inline u32 pwr_falcon_cpuctl_r(void) -{ - return 0x0010a100; -} -static inline u32 pwr_falcon_cpuctl_startcpu_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 pwr_falcon_cpuctl_halt_intr_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 pwr_falcon_cpuctl_halt_intr_m(void) -{ - return 0x1 << 4; -} -static inline u32 pwr_falcon_cpuctl_halt_intr_v(u32 r) -{ - return (r >> 4) & 0x1; -} -static inline u32 pwr_falcon_cpuctl_cpuctl_alias_en_f(u32 v) -{ - return (v & 0x1) << 6; -} -static inline u32 pwr_falcon_cpuctl_cpuctl_alias_en_m(void) -{ - return 0x1 << 6; -} -static inline u32 pwr_falcon_cpuctl_cpuctl_alias_en_v(u32 r) -{ - return (r >> 6) & 0x1; -} -static inline u32 pwr_falcon_cpuctl_alias_r(void) -{ - return 0x0010a130; -} -static inline u32 pwr_falcon_cpuctl_alias_startcpu_f(u32 v) -{ - return (v & 0x1) << 1; -} -static inline u32 pwr_pmu_scpctl_stat_r(void) -{ - return 0x0010ac08; -} -static inline u32 pwr_pmu_scpctl_stat_debug_mode_f(u32 v) -{ - return (v & 0x1) << 20; -} -static inline u32 pwr_pmu_scpctl_stat_debug_mode_m(void) -{ - return 0x1 << 20; -} -static inline u32 pwr_pmu_scpctl_stat_debug_mode_v(u32 r) -{ - return (r >> 20) & 0x1; -} -static inline u32 pwr_falcon_imemc_r(u32 i) -{ - return 0x0010a180 + i*16; -} -static inline u32 pwr_falcon_imemc_offs_f(u32 v) -{ - return (v & 0x3f) << 2; -} -static inline u32 pwr_falcon_imemc_blk_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 pwr_falcon_imemc_aincw_f(u32 v) -{ - return (v & 0x1) << 24; -} -static inline u32 pwr_falcon_imemd_r(u32 i) -{ - return 0x0010a184 + i*16; -} -static inline u32 pwr_falcon_imemt_r(u32 i) -{ - return 0x0010a188 + i*16; -} -static inline u32 pwr_falcon_sctl_r(void) -{ - return 0x0010a240; -} -static inline u32 pwr_falcon_mmu_phys_sec_r(void) -{ - return 0x00100ce4; -} -static inline u32 pwr_falcon_bootvec_r(void) -{ - return 0x0010a104; -} -static inline u32 pwr_falcon_bootvec_vec_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 pwr_falcon_dmactl_r(void) -{ - return 0x0010a10c; -} -static inline u32 pwr_falcon_dmactl_dmem_scrubbing_m(void) -{ - return 0x1 << 1; -} -static inline u32 pwr_falcon_dmactl_imem_scrubbing_m(void) -{ - return 0x1 << 2; -} -static inline u32 pwr_falcon_dmactl_require_ctx_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 pwr_falcon_hwcfg_r(void) -{ - return 0x0010a108; -} -static inline u32 pwr_falcon_hwcfg_imem_size_v(u32 r) -{ - return (r >> 0) & 0x1ff; -} -static inline u32 pwr_falcon_hwcfg_dmem_size_v(u32 r) -{ - return (r >> 9) & 0x1ff; -} -static inline u32 pwr_falcon_dmatrfbase_r(void) -{ - return 0x0010a110; -} -static inline u32 pwr_falcon_dmatrfmoffs_r(void) -{ - return 0x0010a114; -} -static inline u32 pwr_falcon_dmatrfcmd_r(void) -{ - return 0x0010a118; -} -static inline u32 pwr_falcon_dmatrfcmd_imem_f(u32 v) -{ - return (v & 0x1) << 4; -} -static inline u32 pwr_falcon_dmatrfcmd_write_f(u32 v) -{ - return (v & 0x1) << 5; -} -static inline u32 pwr_falcon_dmatrfcmd_size_f(u32 v) -{ - return (v & 0x7) << 8; -} -static inline u32 pwr_falcon_dmatrfcmd_ctxdma_f(u32 v) -{ - return (v & 0x7) << 12; -} -static inline u32 pwr_falcon_dmatrffboffs_r(void) -{ - return 0x0010a11c; -} -static inline u32 pwr_falcon_exterraddr_r(void) -{ - return 0x0010a168; -} -static inline u32 pwr_falcon_exterrstat_r(void) -{ - return 0x0010a16c; -} -static inline u32 pwr_falcon_exterrstat_valid_m(void) -{ - return 0x1 << 31; -} -static inline u32 pwr_falcon_exterrstat_valid_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 pwr_falcon_exterrstat_valid_true_v(void) -{ - return 0x00000001; -} -static inline u32 pwr_pmu_falcon_icd_cmd_r(void) -{ - return 0x0010a200; -} -static inline u32 pwr_pmu_falcon_icd_cmd_opc_s(void) -{ - return 4; -} -static inline u32 pwr_pmu_falcon_icd_cmd_opc_f(u32 v) -{ - return (v & 0xf) << 0; -} -static inline u32 pwr_pmu_falcon_icd_cmd_opc_m(void) -{ - return 0xf << 0; -} -static inline u32 pwr_pmu_falcon_icd_cmd_opc_v(u32 r) -{ - return (r >> 0) & 0xf; -} -static inline u32 pwr_pmu_falcon_icd_cmd_opc_rreg_f(void) -{ - return 0x8; -} -static inline u32 pwr_pmu_falcon_icd_cmd_opc_rstat_f(void) -{ - return 0xe; -} -static inline u32 pwr_pmu_falcon_icd_cmd_idx_f(u32 v) -{ - return (v & 0x1f) << 8; -} -static inline u32 pwr_pmu_falcon_icd_rdata_r(void) -{ - return 0x0010a20c; -} -static inline u32 pwr_falcon_dmemc_r(u32 i) -{ - return 0x0010a1c0 + i*8; -} -static inline u32 pwr_falcon_dmemc_offs_f(u32 v) -{ - return (v & 0x3f) << 2; -} -static inline u32 pwr_falcon_dmemc_offs_m(void) -{ - return 0x3f << 2; -} -static inline u32 pwr_falcon_dmemc_blk_f(u32 v) -{ - return (v & 0xff) << 8; -} -static inline u32 pwr_falcon_dmemc_blk_m(void) -{ - return 0xff << 8; -} -static inline u32 pwr_falcon_dmemc_aincw_f(u32 v) -{ - return (v & 0x1) << 24; -} -static inline u32 pwr_falcon_dmemc_aincr_f(u32 v) -{ - return (v & 0x1) << 25; -} -static inline u32 pwr_falcon_dmemd_r(u32 i) -{ - return 0x0010a1c4 + i*8; -} -static inline u32 pwr_pmu_new_instblk_r(void) -{ - return 0x0010a480; -} -static inline u32 pwr_pmu_new_instblk_ptr_f(u32 v) -{ - return (v & 0xfffffff) << 0; -} -static inline u32 pwr_pmu_new_instblk_target_fb_f(void) -{ - return 0x0; -} -static inline u32 pwr_pmu_new_instblk_target_sys_coh_f(void) -{ - return 0x20000000; -} -static inline u32 pwr_pmu_new_instblk_target_sys_ncoh_f(void) -{ - return 0x30000000; -} -static inline u32 pwr_pmu_new_instblk_valid_f(u32 v) -{ - return (v & 0x1) << 30; -} -static inline u32 pwr_pmu_mutex_id_r(void) -{ - return 0x0010a488; -} -static inline u32 pwr_pmu_mutex_id_value_v(u32 r) -{ - return (r >> 0) & 0xff; -} -static inline u32 pwr_pmu_mutex_id_value_init_v(void) -{ - return 0x00000000; -} -static inline u32 pwr_pmu_mutex_id_value_not_avail_v(void) -{ - return 0x000000ff; -} -static inline u32 pwr_pmu_mutex_id_release_r(void) -{ - return 0x0010a48c; -} -static inline u32 pwr_pmu_mutex_id_release_value_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 pwr_pmu_mutex_id_release_value_m(void) -{ - return 0xff << 0; -} -static inline u32 pwr_pmu_mutex_id_release_value_init_v(void) -{ - return 0x00000000; -} -static inline u32 pwr_pmu_mutex_id_release_value_init_f(void) -{ - return 0x0; -} -static inline u32 pwr_pmu_mutex_r(u32 i) -{ - return 0x0010a580 + i*4; -} -static inline u32 pwr_pmu_mutex__size_1_v(void) -{ - return 0x00000010; -} -static inline u32 pwr_pmu_mutex_value_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 pwr_pmu_mutex_value_v(u32 r) -{ - return (r >> 0) & 0xff; -} -static inline u32 pwr_pmu_mutex_value_initial_lock_f(void) -{ - return 0x0; -} -static inline u32 pwr_pmu_queue_head_r(u32 i) -{ - return 0x0010a4a0 + i*4; -} -static inline u32 pwr_pmu_queue_head__size_1_v(void) -{ - return 0x00000004; -} -static inline u32 pwr_pmu_queue_head_address_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 pwr_pmu_queue_head_address_v(u32 r) -{ - return (r >> 0) & 0xffffffff; -} -static inline u32 pwr_pmu_queue_tail_r(u32 i) -{ - return 0x0010a4b0 + i*4; -} -static inline u32 pwr_pmu_queue_tail__size_1_v(void) -{ - return 0x00000004; -} -static inline u32 pwr_pmu_queue_tail_address_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 pwr_pmu_queue_tail_address_v(u32 r) -{ - return (r >> 0) & 0xffffffff; -} -static inline u32 pwr_pmu_msgq_head_r(void) -{ - return 0x0010a4c8; -} -static inline u32 pwr_pmu_msgq_head_val_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 pwr_pmu_msgq_head_val_v(u32 r) -{ - return (r >> 0) & 0xffffffff; -} -static inline u32 pwr_pmu_msgq_tail_r(void) -{ - return 0x0010a4cc; -} -static inline u32 pwr_pmu_msgq_tail_val_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} -static inline u32 pwr_pmu_msgq_tail_val_v(u32 r) -{ - return (r >> 0) & 0xffffffff; -} -static inline u32 pwr_pmu_idle_mask_r(u32 i) -{ - return 0x0010a504 + i*16; -} -static inline u32 pwr_pmu_idle_mask_gr_enabled_f(void) -{ - return 0x1; -} -static inline u32 pwr_pmu_idle_mask_ce_2_enabled_f(void) -{ - return 0x200000; -} -static inline u32 pwr_pmu_idle_count_r(u32 i) -{ - return 0x0010a508 + i*16; -} -static inline u32 pwr_pmu_idle_count_value_f(u32 v) -{ - return (v & 0x7fffffff) << 0; -} -static inline u32 pwr_pmu_idle_count_value_v(u32 r) -{ - return (r >> 0) & 0x7fffffff; -} -static inline u32 pwr_pmu_idle_count_reset_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 pwr_pmu_idle_ctrl_r(u32 i) -{ - return 0x0010a50c + i*16; -} -static inline u32 pwr_pmu_idle_ctrl_value_m(void) -{ - return 0x3 << 0; -} -static inline u32 pwr_pmu_idle_ctrl_value_busy_f(void) -{ - return 0x2; -} -static inline u32 pwr_pmu_idle_ctrl_value_always_f(void) -{ - return 0x3; -} -static inline u32 pwr_pmu_idle_ctrl_filter_m(void) -{ - return 0x1 << 2; -} -static inline u32 pwr_pmu_idle_ctrl_filter_disabled_f(void) -{ - return 0x0; -} -static inline u32 pwr_pmu_idle_mask_supp_r(u32 i) -{ - return 0x0010a9f0 + i*8; -} -static inline u32 pwr_pmu_idle_mask_1_supp_r(u32 i) -{ - return 0x0010a9f4 + i*8; -} -static inline u32 pwr_pmu_idle_ctrl_supp_r(u32 i) -{ - return 0x0010aa30 + i*8; -} -static inline u32 pwr_pmu_debug_r(u32 i) -{ - return 0x0010a5c0 + i*4; -} -static inline u32 pwr_pmu_debug__size_1_v(void) -{ - return 0x00000004; -} -static inline u32 pwr_pmu_mailbox_r(u32 i) -{ - return 0x0010a450 + i*4; -} -static inline u32 pwr_pmu_mailbox__size_1_v(void) -{ - return 0x0000000c; -} -static inline u32 pwr_pmu_bar0_addr_r(void) -{ - return 0x0010a7a0; -} -static inline u32 pwr_pmu_bar0_data_r(void) -{ - return 0x0010a7a4; -} -static inline u32 pwr_pmu_bar0_ctl_r(void) -{ - return 0x0010a7ac; -} -static inline u32 pwr_pmu_bar0_timeout_r(void) -{ - return 0x0010a7a8; -} -static inline u32 pwr_pmu_bar0_fecs_error_r(void) -{ - return 0x0010a988; -} -static inline u32 pwr_pmu_bar0_error_status_r(void) -{ - return 0x0010a7b0; -} -static inline u32 pwr_pmu_pg_idlefilth_r(u32 i) -{ - return 0x0010a6c0 + i*4; -} -static inline u32 pwr_pmu_pg_ppuidlefilth_r(u32 i) -{ - return 0x0010a6e8 + i*4; -} -static inline u32 pwr_pmu_pg_idle_cnt_r(u32 i) -{ - return 0x0010a710 + i*4; -} -static inline u32 pwr_pmu_pg_intren_r(u32 i) -{ - return 0x0010a760 + i*4; -} -static inline u32 pwr_fbif_transcfg_r(u32 i) -{ - return 0x0010ae00 + i*4; -} -static inline u32 pwr_fbif_transcfg_target_local_fb_f(void) -{ - return 0x0; -} -static inline u32 pwr_fbif_transcfg_target_coherent_sysmem_f(void) -{ - return 0x1; -} -static inline u32 pwr_fbif_transcfg_target_noncoherent_sysmem_f(void) -{ - return 0x2; -} -static inline u32 pwr_fbif_transcfg_mem_type_s(void) -{ - return 1; -} -static inline u32 pwr_fbif_transcfg_mem_type_f(u32 v) -{ - return (v & 0x1) << 2; -} -static inline u32 pwr_fbif_transcfg_mem_type_m(void) -{ - return 0x1 << 2; -} -static inline u32 pwr_fbif_transcfg_mem_type_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 pwr_fbif_transcfg_mem_type_virtual_f(void) -{ - return 0x0; -} -static inline u32 pwr_fbif_transcfg_mem_type_physical_f(void) -{ - return 0x4; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ram_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ram_gm206.h deleted file mode 100644 index 8007d8c2..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_ram_gm206.h +++ /dev/null @@ -1,445 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_ram_gm206_h_ -#define _hw_ram_gm206_h_ - -static inline u32 ram_in_ramfc_s(void) -{ - return 4096; -} -static inline u32 ram_in_ramfc_w(void) -{ - return 0; -} -static inline u32 ram_in_page_dir_base_target_f(u32 v) -{ - return (v & 0x3) << 0; -} -static inline u32 ram_in_page_dir_base_target_w(void) -{ - return 128; -} -static inline u32 ram_in_page_dir_base_target_vid_mem_f(void) -{ - return 0x0; -} -static inline u32 ram_in_page_dir_base_target_sys_mem_coh_f(void) -{ - return 0x2; -} -static inline u32 ram_in_page_dir_base_target_sys_mem_ncoh_f(void) -{ - return 0x3; -} -static inline u32 ram_in_page_dir_base_vol_w(void) -{ - return 128; -} -static inline u32 ram_in_page_dir_base_vol_true_f(void) -{ - return 0x4; -} -static inline u32 ram_in_big_page_size_f(u32 v) -{ - return (v & 0x1) << 11; -} -static inline u32 ram_in_big_page_size_m(void) -{ - return 0x1 << 11; -} -static inline u32 ram_in_big_page_size_w(void) -{ - return 128; -} -static inline u32 ram_in_big_page_size_128kb_f(void) -{ - return 0x0; -} -static inline u32 ram_in_big_page_size_64kb_f(void) -{ - return 0x800; -} -static inline u32 ram_in_page_dir_base_lo_f(u32 v) -{ - return (v & 0xfffff) << 12; -} -static inline u32 ram_in_page_dir_base_lo_w(void) -{ - return 128; -} -static inline u32 ram_in_page_dir_base_hi_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 ram_in_page_dir_base_hi_w(void) -{ - return 129; -} -static inline u32 ram_in_adr_limit_lo_f(u32 v) -{ - return (v & 0xfffff) << 12; -} -static inline u32 ram_in_adr_limit_lo_w(void) -{ - return 130; -} -static inline u32 ram_in_adr_limit_hi_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 ram_in_adr_limit_hi_w(void) -{ - return 131; -} -static inline u32 ram_in_engine_cs_w(void) -{ - return 132; -} -static inline u32 ram_in_engine_cs_wfi_v(void) -{ - return 0x00000000; -} -static inline u32 ram_in_engine_cs_wfi_f(void) -{ - return 0x0; -} -static inline u32 ram_in_engine_cs_fg_v(void) -{ - return 0x00000001; -} -static inline u32 ram_in_engine_cs_fg_f(void) -{ - return 0x8; -} -static inline u32 ram_in_gr_cs_w(void) -{ - return 132; -} -static inline u32 ram_in_gr_cs_wfi_f(void) -{ - return 0x0; -} -static inline u32 ram_in_gr_wfi_target_w(void) -{ - return 132; -} -static inline u32 ram_in_gr_wfi_mode_w(void) -{ - return 132; -} -static inline u32 ram_in_gr_wfi_mode_physical_v(void) -{ - return 0x00000000; -} -static inline u32 ram_in_gr_wfi_mode_physical_f(void) -{ - return 0x0; -} -static inline u32 ram_in_gr_wfi_mode_virtual_v(void) -{ - return 0x00000001; -} -static inline u32 ram_in_gr_wfi_mode_virtual_f(void) -{ - return 0x4; -} -static inline u32 ram_in_gr_wfi_ptr_lo_f(u32 v) -{ - return (v & 0xfffff) << 12; -} -static inline u32 ram_in_gr_wfi_ptr_lo_w(void) -{ - return 132; -} -static inline u32 ram_in_gr_wfi_ptr_hi_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 ram_in_gr_wfi_ptr_hi_w(void) -{ - return 133; -} -static inline u32 ram_in_base_shift_v(void) -{ - return 0x0000000c; -} -static inline u32 ram_in_alloc_size_v(void) -{ - return 0x00001000; -} -static inline u32 ram_fc_size_val_v(void) -{ - return 0x00000200; -} -static inline u32 ram_fc_gp_put_w(void) -{ - return 0; -} -static inline u32 ram_fc_userd_w(void) -{ - return 2; -} -static inline u32 ram_fc_userd_hi_w(void) -{ - return 3; -} -static inline u32 ram_fc_signature_w(void) -{ - return 4; -} -static inline u32 ram_fc_gp_get_w(void) -{ - return 5; -} -static inline u32 ram_fc_pb_get_w(void) -{ - return 6; -} -static inline u32 ram_fc_pb_get_hi_w(void) -{ - return 7; -} -static inline u32 ram_fc_pb_top_level_get_w(void) -{ - return 8; -} -static inline u32 ram_fc_pb_top_level_get_hi_w(void) -{ - return 9; -} -static inline u32 ram_fc_acquire_w(void) -{ - return 12; -} -static inline u32 ram_fc_semaphorea_w(void) -{ - return 14; -} -static inline u32 ram_fc_semaphoreb_w(void) -{ - return 15; -} -static inline u32 ram_fc_semaphorec_w(void) -{ - return 16; -} -static inline u32 ram_fc_semaphored_w(void) -{ - return 17; -} -static inline u32 ram_fc_gp_base_w(void) -{ - return 18; -} -static inline u32 ram_fc_gp_base_hi_w(void) -{ - return 19; -} -static inline u32 ram_fc_gp_fetch_w(void) -{ - return 20; -} -static inline u32 ram_fc_pb_fetch_w(void) -{ - return 21; -} -static inline u32 ram_fc_pb_fetch_hi_w(void) -{ - return 22; -} -static inline u32 ram_fc_pb_put_w(void) -{ - return 23; -} -static inline u32 ram_fc_pb_put_hi_w(void) -{ - return 24; -} -static inline u32 ram_fc_pb_header_w(void) -{ - return 33; -} -static inline u32 ram_fc_pb_count_w(void) -{ - return 34; -} -static inline u32 ram_fc_subdevice_w(void) -{ - return 37; -} -static inline u32 ram_fc_formats_w(void) -{ - return 39; -} -static inline u32 ram_fc_target_w(void) -{ - return 43; -} -static inline u32 ram_fc_hce_ctrl_w(void) -{ - return 57; -} -static inline u32 ram_fc_chid_w(void) -{ - return 58; -} -static inline u32 ram_fc_chid_id_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 ram_fc_chid_id_w(void) -{ - return 0; -} -static inline u32 ram_fc_runlist_timeslice_w(void) -{ - return 62; -} -static inline u32 ram_userd_base_shift_v(void) -{ - return 0x00000009; -} -static inline u32 ram_userd_chan_size_v(void) -{ - return 0x00000200; -} -static inline u32 ram_userd_put_w(void) -{ - return 16; -} -static inline u32 ram_userd_get_w(void) -{ - return 17; -} -static inline u32 ram_userd_ref_w(void) -{ - return 18; -} -static inline u32 ram_userd_put_hi_w(void) -{ - return 19; -} -static inline u32 ram_userd_ref_threshold_w(void) -{ - return 20; -} -static inline u32 ram_userd_top_level_get_w(void) -{ - return 22; -} -static inline u32 ram_userd_top_level_get_hi_w(void) -{ - return 23; -} -static inline u32 ram_userd_get_hi_w(void) -{ - return 24; -} -static inline u32 ram_userd_gp_get_w(void) -{ - return 34; -} -static inline u32 ram_userd_gp_put_w(void) -{ - return 35; -} -static inline u32 ram_userd_gp_top_level_get_w(void) -{ - return 22; -} -static inline u32 ram_userd_gp_top_level_get_hi_w(void) -{ - return 23; -} -static inline u32 ram_rl_entry_size_v(void) -{ - return 0x00000008; -} -static inline u32 ram_rl_entry_chid_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 ram_rl_entry_id_f(u32 v) -{ - return (v & 0xfff) << 0; -} -static inline u32 ram_rl_entry_type_f(u32 v) -{ - return (v & 0x1) << 13; -} -static inline u32 ram_rl_entry_type_chid_f(void) -{ - return 0x0; -} -static inline u32 ram_rl_entry_type_tsg_f(void) -{ - return 0x2000; -} -static inline u32 ram_rl_entry_timeslice_scale_f(u32 v) -{ - return (v & 0xf) << 14; -} -static inline u32 ram_rl_entry_timeslice_scale_3_f(void) -{ - return 0xc000; -} -static inline u32 ram_rl_entry_timeslice_timeout_f(u32 v) -{ - return (v & 0xff) << 18; -} -static inline u32 ram_rl_entry_timeslice_timeout_128_f(void) -{ - return 0x2000000; -} -static inline u32 ram_rl_entry_tsg_length_f(u32 v) -{ - return (v & 0x3f) << 26; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_timer_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_timer_gm206.h deleted file mode 100644 index 68c32507..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_timer_gm206.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_timer_gm206_h_ -#define _hw_timer_gm206_h_ - -static inline u32 timer_pri_timeout_r(void) -{ - return 0x00009080; -} -static inline u32 timer_pri_timeout_period_f(u32 v) -{ - return (v & 0xffffff) << 0; -} -static inline u32 timer_pri_timeout_period_m(void) -{ - return 0xffffff << 0; -} -static inline u32 timer_pri_timeout_period_v(u32 r) -{ - return (r >> 0) & 0xffffff; -} -static inline u32 timer_pri_timeout_en_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 timer_pri_timeout_en_m(void) -{ - return 0x1 << 31; -} -static inline u32 timer_pri_timeout_en_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 timer_pri_timeout_en_en_enabled_f(void) -{ - return 0x80000000; -} -static inline u32 timer_pri_timeout_en_en_disabled_f(void) -{ - return 0x0; -} -static inline u32 timer_pri_timeout_save_0_r(void) -{ - return 0x00009084; -} -static inline u32 timer_pri_timeout_save_1_r(void) -{ - return 0x00009088; -} -static inline u32 timer_pri_timeout_fecs_errcode_r(void) -{ - return 0x0000908c; -} -static inline u32 timer_time_0_r(void) -{ - return 0x00009400; -} -static inline u32 timer_time_1_r(void) -{ - return 0x00009410; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_top_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_top_gm206.h deleted file mode 100644 index b0d571cf..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_top_gm206.h +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_top_gm206_h_ -#define _hw_top_gm206_h_ - -static inline u32 top_num_gpcs_r(void) -{ - return 0x00022430; -} -static inline u32 top_num_gpcs_value_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 top_tpc_per_gpc_r(void) -{ - return 0x00022434; -} -static inline u32 top_tpc_per_gpc_value_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 top_num_fbps_r(void) -{ - return 0x00022438; -} -static inline u32 top_num_fbps_value_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 top_num_fbpas_r(void) -{ - return 0x0002243c; -} -static inline u32 top_num_fbpas_value_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 top_ltc_per_fbp_r(void) -{ - return 0x00022450; -} -static inline u32 top_ltc_per_fbp_value_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 top_slices_per_ltc_r(void) -{ - return 0x0002245c; -} -static inline u32 top_slices_per_ltc_value_v(u32 r) -{ - return (r >> 0) & 0x1f; -} -static inline u32 top_num_ltcs_r(void) -{ - return 0x00022454; -} -static inline u32 top_device_info_r(u32 i) -{ - return 0x00022700 + i*4; -} -static inline u32 top_device_info__size_1_v(void) -{ - return 0x00000040; -} -static inline u32 top_device_info_chain_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 top_device_info_chain_enable_v(void) -{ - return 0x00000001; -} -static inline u32 top_device_info_engine_enum_v(u32 r) -{ - return (r >> 26) & 0xf; -} -static inline u32 top_device_info_runlist_enum_v(u32 r) -{ - return (r >> 21) & 0xf; -} -static inline u32 top_device_info_intr_enum_v(u32 r) -{ - return (r >> 15) & 0x1f; -} -static inline u32 top_device_info_reset_enum_v(u32 r) -{ - return (r >> 9) & 0x1f; -} -static inline u32 top_device_info_type_enum_v(u32 r) -{ - return (r >> 2) & 0x1fffffff; -} -static inline u32 top_device_info_type_enum_graphics_v(void) -{ - return 0x00000000; -} -static inline u32 top_device_info_type_enum_graphics_f(void) -{ - return 0x0; -} -static inline u32 top_device_info_type_enum_copy0_v(void) -{ - return 0x00000001; -} -static inline u32 top_device_info_type_enum_copy0_f(void) -{ - return 0x4; -} -static inline u32 top_device_info_type_enum_copy1_v(void) -{ - return 0x00000002; -} -static inline u32 top_device_info_type_enum_copy1_f(void) -{ - return 0x8; -} -static inline u32 top_device_info_type_enum_copy2_v(void) -{ - return 0x00000003; -} -static inline u32 top_device_info_type_enum_copy2_f(void) -{ - return 0xc; -} -static inline u32 top_device_info_entry_v(u32 r) -{ - return (r >> 0) & 0x3; -} -static inline u32 top_device_info_entry_not_valid_v(void) -{ - return 0x00000000; -} -static inline u32 top_device_info_entry_enum_v(void) -{ - return 0x00000002; -} -static inline u32 top_device_info_entry_data_v(void) -{ - return 0x00000001; -} -static inline u32 top_device_info_data_type_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 top_device_info_data_type_enum2_v(void) -{ - return 0x00000000; -} -static inline u32 top_device_info_data_pri_base_v(u32 r) -{ - return (r >> 12) & 0x7ff; -} -static inline u32 top_device_info_data_pri_base_align_v(void) -{ - return 0x0000000c; -} -static inline u32 top_device_info_data_fault_id_enum_v(u32 r) -{ - return (r >> 3) & 0x1f; -} -static inline u32 top_device_info_data_fault_id_v(u32 r) -{ - return (r >> 2) & 0x1; -} -static inline u32 top_device_info_data_fault_id_valid_v(void) -{ - return 0x00000001; -} -static inline u32 top_scratch1_r(void) -{ - return 0x0002240c; -} -static inline u32 top_scratch1_devinit_completed_v(u32 r) -{ - return (r >> 1) & 0x1; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_xve_gm206.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_xve_gm206.h deleted file mode 100644 index e113dbeb..00000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm206/hw_xve_gm206.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef _hw_xve_gm206_h_ -#define _hw_xve_gm206_h_ - -static inline u32 xve_rom_ctrl_r(void) -{ - return 0x00000050; -} -static inline u32 xve_rom_ctrl_rom_shadow_f(u32 v) -{ - return (v & 0x1) << 0; -} -static inline u32 xve_rom_ctrl_rom_shadow_disabled_f(void) -{ - return 0x0; -} -static inline u32 xve_rom_ctrl_rom_shadow_enabled_f(void) -{ - return 0x1; -} -#endif diff --git a/drivers/gpu/nvgpu/lpwr/lpwr.c b/drivers/gpu/nvgpu/lpwr/lpwr.c index b1189590..7bfea5d5 100644 --- a/drivers/gpu/nvgpu/lpwr/lpwr.c +++ b/drivers/gpu/nvgpu/lpwr/lpwr.c @@ -15,7 +15,7 @@ #include #include "gk20a/gk20a.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "pstate/pstate.h" #include "perf/perf.h" #include "lpwr.h" diff --git a/drivers/gpu/nvgpu/lpwr/rppg.c b/drivers/gpu/nvgpu/lpwr/rppg.c index 64046040..8e03a16b 100644 --- a/drivers/gpu/nvgpu/lpwr/rppg.c +++ b/drivers/gpu/nvgpu/lpwr/rppg.c @@ -14,7 +14,7 @@ #include #include "gk20a/gk20a.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "pstate/pstate.h" static void pmu_handle_rppg_init_msg(struct gk20a *g, struct pmu_msg *msg, diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index eda296df..b136fb6e 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c @@ -17,7 +17,7 @@ #include "gk20a/gk20a.h" #include "gk20a/platform_gk20a.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "common/linux/os_linux.h" #include "boardobj/boardobjgrp.h" diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c index 0dbbd2c2..6ed2fa50 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.c +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c @@ -17,7 +17,7 @@ #include "pwrdev.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" static u32 _pwr_device_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c index 330d23c8..4602a76e 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c @@ -17,7 +17,7 @@ #include "pwrdev.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" static u32 _pwr_channel_pmudata_instget(struct gk20a *g, struct nv_pmu_boardobjgrp *pmuboardobjgrp, diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index 970d9953..969fb6a9 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c @@ -19,7 +19,7 @@ #include "pwrpolicy.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "common/linux/os_linux.h" #define _pwr_policy_limitarboutputget_helper(p_limit_arb) (p_limit_arb)->output diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.c b/drivers/gpu/nvgpu/therm/thrmchannel.c index da2fbc9e..7e534cbd 100644 --- a/drivers/gpu/nvgpu/therm/thrmchannel.c +++ b/drivers/gpu/nvgpu/therm/thrmchannel.c @@ -18,7 +18,7 @@ #include "thrmchannel.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" static u32 _therm_channel_pmudatainit_device(struct gk20a *g, struct boardobj *board_obj_ptr, diff --git a/drivers/gpu/nvgpu/therm/thrmdev.c b/drivers/gpu/nvgpu/therm/thrmdev.c index 782939f0..d01b567a 100644 --- a/drivers/gpu/nvgpu/therm/thrmdev.c +++ b/drivers/gpu/nvgpu/therm/thrmdev.c @@ -18,7 +18,7 @@ #include "thrmdev.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "ctrl/ctrltherm.h" static struct boardobj *construct_therm_device(struct gk20a *g, diff --git a/drivers/gpu/nvgpu/volt/volt_dev.c b/drivers/gpu/nvgpu/volt/volt_dev.c index e62a8dcf..fa68cbde 100644 --- a/drivers/gpu/nvgpu/volt/volt_dev.c +++ b/drivers/gpu/nvgpu/volt/volt_dev.c @@ -17,7 +17,7 @@ #include #include "gk20a/gk20a.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" diff --git a/drivers/gpu/nvgpu/volt/volt_pmu.c b/drivers/gpu/nvgpu/volt/volt_pmu.c index 8bc9671b..05b52c4b 100644 --- a/drivers/gpu/nvgpu/volt/volt_pmu.c +++ b/drivers/gpu/nvgpu/volt/volt_pmu.c @@ -17,7 +17,7 @@ #include "gk20a/gk20a.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "ctrl/ctrlvolt.h" #include "ctrl/ctrlperf.h" diff --git a/drivers/gpu/nvgpu/volt/volt_policy.c b/drivers/gpu/nvgpu/volt/volt_policy.c index 900888ac..05c9f6b1 100644 --- a/drivers/gpu/nvgpu/volt/volt_policy.c +++ b/drivers/gpu/nvgpu/volt/volt_policy.c @@ -16,7 +16,7 @@ #include "gk20a/gk20a.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "ctrl/ctrlvolt.h" #include "volt.h" diff --git a/drivers/gpu/nvgpu/volt/volt_rail.c b/drivers/gpu/nvgpu/volt/volt_rail.c index a4a8016a..e53abde5 100644 --- a/drivers/gpu/nvgpu/volt/volt_rail.c +++ b/drivers/gpu/nvgpu/volt/volt_rail.c @@ -16,7 +16,7 @@ #include "gk20a/gk20a.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" -#include "gm206/bios_gm206.h" +#include "gp106/bios_gp106.h" #include "ctrl/ctrlvolt.h" #include "volt.h" -- cgit v1.2.2