From 68ff0c8f309e79266682f96994cf83c921061f77 Mon Sep 17 00:00:00 2001 From: Shardar Shariff Md Date: Tue, 1 Nov 2016 19:13:34 +0530 Subject: gpu: nvgpu: gv11b: use fuse control read/write APIs for K4.4 Use fuse control read/write APIs when accessing fuse control registers for Kernel version 4.4 Bug 200243956 Change-Id: I3d78ec2733b5f56615fa0b588664570c85557e63 Signed-off-by: Shardar Shariff Md Reviewed-on: http://git-master/r/1245826 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index e6050359..ca5e8dc0 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -16,6 +16,7 @@ #include "gk20a/gk20a.h" /* FERMI and MAXWELL classes defined here */ #include #include +#include #include "gk20a/gr_gk20a.h" #include "gk20a/semaphore_gk20a.h" @@ -1135,8 +1136,13 @@ static void gr_gv11b_init_cyclestats(struct gk20a *g) static void gr_gv11b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) tegra_fuse_writel(0x1, FUSE_FUSEBYPASS_0); tegra_fuse_writel(0x0, FUSE_WRITE_ACCESS_SW_0); +#else + tegra_fuse_control_write(0x1, FUSE_FUSEBYPASS_0); + tegra_fuse_control_write(0x0, FUSE_WRITE_ACCESS_SW_0); +#endif if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) tegra_fuse_writel(0x2, FUSE_OPT_GPU_TPC0_DISABLE_0); -- cgit v1.2.2