From 54eb74539342ce0fa6961e46f2ce22b68ad2fb21 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 6 Apr 2017 12:56:41 -0700 Subject: gpu: nvgpu: pmgr: Use new error macros gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I8d85e4d3da1fe8f99649ef4395a5b0dc52b0caf2 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1457353 Reviewed-by: Alex Waterman --- drivers/gpu/nvgpu/pmgr/pmgr.c | 24 ++++++-------- drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 62 ++++++++++++++----------------------- drivers/gpu/nvgpu/pmgr/pwrdev.c | 8 ++--- drivers/gpu/nvgpu/pmgr/pwrmonitor.c | 12 +++---- drivers/gpu/nvgpu/pmgr/pwrpolicy.c | 28 ++++++++--------- 5 files changed, 56 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.c b/drivers/gpu/nvgpu/pmgr/pmgr.c index e101aba8..c41a3a22 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgr.c +++ b/drivers/gpu/nvgpu/pmgr/pmgr.c @@ -23,8 +23,7 @@ int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val) status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); if (status) - gk20a_err(dev_from_gk20a(g), - "pmgr_pwr_devices_get_current_power failed %x", + nvgpu_err(g, "pmgr_pwr_devices_get_current_power failed %x", status); *val = payload.devices[0].powerm_w; @@ -39,8 +38,7 @@ int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val) status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); if (status) - gk20a_err(dev_from_gk20a(g), - "pmgr_pwr_devices_get_current failed %x", + nvgpu_err(g, "pmgr_pwr_devices_get_current failed %x", status); *val = payload.devices[0].currentm_a; @@ -55,8 +53,7 @@ int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val) status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); if (status) - gk20a_err(dev_from_gk20a(g), - "pmgr_pwr_devices_get_current_voltage failed %x", + nvgpu_err(g, "pmgr_pwr_devices_get_current_voltage failed %x", status); *val = payload.devices[0].voltageu_v; @@ -117,20 +114,17 @@ static void pmgr_debugfs_init(struct gk20a *g) { dbgentry = debugfs_create_file( "power", S_IRUGO, platform->debugfs, g, &pmgr_power_ctrl_fops); if (!dbgentry) - gk20a_err(dev_from_gk20a(g), - "debugfs entry create failed for power"); + nvgpu_err(g, "debugfs entry create failed for power"); dbgentry = debugfs_create_file( "current", S_IRUGO, platform->debugfs, g, &pmgr_current_ctrl_fops); if (!dbgentry) - gk20a_err(dev_from_gk20a(g), - "debugfs entry create failed for current"); + nvgpu_err(g, "debugfs entry create failed for current"); dbgentry = debugfs_create_file( "voltage", S_IRUGO, platform->debugfs, g, &pmgr_voltage_ctrl_fops); if (!dbgentry) - gk20a_err(dev_from_gk20a(g), - "debugfs entry create failed for voltage"); + nvgpu_err(g, "debugfs entry create failed for voltage"); } #endif @@ -140,7 +134,7 @@ u32 pmgr_domain_sw_setup(struct gk20a *g) status = pmgr_device_sw_setup(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr devices, status - 0x%x", status); goto exit; @@ -148,7 +142,7 @@ u32 pmgr_domain_sw_setup(struct gk20a *g) status = pmgr_monitor_sw_setup(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr monitor, status - 0x%x", status); goto exit; @@ -156,7 +150,7 @@ u32 pmgr_domain_sw_setup(struct gk20a *g) status = pmgr_policy_sw_setup(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr policy, status - 0x%x", status); goto exit; diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index 9201de2b..95225961 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c @@ -37,17 +37,14 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, if ((msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_SET_OBJECT) && (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_QUERY) && (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_LOAD)) { - gk20a_err(dev_from_gk20a(g), - "unknow msg %x", - msg->msg.pmgr.msg_type); + nvgpu_err(g, "unknow msg %x", msg->msg.pmgr.msg_type); return; } if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) { if ((msg->msg.pmgr.set_object.b_success != 1) || (msg->msg.pmgr.set_object.flcnstatus != 0) ) { - gk20a_err(dev_from_gk20a(g), - "pmgr msg failed %x %x %x %x", + nvgpu_err(g, "pmgr msg failed %x %x %x %x", msg->msg.pmgr.set_object.msg_type, msg->msg.pmgr.set_object.b_success, msg->msg.pmgr.set_object.flcnstatus, @@ -57,8 +54,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) { if ((msg->msg.pmgr.query.b_success != 1) || (msg->msg.pmgr.query.flcnstatus != 0) ) { - gk20a_err(dev_from_gk20a(g), - "pmgr msg failed %x %x %x %x", + nvgpu_err(g, "pmgr msg failed %x %x %x %x", msg->msg.pmgr.query.msg_type, msg->msg.pmgr.query.b_success, msg->msg.pmgr.query.flcnstatus, @@ -68,8 +64,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) { if ((msg->msg.pmgr.query.b_success != 1) || (msg->msg.pmgr.query.flcnstatus != 0) ) { - gk20a_err(dev_from_gk20a(g), - "pmgr msg failed %x %x %x", + nvgpu_err(g, "pmgr msg failed %x %x %x", msg->msg.pmgr.load.msg_type, msg->msg.pmgr.load.b_success, msg->msg.pmgr.load.flcnstatus); @@ -115,7 +110,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g, (void *)&handlerparams, &seqdesc, ~0); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to post pmgr cmd for unit %x cmd id %x obj type %x", cmd.hdr.unit_id, pcmd->cmd_type, pcmd->object_type); goto exit; @@ -126,7 +121,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g, &handlerparams.success, 1); if (handlerparams.success == 0) { - gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); + nvgpu_err(g, "could not process cmd"); status = -ETIMEDOUT; goto exit; } @@ -162,8 +157,7 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) &i2c_desc_table); if (status) - gk20a_err(dev_from_gk20a(g), - "pmgr_pmu_set_object failed %x", + nvgpu_err(g, "pmgr_pmu_set_object failed %x", status); return status; @@ -188,8 +182,7 @@ static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) (struct nv_pmu_boardobjgrp_super *)&pwr_desc_table); if (status) { - gk20a_err(dev_from_gk20a(g), - "boardobjgrp_pmudatainit_legacy failed %x", + nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x", status); goto exit; } @@ -204,8 +197,7 @@ static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) &pwr_desc_table); if (status) - gk20a_err(dev_from_gk20a(g), - "pmgr_pmu_set_object failed %x", + nvgpu_err(g, "pmgr_pmu_set_object failed %x", status); exit: @@ -233,8 +225,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.channels)); if (status) { - gk20a_err(dev_from_gk20a(g), - "boardobjgrp_pmudatainit_legacy failed %x", + nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x", status); goto exit; } @@ -253,8 +244,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) (struct nv_pmu_boardobjgrp_super *)&(pwr_monitor_pack.ch_rels)); if (status) { - gk20a_err(dev_from_gk20a(g), - "boardobjgrp_pmudatainit_legacy failed %x", + nvgpu_err(g, "boardobjgrp_pmudatainit_legacy failed %x", status); goto exit; } @@ -271,8 +261,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) &pwr_monitor_pack); if (status) - gk20a_err(dev_from_gk20a(g), - "pmgr_pmu_set_object failed %x", + nvgpu_err(g, "pmgr_pmu_set_object failed %x", status); exit: @@ -289,8 +278,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g) ppwrpack = nvgpu_kzalloc(g, sizeof(struct nv_pmu_pmgr_pwr_policy_pack)); if (!ppwrpack) { - gk20a_err(dev_from_gk20a(g), - "pwr policy alloc failed %x", + nvgpu_err(g, "pwr policy alloc failed %x", status); status = -ENOMEM; goto exit; @@ -329,8 +317,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g) status = ((struct boardobj *)ppolicy)->pmudatainit(g, (struct boardobj *)ppolicy, (struct nv_pmu_boardobj *)&(ppwrpack->policies.policies[indx].data)); if (status) { - gk20a_err(dev_from_gk20a(g), - "pmudatainit failed %x indx %x", + nvgpu_err(g, "pmudatainit failed %x indx %x", status, indx); status = -ENOMEM; goto exit; @@ -357,8 +344,7 @@ u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g) ppwrpack); if (status) - gk20a_err(dev_from_gk20a(g), - "pmgr_pmu_set_object failed %x", + nvgpu_err(g, "pmgr_pmu_set_object failed %x", status); exit: @@ -403,7 +389,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking( (void *)&handlerparams, &seqdesc, ~0); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to post pmgr query cmd for unit %x cmd id %x dev mask %x", cmd.hdr.unit_id, pcmd->cmd_type, pcmd->dev_mask); goto exit; @@ -414,7 +400,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking( &handlerparams.success, 1); if (handlerparams.success == 0) { - gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); + nvgpu_err(g, "could not process cmd"); status = -ETIMEDOUT; goto exit; } @@ -447,7 +433,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g) (void *)&handlerparams, &seqdesc, ~0); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to post pmgr load cmd for unit %x cmd id %x", cmd.hdr.unit_id, pcmd->cmd_type); goto exit; @@ -458,7 +444,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g) &handlerparams.success, 1); if (handlerparams.success == 0) { - gk20a_err(dev_from_gk20a(g), "could not process cmd\n"); + nvgpu_err(g, "could not process cmd"); status = -ETIMEDOUT; goto exit; } @@ -474,7 +460,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) status = pmgr_send_i2c_device_topology_to_pmu(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "pmgr_send_i2c_device_topology_to_pmu failed %x", status); goto exit; @@ -483,7 +469,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) if (!BOARDOBJGRP_IS_EMPTY(&g->pmgr_pmu.pmgr_deviceobjs.super.super)) { status = pmgr_send_pwr_device_topology_to_pmu(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "pmgr_send_pwr_device_topology_to_pmu failed %x", status); goto exit; @@ -496,7 +482,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels.super))) { status = pmgr_send_pwr_mointer_to_pmu(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "pmgr_send_pwr_mointer_to_pmu failed %x", status); goto exit; } @@ -510,7 +496,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) &g->pmgr_pmu.pmgr_policyobjs.pwr_violations.super))) { status = pmgr_send_pwr_policy_to_pmu(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "pmgr_send_pwr_policy_to_pmu failed %x", status); goto exit; } @@ -518,7 +504,7 @@ u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) status = pmgr_pmu_load_blocking(g); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "pmgr_send_pwr_mointer_to_pmu failed %x", status); goto exit; } diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c index 0f87ad26..e32dfc40 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.c +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c @@ -54,7 +54,7 @@ static u32 _pwr_domains_pmudatainit_ina3221(struct gk20a *g, status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error updating pmu boardobjgrp for pwr domain 0x%x", status); goto done; @@ -252,7 +252,7 @@ static u32 devinit_get_pwr_device_table(struct gk20a *g, pwr_device_size, pwr_device_data.boardobj.type); if (!boardobj) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to create pwr device for %d type %d", index, pwr_device_data.boardobj.type); status = -EINVAL; goto done; @@ -262,7 +262,7 @@ static u32 devinit_get_pwr_device_table(struct gk20a *g, boardobj, obj_index); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to insert pwr device boardobj for %d", index); status = -EINVAL; goto done; @@ -285,7 +285,7 @@ u32 pmgr_device_sw_setup(struct gk20a *g) /* Construct the Super Class and override the Interfaces */ status = boardobjgrpconstruct_e32(&g->pmgr_pmu.pmgr_deviceobjs.super); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr devices, status - 0x%x", status); goto done; diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c index 685aa71a..05636001 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c @@ -80,7 +80,7 @@ static u32 _pwr_channel_state_init(struct gk20a *g) BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK(32, indx, objmask) { pchannel = PMGR_PWR_MONITOR_GET_PWR_CHANNEL(g, indx); if (pchannel == NULL) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "PMGR_PWR_MONITOR_GET_PWR_CHANNEL-failed %d", indx); return -EINVAL; } @@ -107,7 +107,7 @@ static u32 _pwr_domains_pmudatainit_sensor(struct gk20a *g, status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error updating pmu boardobjgrp for pwr sensor 0x%x", status); goto done; @@ -263,7 +263,7 @@ static u32 devinit_get_pwr_topology_table(struct gk20a *g, pwr_topology_size, pwr_topology_data.boardobj.type); if (!boardobj) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to create pwr topology for %d type %d", index, pwr_topology_data.boardobj.type); status = -EINVAL; @@ -274,7 +274,7 @@ static u32 devinit_get_pwr_topology_table(struct gk20a *g, boardobj, obj_index); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to insert pwr topology boardobj for %d", index); status = -EINVAL; goto done; @@ -300,7 +300,7 @@ u32 pmgr_monitor_sw_setup(struct gk20a *g) status = boardobjgrpconstruct_e32( &g->pmgr_pmu.pmgr_monitorobjs.pwr_channels); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr channel, status - 0x%x", status); goto done; @@ -315,7 +315,7 @@ u32 pmgr_monitor_sw_setup(struct gk20a *g) status = boardobjgrpconstruct_e32( &g->pmgr_pmu.pmgr_monitorobjs.pwr_ch_rels); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr channel relationship, status - 0x%x", status); goto done; diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index c2053469..e9329438 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c @@ -53,7 +53,7 @@ static u32 _pwr_policy_limitarbinputset_helper(struct gk20a *g, p_limit_arb->num_inputs].limit_value = limit_value; p_limit_arb->num_inputs++; } else { - gk20a_err(g->dev, "No entries remaining for clientIdx=%d", + nvgpu_err(g, "No entries remaining for clientIdx=%d", client_idx); status = -EINVAL; } @@ -100,7 +100,7 @@ static u32 _pwr_policy_limitid_translate(struct gk20a *g, break; default: - gk20a_err(g->dev, "Unsupported limitId=%d", + nvgpu_err(g, "Unsupported limitId=%d", limit_id); status = -EINVAL; break; @@ -130,7 +130,7 @@ static u32 _pwr_policy_limitarbinputset(struct gk20a *g, status = _pwr_policy_limitarbinputset_helper(g, p_limit_arb, client_idx, limit); if (status) { - gk20a_err(g->dev, + nvgpu_err(g, "Error setting client limit value: status=0x%08x, limitId=0x%x, clientIdx=0x%x, limit=%d", status, limit_id, client_idx, limit); goto exit; @@ -185,7 +185,7 @@ static u32 _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g, status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error updating pmu boardobjgrp for pwr sensor 0x%x", status); status = -ENOMEM; @@ -294,8 +294,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g, break; default: - gk20a_err(g->dev, - "Error: unrecognized Power Policy filter type: %d.\n", + nvgpu_err(g, "Error: unrecognized Power Policy filter type: %d", pwrpolicy->filter_type); } @@ -385,7 +384,7 @@ static u32 _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g, pwr_policy_size, ppwrpolicydata->boardobj.type); if (!boardobj) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to create pwr policy for type %d", ppwrpolicydata->boardobj.type); status = -EINVAL; goto done; @@ -395,7 +394,7 @@ static u32 _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g, boardobj, obj_index); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to insert pwr policy boardobj for %d", obj_index); status = -EINVAL; goto done; @@ -659,7 +658,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g, pwr_policy_size, pwr_policy_data.boardobj.type); if (!boardobj) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to create pwr policy for %d type %d", index, pwr_policy_data.boardobj.type); status = -EINVAL; @@ -670,7 +669,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g, boardobj, obj_index); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "unable to insert pwr policy boardobj for %d", index); status = -EINVAL; @@ -687,8 +686,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g, sizeof(struct pwr_policy_sw_threshold), obj_index); if (status) { - gk20a_err(dev_from_gk20a(g), - "unable to construct_WAR_policy"); + nvgpu_err(g, "unable to construct_WAR_policy"); status = -EINVAL; goto done; } @@ -712,7 +710,7 @@ u32 pmgr_policy_sw_setup(struct gk20a *g) status = boardobjgrpconstruct_e32( &g->pmgr_pmu.pmgr_policyobjs.pwr_policies); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr policy, status - 0x%x", status); goto done; @@ -721,7 +719,7 @@ u32 pmgr_policy_sw_setup(struct gk20a *g) status = boardobjgrpconstruct_e32( &g->pmgr_pmu.pmgr_policyobjs.pwr_policy_rels); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr policy rels, status - 0x%x", status); goto done; @@ -730,7 +728,7 @@ u32 pmgr_policy_sw_setup(struct gk20a *g) status = boardobjgrpconstruct_e32( &g->pmgr_pmu.pmgr_policyobjs.pwr_violations); if (status) { - gk20a_err(dev_from_gk20a(g), + nvgpu_err(g, "error creating boardobjgrp for pmgr violations, status - 0x%x", status); goto done; -- cgit v1.2.2