From 4df6cd4a345d9a564f2235bc6a20ebb4614c2b04 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Mon, 11 Apr 2016 17:06:20 -0700 Subject: gpu: nvgpu: add ctxsw channel reset event Generate a ctxsw channel reset when engine needs to be reset. This event is generated by the driver, while other events are generated by FECS. JIRA ELVR-314 Change-Id: I7791cf3e538782464c37c442c871acb177484566 Signed-off-by: Thomas Fleury Reviewed-on: http://git-master/r/1129029 (cherry picked from commit 114038a1a5d9e8941bc53f3e95115b01dd1f8c6e) Reviewed-on: http://git-master/r/1134379 (cherry picked from commit 15fa2a7b48a0937dfd449ca0c4ed5ad3a863d6bf) Reviewed-on: http://git-master/r/1123916 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c | 42 +++++++++++++++++++++++++++++ drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h | 5 ++++ drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 8 +++--- drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 3 ++- include/uapi/linux/nvgpu.h | 1 + 6 files changed, 55 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 31a3ceeb..d99c48fb 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c @@ -886,7 +886,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch) /* if lock is already taken, a reset is taking place so no need to repeat */ if (!was_reset) { - trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); + gk20a_ctxsw_trace_channel_reset(g, ch); gk20a_fifo_reset_engine(g, g->fifo.deferred_fault_engines); } diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c index 04109df0..3f39ced1 100644 --- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include "ctxsw_trace_gk20a.h" #include "gk20a.h" @@ -620,6 +621,47 @@ void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid) wake_up_interruptible(&dev->readout_wq); } +void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch) +{ +#ifdef CONFIG_GK20A_CTXSW_TRACE + struct nvgpu_ctxsw_trace_entry entry = { + .vmid = 0, + .tag = NVGPU_CTXSW_TAG_RESET, + .timestamp = gk20a_read_ptimer(g), + .context_id = 0, + .pid = ch->pid, + }; + + gk20a_ctxsw_trace_write(g, &entry); +#endif + trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); + gk20a_ctxsw_trace_wake_up(g, 0); +} + +void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg) +{ +#ifdef CONFIG_GK20A_CTXSW_TRACE + struct nvgpu_ctxsw_trace_entry entry = { + .vmid = 0, + .tag = NVGPU_CTXSW_TAG_RESET, + .timestamp = gk20a_read_ptimer(g), + .context_id = 0, + .pid = 0, + }; + struct channel_gk20a *ch; + + mutex_lock(&tsg->ch_list_lock); + ch = list_entry(&tsg->ch_list, struct channel_gk20a, ch_entry); + mutex_unlock(&tsg->ch_list_lock); + + entry.pid = ch->pid; + + gk20a_ctxsw_trace_write(g, &entry); +#endif + trace_gk20a_channel_reset(~0, tsg->tsgid); + gk20a_ctxsw_trace_wake_up(g, 0); +} + void gk20a_ctxsw_trace_init_ops(struct gpu_ops *ops) { ops->fecs_trace.alloc_user_buffer = gk20a_ctxsw_dev_ring_alloc; diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h index 7a2f4aeb..dacc0b50 100644 --- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h @@ -23,6 +23,7 @@ struct channel_gk20a; struct channel_ctx_gk20a; struct gk20a_ctxsw_dev; struct gk20a_fecs_trace; +struct tsg_gk20a; int gk20a_ctxsw_dev_release(struct inode *inode, struct file *filp); @@ -40,4 +41,8 @@ int gk20a_ctxsw_trace_write(struct gk20a *, struct nvgpu_ctxsw_trace_entry *); void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid); void gk20a_ctxsw_trace_init_ops(struct gpu_ops *ops); +void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch); +void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg); + + #endif /* __CTXSW_TRACE_GK20A_H */ diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 396c5ee5..b0e2ce1f 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -1083,10 +1083,10 @@ static bool gk20a_fifo_handle_mmu_fault( /* if lock is already taken, a reset is taking place so no need to repeat */ if (!was_reset) { - trace_gk20a_channel_reset( - ch ? ch->hw_chid : ~0, - tsg ? tsg->tsgid : - NVGPU_INVALID_TSG_ID); + if (ch) + gk20a_ctxsw_trace_channel_reset(g, ch); + else + gk20a_ctxsw_trace_tsg_reset(g, tsg); gk20a_fifo_reset_engine(g, engine_id); } mutex_unlock(&g->fifo.gr_reset_mutex); diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index d1cba979..83fd65ff 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -17,6 +17,7 @@ #include #include "vgpu/vgpu.h" +#include "gk20a/ctxsw_trace_gk20a.h" #include "gk20a/hw_fifo_gk20a.h" #include "gk20a/hw_ram_gk20a.h" @@ -629,7 +630,7 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) gk20a_err(dev_from_gk20a(g), "fifo intr (%d) on ch %u", info->type, info->chid); - trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); + gk20a_ctxsw_trace_channel_reset(g, ch); switch (info->type) { case TEGRA_VGPU_FIFO_INTR_PBDMA: diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index 3137c660..76a6b1cc 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h @@ -1367,6 +1367,7 @@ struct nvgpu_as_map_buffer_batch_args { #define NVGPU_CTXSW_TAG_SAVE_END 0x03 #define NVGPU_CTXSW_TAG_RESTORE_START 0x04 #define NVGPU_CTXSW_TAG_CONTEXT_START 0x05 +#define NVGPU_CTXSW_TAG_RESET 0xfe #define NVGPU_CTXSW_TAG_INVALID_TIMESTAMP 0xff #define NVGPU_CTXSW_TAG_LAST \ NVGPU_CTXSW_TAG_INVALID_TIMESTAMP -- cgit v1.2.2