From 467d0b1a19fd703ee10bc183c15ffef83f71a644 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 15 Mar 2017 12:45:08 -0700 Subject: gpu: nvgpu: Don't query engine id for inval engine When we get a PBDMA MMU fault, we won't be able to map the MMU id into an engine id for reset. We still pass FIFO_INVAL_ENGINE_ID to gk20a_fifo_should_defer_engine_reset() which causes an unnecessary debug spew. Check for FIFO_INVAL_ENGINE before calling gk20a_fifo_should_defer_engine_reset(). Change-Id: I6f4a49be194cbc6070c1a1c667059de2ea79790f Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1321492 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index de2c3f9e..2fa939b9 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -1566,21 +1566,25 @@ static bool gk20a_fifo_handle_mmu_fault( tsg = &g->fifo.tsg[ch->tsgid]; /* check if engine reset should be deferred */ - if ((ch || tsg) && gk20a_fifo_should_defer_engine_reset(g, - engine_id, f.engine_subid_v, fake_fault)) { - g->fifo.deferred_fault_engines |= BIT(engine_id); - - /* handled during channel free */ - g->fifo.deferred_reset_pending = true; - gk20a_dbg(gpu_dbg_intr | gpu_dbg_gpu_dbg, - "sm debugger attached," - " deferring channel recovery to channel free"); - } else if (engine_id != FIFO_INVAL_ENGINE_ID) { - /* if lock is already taken, a reset is taking place - so no need to repeat */ - if (nvgpu_mutex_tryacquire(&g->fifo.gr_reset_mutex)) { - gk20a_fifo_reset_engine(g, engine_id); - nvgpu_mutex_release(&g->fifo.gr_reset_mutex); + if (engine_id != FIFO_INVAL_ENGINE_ID) { + bool defer = gk20a_fifo_should_defer_engine_reset(g, + engine_id, f.engine_subid_v, + fake_fault); + if ((ch || tsg) && defer) { + g->fifo.deferred_fault_engines |= BIT(engine_id); + + /* handled during channel free */ + g->fifo.deferred_reset_pending = true; + gk20a_dbg(gpu_dbg_intr | gpu_dbg_gpu_dbg, + "sm debugger attached," + " deferring channel recovery to channel free"); + } else { + /* if lock is already taken, a reset is taking place + so no need to repeat */ + if (nvgpu_mutex_tryacquire(&g->fifo.gr_reset_mutex)) { + gk20a_fifo_reset_engine(g, engine_id); + nvgpu_mutex_release(&g->fifo.gr_reset_mutex); + } } } -- cgit v1.2.2