From 3d343c9eeaa3415851d1c71b8815eb7dc2677b5a Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Mon, 2 Oct 2017 16:13:18 -0700 Subject: gpu: nvgpu: enhance pbdma debug info Enhanced pbdma error output to print pbdma interrupt error. Generated following hw definitions to dump relevant data: pbdma_gp_shadow_0_r pbdma_gp_shadow_1_r Updated gk20a_dump_pbdma_status to dump this additional info: pbdma_gp_put_r pbdma_gp_get_r pbdma_gp_shadow_0_r pbdma_gp_shadow_1_r Bug 2003671 Change-Id: Iaa75d936e00470a2b8d1151f60dbeb741b3f9bce Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1572182 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 41 +++++++++++++++++++--- .../nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h | 8 +++++ .../nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h | 8 +++++ .../nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h | 8 +++++ .../nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h | 8 +++++ 5 files changed, 69 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 6312e74a..9c41c7ef 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -56,6 +56,20 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, bool wait_for_finish); static u32 gk20a_fifo_engines_on_id(struct gk20a *g, u32 id, bool is_tsg); +static const char *const pbdma_intr_fault_type_desc[] = { + "MEMREQ timeout", "MEMACK_TIMEOUT", "MEMACK_EXTRA acks", + "MEMDAT_TIMEOUT", "MEMDAT_EXTRA acks", "MEMFLUSH noack", + "MEMOP noack", "LBCONNECT noack", "NONE - was LBREQ", + "LBACK_TIMEOUT", "LBACK_EXTRA acks", "LBDAT_TIMEOUT", + "LBDAT_EXTRA acks", "GPFIFO won't fit", "GPPTR invalid", + "GPENTRY invalid", "GPCRC mismatch", "PBPTR get>put", + "PBENTRY invld", "PBCRC mismatch", "NONE - was XBARC", + "METHOD invld", "METHODCRC mismat", "DEVICE sw method", + "[ENGINE]", "SEMAPHORE invlid", "ACQUIRE timeout", + "PRI forbidden", "ILLEGAL SYNCPT", "[NO_CTXSW_SEG]", + "PBSEG badsplit", "SIGNATURE bad" +}; + u32 gk20a_fifo_get_engine_ids(struct gk20a *g, u32 engine_id[], u32 engine_id_sz, u32 engine_enum) @@ -2314,21 +2328,33 @@ unsigned int gk20a_fifo_handle_pbdma_intr_0(struct gk20a *g, u32 pbdma_id, struct fifo_gk20a *f = &g->fifo; unsigned int rc_type = RC_TYPE_NO_RC; int i; + unsigned long pbdma_intr_err; + u32 bit; if ((f->intr.pbdma.device_fatal_0 | f->intr.pbdma.channel_fatal_0 | f->intr.pbdma.restartable_0) & pbdma_intr_0) { + + pbdma_intr_err = (unsigned long)pbdma_intr_0; + for_each_set_bit(bit, &pbdma_intr_err, 32) + nvgpu_err(g, "PBDMA intr %s Error", + pbdma_intr_fault_type_desc[bit]); + nvgpu_err(g, "pbdma_intr_0(%d):0x%08x PBH: %08x " - "SHADOW: %08x M0: %08x %08x %08x %08x ", + "SHADOW: %08x gp shadow0: %08x gp shadow1: %08x" + "M0: %08x %08x %08x %08x ", pbdma_id, pbdma_intr_0, gk20a_readl(g, pbdma_pb_header_r(pbdma_id)), gk20a_readl(g, pbdma_hdr_shadow_r(pbdma_id)), + gk20a_readl(g, pbdma_gp_shadow_0_r(pbdma_id)), + gk20a_readl(g, pbdma_gp_shadow_1_r(pbdma_id)), gk20a_readl(g, pbdma_method0_r(pbdma_id)), gk20a_readl(g, pbdma_method1_r(pbdma_id)), gk20a_readl(g, pbdma_method2_r(pbdma_id)), gk20a_readl(g, pbdma_method3_r(pbdma_id)) ); + rc_type = RC_TYPE_PBDMA_FAULT; *handled |= ((f->intr.pbdma.device_fatal_0 | f->intr.pbdma.channel_fatal_0 | @@ -3666,14 +3692,21 @@ void gk20a_dump_pbdma_status(struct gk20a *g, fifo_pbdma_status_next_id_type_v(status) ? "tsg" : "channel", gk20a_decode_pbdma_chan_eng_ctx_status(chan_status)); - gk20a_debug_output(o, "PUT: %016llx GET: %016llx " - "FETCH: %08x HEADER: %08x\n", + gk20a_debug_output(o, "PBDMA_PUT: %016llx PBDMA_GET: %016llx " + "GP_PUT: %08x GP_GET: %08x " + "FETCH: %08x HEADER: %08x\n" + "HDR: %08x SHADOW0: %08x SHADOW1: %08x", (u64)gk20a_readl(g, pbdma_put_r(i)) + ((u64)gk20a_readl(g, pbdma_put_hi_r(i)) << 32ULL), (u64)gk20a_readl(g, pbdma_get_r(i)) + ((u64)gk20a_readl(g, pbdma_get_hi_r(i)) << 32ULL), + gk20a_readl(g, pbdma_gp_put_r(i)), + gk20a_readl(g, pbdma_gp_get_r(i)), gk20a_readl(g, pbdma_gp_fetch_r(i)), - gk20a_readl(g, pbdma_pb_header_r(i))); + gk20a_readl(g, pbdma_pb_header_r(i)), + gk20a_readl(g, pbdma_hdr_shadow_r(i)), + gk20a_readl(g, pbdma_gp_shadow_0_r(i)), + gk20a_readl(g, pbdma_gp_shadow_1_r(i))); } gk20a_debug_output(o, "\n"); } diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h index 8f30654f..338edef2 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h @@ -204,6 +204,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) { return 0x00040118U + i*8192U; } +static inline u32 pbdma_gp_shadow_0_r(u32 i) +{ + return 0x00040110U + i*8192U; +} +static inline u32 pbdma_gp_shadow_1_r(u32 i) +{ + return 0x00040114U + i*8192U; +} static inline u32 pbdma_subdevice_r(u32 i) { return 0x00040094U + i*8192U; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h index 46edf7aa..b8d7bbe4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h @@ -188,6 +188,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) { return 0x00040118U + i*8192U; } +static inline u32 pbdma_gp_shadow_0_r(u32 i) +{ + return 0x00040110U + i*8192U; +} +static inline u32 pbdma_gp_shadow_1_r(u32 i) +{ + return 0x00040114U + i*8192U; +} static inline u32 pbdma_subdevice_r(u32 i) { return 0x00040094U + i*8192U; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h index 15531d53..dad6317d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h @@ -188,6 +188,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) { return 0x00040118U + i*8192U; } +static inline u32 pbdma_gp_shadow_0_r(u32 i) +{ + return 0x00040110U + i*8192U; +} +static inline u32 pbdma_gp_shadow_1_r(u32 i) +{ + return 0x00040114U + i*8192U; +} static inline u32 pbdma_subdevice_r(u32 i) { return 0x00040094U + i*8192U; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h index d49cc95f..4f45f824 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h @@ -188,6 +188,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) { return 0x00040118U + i*8192U; } +static inline u32 pbdma_gp_shadow_0_r(u32 i) +{ + return 0x00040110U + i*8192U; +} +static inline u32 pbdma_gp_shadow_1_r(u32 i) +{ + return 0x00040114U + i*8192U; +} static inline u32 pbdma_subdevice_r(u32 i) { return 0x00040094U + i*8192U; -- cgit v1.2.2