From 34d8421ab4e9ecd0af09f7fefe71b9a1d8781061 Mon Sep 17 00:00:00 2001 From: Srikar Srimath Tirumala Date: Thu, 15 Dec 2016 19:42:42 -0800 Subject: gpu: nvgpu: fix round_rate ops for CCF Make round_rate return max freq when called with a value greater than the max clock frequency. Bug 200233943 Change-Id: Id128611f2d09b17a0a0edfefd4b526fd8c215bce Signed-off-by: Srikar Srimath Tirumala Reviewed-on: http://git-master/r/1272305 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jonathan Hunter Tested-by: Jonathan Hunter GVS: Gerrit_Virtual_Submit Reviewed-by: Peter De Schrijver Reviewed-by: Shreshtha Sahu --- drivers/gpu/nvgpu/clk/clk_common.c | 12 ++++++++++++ drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 4 ++++ 2 files changed, 16 insertions(+) diff --git a/drivers/gpu/nvgpu/clk/clk_common.c b/drivers/gpu/nvgpu/clk/clk_common.c index 346ad12b..529efa15 100644 --- a/drivers/gpu/nvgpu/clk/clk_common.c +++ b/drivers/gpu/nvgpu/clk/clk_common.c @@ -45,6 +45,7 @@ unsigned long gk20a_clk_get_rate(struct gk20a *g) return rate_gpc2clk_to_gpu(clk->gpc_pll.freq); } +#ifdef CONFIG_TEGRA_CLK_FRAMEWORK long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate) { /* make sure the clock is available */ @@ -54,6 +55,17 @@ long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate) return clk_round_rate(clk_get_parent(g->clk.tegra_clk), rate); } +#else +long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate) +{ + /* make sure the clock is available */ + if (!gk20a_clk_get(g)) + return rate; + + return clk_round_rate(g->clk.tegra_clk, rate); +} +#endif + int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate) { return clk_set_rate(g->clk.tegra_clk, rate); diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index 060a5775..b1ea7331 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c @@ -1305,8 +1305,12 @@ static long gm20b_round_rate(struct clk_hw *hw, unsigned long rate, { struct clk_gk20a *clk = to_clk_gk20a(hw); u32 freq, old_freq; + unsigned long maxrate; struct pll tmp_pll; + maxrate = tegra_dvfs_get_maxrate(hw->clk); + gpc_pll_params.max_freq = rate_gpu_to_gpc2clk(maxrate); + mutex_lock(&clk->clk_mutex); old_freq = clk->gpc_pll.freq; freq = rate_gpu_to_gpc2clk(rate); -- cgit v1.2.2