From 1c13da1d29c344cb60953eabeca56b601446c64a Mon Sep 17 00:00:00 2001 From: Amulya Date: Thu, 9 Aug 2018 10:40:08 +0530 Subject: gpu: nvgpu: Changed enum gmmu_pgsz_gk20a into macros Changed the enum gmmu_pgsz_gk20a into macros and changed all the instances of it. The enum gmmu_pgsz_gk20a was being used in for loops, where it was compared with an integer. This violates MISRA rule 10.4, which only allows arithmetic operations on operands of the same essential type category. Changing this enum into macro will fix this violation. JIRA NVGPU-993 Change-Id: I6f18b08bc7548093d99e8229378415bcdec749e3 Signed-off-by: Amulya Reviewed-on: https://git-master.nvidia.com/r/1795593 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/mm/buddy_allocator.c | 12 ++++----- drivers/gpu/nvgpu/common/mm/gmmu.c | 14 +++++------ drivers/gpu/nvgpu/common/mm/mm.c | 26 +++++++++---------- drivers/gpu/nvgpu/common/mm/vm.c | 32 +++++++++++------------- drivers/gpu/nvgpu/common/mm/vm_area.c | 10 ++++---- drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gk20a.h | 4 +-- drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 18 ++++++------- drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 14 +++++------ drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 19 +++++++------- drivers/gpu/nvgpu/include/nvgpu/gmmu.h | 15 +++++------ drivers/gpu/nvgpu/include/nvgpu/mm.h | 4 +-- drivers/gpu/nvgpu/include/nvgpu/vm.h | 8 +++--- drivers/gpu/nvgpu/include/nvgpu/vm_area.h | 2 +- drivers/gpu/nvgpu/os/linux/ioctl_as.c | 2 +- drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c | 12 ++++----- drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h | 2 +- drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 30 +++++++++++----------- drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c | 10 ++++---- drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c | 6 ++--- drivers/gpu/nvgpu/vgpu/mm_vgpu.c | 2 +- drivers/gpu/nvgpu/vgpu/mm_vgpu.h | 2 +- 22 files changed, 118 insertions(+), 128 deletions(-) diff --git a/drivers/gpu/nvgpu/common/mm/buddy_allocator.c b/drivers/gpu/nvgpu/common/mm/buddy_allocator.c index 365f3b7b..f8c97839 100644 --- a/drivers/gpu/nvgpu/common/mm/buddy_allocator.c +++ b/drivers/gpu/nvgpu/common/mm/buddy_allocator.c @@ -142,7 +142,7 @@ static void __balloc_buddy_list_add(struct nvgpu_buddy_allocator *a, * without cycling through the entire list. */ if (a->flags & GPU_ALLOC_GVA_SPACE && - b->pte_size == gmmu_page_size_big) { + b->pte_size == GMMU_PAGE_SIZE_BIG) { nvgpu_list_add_tail(&b->buddy_entry, list); } else { nvgpu_list_add(&b->buddy_entry, list); @@ -487,7 +487,7 @@ static struct nvgpu_buddy *__balloc_find_buddy(struct nvgpu_buddy_allocator *a, } if (a->flags & GPU_ALLOC_GVA_SPACE && - pte_size == gmmu_page_size_big) { + pte_size == GMMU_PAGE_SIZE_BIG) { bud = nvgpu_list_last_entry(balloc_get_order_list(a, order), nvgpu_buddy, buddy_entry); } else { @@ -844,8 +844,8 @@ static u64 nvgpu_buddy_balloc(struct nvgpu_allocator *__a, u64 len) alloc_dbg(balloc_owner(a), "Alloc 0x%-10llx %3lld:0x%-10llx pte_size=%s", addr, order, len, - pte_size == gmmu_page_size_big ? "big" : - pte_size == gmmu_page_size_small ? "small" : + pte_size == GMMU_PAGE_SIZE_BIG ? "big" : + pte_size == GMMU_PAGE_SIZE_SMALL ? "small" : "NA/any"); } else { alloc_dbg(balloc_owner(a), "Alloc failed: no mem!"); @@ -882,9 +882,9 @@ static u64 __nvgpu_balloc_fixed_buddy(struct nvgpu_allocator *__a, /* Check that the page size is valid. */ if (a->flags & GPU_ALLOC_GVA_SPACE && a->vm->big_pages) { if (page_size == a->vm->big_page_size) { - pte_size = gmmu_page_size_big; + pte_size = GMMU_PAGE_SIZE_BIG; } else if (page_size == SZ_4K) { - pte_size = gmmu_page_size_small; + pte_size = GMMU_PAGE_SIZE_SMALL; } else { goto fail; } diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c index 73a37b57..02273393 100644 --- a/drivers/gpu/nvgpu/common/mm/gmmu.c +++ b/drivers/gpu/nvgpu/common/mm/gmmu.c @@ -109,7 +109,7 @@ static u64 __nvgpu_gmmu_map(struct vm_gk20a *vm, sgt, /* sg list */ 0, /* sg offset */ size, - gmmu_page_size_kernel, + GMMU_PAGE_SIZE_KERNEL, 0, /* kind */ 0, /* ctag_offset */ flags, rw_flag, @@ -169,7 +169,7 @@ void nvgpu_gmmu_unmap(struct vm_gk20a *vm, struct nvgpu_mem *mem, u64 gpu_va) g->ops.mm.gmmu_unmap(vm, gpu_va, mem->size, - gmmu_page_size_kernel, + GMMU_PAGE_SIZE_KERNEL, mem->free_gpu_va, gk20a_mem_flag_none, false, @@ -609,8 +609,8 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm, /* note: here we need to map kernel to small, since the * low-level mmu code assumes 0 is small and 1 is big pages */ - if (attrs->pgsz == gmmu_page_size_kernel) { - attrs->pgsz = gmmu_page_size_small; + if (attrs->pgsz == GMMU_PAGE_SIZE_KERNEL) { + attrs->pgsz = GMMU_PAGE_SIZE_SMALL; } page_size = vm->gmmu_page_sizes[attrs->pgsz]; @@ -676,7 +676,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm, struct nvgpu_sgt *sgt, u64 buffer_offset, u64 size, - int pgsz_idx, + u32 pgsz_idx, u8 kind_v, u32 ctag_offset, u32 flags, @@ -764,7 +764,7 @@ fail_alloc: void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm, u64 vaddr, u64 size, - int pgsz_idx, + u32 pgsz_idx, bool va_allocated, enum gk20a_mem_rw_flag rw_flag, bool sparse, @@ -865,7 +865,7 @@ static int __nvgpu_locate_pte(struct gk20a *g, struct vm_gk20a *vm, attrs->pgsz = l->get_pgsz(g, l, pd, pd_idx); - if (attrs->pgsz >= gmmu_nr_page_sizes) { + if (attrs->pgsz >= GMMU_NR_PAGE_SIZES) { return -EINVAL; } diff --git a/drivers/gpu/nvgpu/common/mm/mm.c b/drivers/gpu/nvgpu/common/mm/mm.c index 2e46e211..6be619ed 100644 --- a/drivers/gpu/nvgpu/common/mm/mm.c +++ b/drivers/gpu/nvgpu/common/mm/mm.c @@ -34,14 +34,14 @@ * Attempt to find a reserved memory area to determine PTE size for the passed * mapping. If no reserved area can be found use small pages. */ -enum gmmu_pgsz_gk20a __get_pte_size_fixed_map(struct vm_gk20a *vm, +u32 __get_pte_size_fixed_map(struct vm_gk20a *vm, u64 base, u64 size) { struct nvgpu_vm_area *vm_area; vm_area = nvgpu_vm_area_find(vm, base); if (!vm_area) { - return gmmu_page_size_small; + return GMMU_PAGE_SIZE_SMALL; } return vm_area->pgsz_idx; @@ -50,19 +50,19 @@ enum gmmu_pgsz_gk20a __get_pte_size_fixed_map(struct vm_gk20a *vm, /* * This is for when the address space does not support unified address spaces. */ -static enum gmmu_pgsz_gk20a __get_pte_size_split_addr(struct vm_gk20a *vm, +static u32 __get_pte_size_split_addr(struct vm_gk20a *vm, u64 base, u64 size) { if (!base) { - if (size >= vm->gmmu_page_sizes[gmmu_page_size_big]) { - return gmmu_page_size_big; + if (size >= vm->gmmu_page_sizes[GMMU_PAGE_SIZE_BIG]) { + return GMMU_PAGE_SIZE_BIG; } - return gmmu_page_size_small; + return GMMU_PAGE_SIZE_SMALL; } else { if (base < __nv_gmmu_va_small_page_limit()) { - return gmmu_page_size_small; + return GMMU_PAGE_SIZE_SMALL; } else { - return gmmu_page_size_big; + return GMMU_PAGE_SIZE_BIG; } } } @@ -88,12 +88,12 @@ static enum gmmu_pgsz_gk20a __get_pte_size_split_addr(struct vm_gk20a *vm, * - Regardless of buffer size use small pages since we have no * - guarantee of contiguity. */ -enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size) +u32 __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size) { struct gk20a *g = gk20a_from_vm(vm); if (!vm->big_pages) { - return gmmu_page_size_small; + return GMMU_PAGE_SIZE_SMALL; } if (!nvgpu_is_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES)) { @@ -104,11 +104,11 @@ enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size) return __get_pte_size_fixed_map(vm, base, size); } - if (size >= vm->gmmu_page_sizes[gmmu_page_size_big] && + if (size >= vm->gmmu_page_sizes[GMMU_PAGE_SIZE_BIG] && nvgpu_iommuable(g)) { - return gmmu_page_size_big; + return GMMU_PAGE_SIZE_BIG; } - return gmmu_page_size_small; + return GMMU_PAGE_SIZE_SMALL; } int nvgpu_mm_suspend(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/common/mm/vm.c b/drivers/gpu/nvgpu/common/mm/vm.c index 7d97b7b7..bd6c1e87 100644 --- a/drivers/gpu/nvgpu/common/mm/vm.c +++ b/drivers/gpu/nvgpu/common/mm/vm.c @@ -41,7 +41,7 @@ struct nvgpu_ctag_buffer_info { u64 size; - enum gmmu_pgsz_gk20a pgsz_idx; + u32 pgsz_idx; u32 flags; s16 compr_kind; @@ -123,8 +123,7 @@ static void nvgpu_vm_free_entries(struct vm_gk20a *vm, pdb->entries = NULL; } -u64 __nvgpu_vm_alloc_va(struct vm_gk20a *vm, u64 size, - enum gmmu_pgsz_gk20a pgsz_idx) +u64 __nvgpu_vm_alloc_va(struct vm_gk20a *vm, u64 size, u32 pgsz_idx) { struct gk20a *g = vm->mm->g; @@ -139,12 +138,12 @@ u64 __nvgpu_vm_alloc_va(struct vm_gk20a *vm, u64 size, return 0; } - if (pgsz_idx >= gmmu_nr_page_sizes) { + if (pgsz_idx >= GMMU_NR_PAGE_SIZES) { nvgpu_err(g, "(%s) invalid page size requested", vma->name); return 0; } - if ((pgsz_idx == gmmu_page_size_big) && !vm->big_pages) { + if ((pgsz_idx == GMMU_PAGE_SIZE_BIG) && !vm->big_pages) { nvgpu_err(g, "(%s) unsupportd page size requested", vma->name); return 0; } @@ -161,8 +160,7 @@ u64 __nvgpu_vm_alloc_va(struct vm_gk20a *vm, u64 size, return addr; } -int __nvgpu_vm_free_va(struct vm_gk20a *vm, u64 addr, - enum gmmu_pgsz_gk20a pgsz_idx) +int __nvgpu_vm_free_va(struct vm_gk20a *vm, u64 addr, u32 pgsz_idx) { struct nvgpu_allocator *vma = vm->vma[pgsz_idx]; @@ -264,7 +262,7 @@ static int nvgpu_init_sema_pool(struct vm_gk20a *vm) err = nvgpu_semaphore_pool_map(vm->sema_pool, vm); if (err) { nvgpu_semaphore_pool_unmap(vm->sema_pool, vm); - nvgpu_free(vm->vma[gmmu_page_size_small], + nvgpu_free(vm->vma[GMMU_PAGE_SIZE_SMALL], vm->sema_pool->gpu_va); return err; } @@ -308,22 +306,22 @@ int __nvgpu_vm_init(struct mm_gk20a *mm, vm->mm = mm; - vm->gmmu_page_sizes[gmmu_page_size_small] = SZ_4K; - vm->gmmu_page_sizes[gmmu_page_size_big] = big_page_size; - vm->gmmu_page_sizes[gmmu_page_size_kernel] = SZ_4K; + vm->gmmu_page_sizes[GMMU_PAGE_SIZE_SMALL] = SZ_4K; + vm->gmmu_page_sizes[GMMU_PAGE_SIZE_BIG] = big_page_size; + vm->gmmu_page_sizes[GMMU_PAGE_SIZE_KERNEL] = SZ_4K; /* Set up vma pointers. */ - vm->vma[gmmu_page_size_small] = &vm->user; - vm->vma[gmmu_page_size_big] = &vm->user; - vm->vma[gmmu_page_size_kernel] = &vm->kernel; + vm->vma[GMMU_PAGE_SIZE_SMALL] = &vm->user; + vm->vma[GMMU_PAGE_SIZE_BIG] = &vm->user; + vm->vma[GMMU_PAGE_SIZE_KERNEL] = &vm->kernel; if (!nvgpu_is_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES)) { - vm->vma[gmmu_page_size_big] = &vm->user_lp; + vm->vma[GMMU_PAGE_SIZE_BIG] = &vm->user_lp; } vm->va_start = low_hole; vm->va_limit = aperture_size; - vm->big_page_size = vm->gmmu_page_sizes[gmmu_page_size_big]; + vm->big_page_size = vm->gmmu_page_sizes[GMMU_PAGE_SIZE_BIG]; vm->userspace_managed = userspace_managed; vm->mmu_levels = g->ops.mm.get_mmu_levels(g, vm->big_page_size); @@ -876,7 +874,7 @@ struct nvgpu_mapped_buf *nvgpu_vm_map(struct vm_gk20a *vm, align = nvgpu_sgt_alignment(g, sgt); if (g->mm.disable_bigpage) { - binfo.pgsz_idx = gmmu_page_size_small; + binfo.pgsz_idx = GMMU_PAGE_SIZE_SMALL; } else { binfo.pgsz_idx = __get_pte_size(vm, map_addr, min_t(u64, binfo.size, align)); diff --git a/drivers/gpu/nvgpu/common/mm/vm_area.c b/drivers/gpu/nvgpu/common/mm/vm_area.c index b8fecbfc..7e2b5c34 100644 --- a/drivers/gpu/nvgpu/common/mm/vm_area.c +++ b/drivers/gpu/nvgpu/common/mm/vm_area.c @@ -43,7 +43,7 @@ struct nvgpu_vm_area *nvgpu_vm_area_find(struct vm_gk20a *vm, u64 addr) } int nvgpu_vm_area_validate_buffer(struct vm_gk20a *vm, - u64 map_addr, u64 map_size, int pgsz_idx, + u64 map_addr, u64 map_size, u32 pgsz_idx, struct nvgpu_vm_area **pvm_area) { struct gk20a *g = vm->mm->g; @@ -99,19 +99,19 @@ int nvgpu_vm_area_alloc(struct vm_gk20a *vm, u32 pages, u32 page_size, struct nvgpu_allocator *vma; struct nvgpu_vm_area *vm_area; u64 vaddr_start = 0; - int pgsz_idx = gmmu_page_size_small; + u32 pgsz_idx = GMMU_PAGE_SIZE_SMALL; nvgpu_log(g, gpu_dbg_map, "ADD vm_area: pgsz=%#-8x pages=%-9u addr=%#-14llx flags=0x%x", page_size, pages, *addr, flags); - for (; pgsz_idx < gmmu_nr_page_sizes; pgsz_idx++) { + for (; pgsz_idx < GMMU_NR_PAGE_SIZES; pgsz_idx++) { if (vm->gmmu_page_sizes[pgsz_idx] == page_size) { break; } } - if (pgsz_idx > gmmu_page_size_big) { + if (pgsz_idx > GMMU_PAGE_SIZE_BIG) { return -EINVAL; } @@ -122,7 +122,7 @@ int nvgpu_vm_area_alloc(struct vm_gk20a *vm, u32 pages, u32 page_size, */ nvgpu_speculation_barrier(); - if (!vm->big_pages && pgsz_idx == gmmu_page_size_big) { + if (!vm->big_pages && pgsz_idx == GMMU_PAGE_SIZE_BIG) { return -EINVAL; } diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 8d6c3b70..77458917 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c @@ -120,7 +120,7 @@ int channel_gk20a_commit_va(struct channel_gk20a *c) nvgpu_log_fn(g, " "); g->ops.mm.init_inst_block(&c->inst_block, c->vm, - c->vm->gmmu_page_sizes[gmmu_page_size_big]); + c->vm->gmmu_page_sizes[GMMU_PAGE_SIZE_BIG]); return 0; } diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 262dbb2c..5300f7dd 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -921,7 +921,7 @@ struct gpu_ops { struct nvgpu_sgt *sgt, u64 buffer_offset, u64 size, - int pgsz_idx, + u32 pgsz_idx, u8 kind_v, u32 ctag_offset, u32 flags, @@ -934,7 +934,7 @@ struct gpu_ops { void (*gmmu_unmap)(struct vm_gk20a *vm, u64 vaddr, u64 size, - int pgsz_idx, + u32 pgsz_idx, bool va_allocated, enum gk20a_mem_rw_flag rw_flag, bool sparse, diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index ee63489e..b5626035 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c @@ -158,8 +158,8 @@ static void update_gmmu_pde_locked(struct vm_gk20a *vm, u32 pd_offset = pd_offset_from_index(l, pd_idx); u32 pde_v[2] = {0, 0}; - small_valid = attrs->pgsz == gmmu_page_size_small; - big_valid = attrs->pgsz == gmmu_page_size_big; + small_valid = attrs->pgsz == GMMU_PAGE_SIZE_SMALL; + big_valid = attrs->pgsz == GMMU_PAGE_SIZE_BIG; pde_v[0] = gmmu_pde_size_full_f(); pde_v[0] |= big_valid ? @@ -283,24 +283,22 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm, pd_write(g, pd, pd_offset + 1, pte_w[1]); } -enum gmmu_pgsz_gk20a gk20a_get_pde_pgsz(struct gk20a *g, - const struct gk20a_mmu_level *l, - struct nvgpu_gmmu_pd *pd, u32 pd_idx) +u32 gk20a_get_pde_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l, + struct nvgpu_gmmu_pd *pd, u32 pd_idx) { /* * big and small page sizes are the same */ - return gmmu_page_size_small; + return GMMU_PAGE_SIZE_SMALL; } -enum gmmu_pgsz_gk20a gk20a_get_pte_pgsz(struct gk20a *g, - const struct gk20a_mmu_level *l, - struct nvgpu_gmmu_pd *pd, u32 pd_idx) +u32 gk20a_get_pte_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l, + struct nvgpu_gmmu_pd *pd, u32 pd_idx) { /* * return invalid */ - return gmmu_nr_page_sizes; + return GMMU_NR_PAGE_SIZES; } const struct gk20a_mmu_level gk20a_mm_levels_64k[] = { diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index b99603bb..0827d355 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h @@ -139,7 +139,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm, struct nvgpu_sgt *sgt, u64 buffer_offset, u64 size, - int pgsz_idx, + u32 pgsz_idx, u8 kind_v, u32 ctag_offset, u32 flags, @@ -153,7 +153,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm, void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm, u64 vaddr, u64 size, - int pgsz_idx, + u32 pgsz_idx, bool va_allocated, enum gk20a_mem_rw_flag rw_flag, bool sparse, @@ -178,10 +178,8 @@ void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *mem, extern const struct gk20a_mmu_level gk20a_mm_levels_64k[]; extern const struct gk20a_mmu_level gk20a_mm_levels_128k[]; -enum gmmu_pgsz_gk20a gk20a_get_pde_pgsz(struct gk20a *g, - const struct gk20a_mmu_level *l, - struct nvgpu_gmmu_pd *pd, u32 pd_idx); -enum gmmu_pgsz_gk20a gk20a_get_pte_pgsz(struct gk20a *g, - const struct gk20a_mmu_level *l, - struct nvgpu_gmmu_pd *pd, u32 pd_idx); +u32 gk20a_get_pde_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l, + struct nvgpu_gmmu_pd *pd, u32 pd_idx); +u32 gk20a_get_pte_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l, + struct nvgpu_gmmu_pd *pd, u32 pd_idx); #endif /* MM_GK20A_H */ diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index 75ae3d04..5a24adc0 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c @@ -126,8 +126,8 @@ static void update_gmmu_pde0_locked(struct vm_gk20a *vm, u32 pd_offset = pd_offset_from_index(l, pd_idx); u32 pde_v[4] = {0, 0, 0, 0}; - small_valid = attrs->pgsz == gmmu_page_size_small; - big_valid = attrs->pgsz == gmmu_page_size_big; + small_valid = attrs->pgsz == GMMU_PAGE_SIZE_SMALL; + big_valid = attrs->pgsz == GMMU_PAGE_SIZE_BIG; if (small_valid) small_addr = phys_addr >> gmmu_new_dual_pde_address_shift_v(); @@ -274,15 +274,14 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm, * level having a different number of entries depending on whether it holds * big pages or small pages. */ -static enum gmmu_pgsz_gk20a gp10b_get_pde0_pgsz(struct gk20a *g, - const struct gk20a_mmu_level *l, - struct nvgpu_gmmu_pd *pd, u32 pd_idx) +static u32 gp10b_get_pde0_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l, + struct nvgpu_gmmu_pd *pd, u32 pd_idx) { u32 pde_base = pd->mem_offs / sizeof(u32); u32 pde_offset = pde_base + pd_offset_from_index(l, pd_idx); u32 pde_v[GP10B_PDE0_ENTRY_SIZE >> 2]; u32 i; - enum gmmu_pgsz_gk20a pgsz = gmmu_nr_page_sizes; + u32 pgsz = GMMU_NR_PAGE_SIZES; if (!pd->mem) return pgsz; @@ -302,7 +301,7 @@ static enum gmmu_pgsz_gk20a gp10b_get_pde0_pgsz(struct gk20a *g, gmmu_new_dual_pde_address_shift_v(); if (addr) - pgsz = gmmu_page_size_small; + pgsz = GMMU_PAGE_SIZE_SMALL; } if (pde_v[0] & (gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f() | @@ -318,12 +317,12 @@ static enum gmmu_pgsz_gk20a gp10b_get_pde0_pgsz(struct gk20a *g, * both small and big to be set, the PDE is not valid * and may be corrupted */ - if (pgsz == gmmu_page_size_small) { + if (pgsz == GMMU_PAGE_SIZE_SMALL) { nvgpu_err(g, "both small and big apertures enabled"); - return gmmu_nr_page_sizes; + return GMMU_NR_PAGE_SIZES; } - pgsz = gmmu_page_size_big; + pgsz = GMMU_PAGE_SIZE_BIG; } } diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h index 886a79da..a83b0dd8 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h @@ -38,12 +38,10 @@ struct vm_gk20a; struct nvgpu_mem; -enum gmmu_pgsz_gk20a { - gmmu_page_size_small = 0, - gmmu_page_size_big = 1, - gmmu_page_size_kernel = 2, - gmmu_nr_page_sizes = 3, -}; +#define GMMU_PAGE_SIZE_SMALL 0U +#define GMMU_PAGE_SIZE_BIG 1U +#define GMMU_PAGE_SIZE_KERNEL 2U +#define GMMU_NR_PAGE_SIZES 3U enum gk20a_mem_rw_flag { gk20a_mem_flag_none = 0, /* RW */ @@ -197,9 +195,8 @@ struct gk20a_mmu_level { /* * Get pde page size */ - enum gmmu_pgsz_gk20a (*get_pgsz)(struct gk20a *g, - const struct gk20a_mmu_level *l, - struct nvgpu_gmmu_pd *pd, u32 pd_idx); + u32 (*get_pgsz)(struct gk20a *g, const struct gk20a_mmu_level *l, + struct nvgpu_gmmu_pd *pd, u32 pd_idx); }; static inline const char *nvgpu_gmmu_perm_str(enum gk20a_mem_rw_flag p) diff --git a/drivers/gpu/nvgpu/include/nvgpu/mm.h b/drivers/gpu/nvgpu/include/nvgpu/mm.h index 3a1b2a6c..e627296d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/mm.h +++ b/drivers/gpu/nvgpu/include/nvgpu/mm.h @@ -204,9 +204,9 @@ static inline u64 __nv_gmmu_va_small_page_limit(void) return ((u64)SZ_1G * 56); } -enum gmmu_pgsz_gk20a __get_pte_size_fixed_map(struct vm_gk20a *vm, +u32 __get_pte_size_fixed_map(struct vm_gk20a *vm, u64 base, u64 size); -enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size); +u32 __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size); void nvgpu_init_mm_ce_context(struct gk20a *g); int nvgpu_init_mm_support(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/include/nvgpu/vm.h b/drivers/gpu/nvgpu/include/nvgpu/vm.h index 30a2d71d..ad8c7cca 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/vm.h +++ b/drivers/gpu/nvgpu/include/nvgpu/vm.h @@ -172,7 +172,7 @@ struct vm_gk20a { * not. vma[] allows the code to be agnostic to this by always using * address spaces through this pointer array. */ - struct nvgpu_allocator *vma[gmmu_nr_page_sizes]; + struct nvgpu_allocator *vma[GMMU_NR_PAGE_SIZES]; struct nvgpu_allocator kernel; struct nvgpu_allocator user; struct nvgpu_allocator user_lp; @@ -184,7 +184,7 @@ struct vm_gk20a { #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION u64 handle; #endif - u32 gmmu_page_sizes[gmmu_nr_page_sizes]; + u32 gmmu_page_sizes[GMMU_NR_PAGE_SIZES]; /* if non-NULL, kref_put will use this batch when unmapping. Must hold vm->update_gmmu_lock. */ @@ -322,8 +322,8 @@ struct vm_gk20a *nvgpu_vm_init(struct gk20a *g, * will be used by the vgpu code. */ u64 __nvgpu_vm_alloc_va(struct vm_gk20a *vm, u64 size, - enum gmmu_pgsz_gk20a pgsz_idx); + u32 pgsz_idx); int __nvgpu_vm_free_va(struct vm_gk20a *vm, u64 addr, - enum gmmu_pgsz_gk20a pgsz_idx); + u32 pgsz_idx); #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/vm_area.h b/drivers/gpu/nvgpu/include/nvgpu/vm_area.h index 92852633..a055ada3 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/vm_area.h +++ b/drivers/gpu/nvgpu/include/nvgpu/vm_area.h @@ -69,7 +69,7 @@ int nvgpu_vm_area_free(struct vm_gk20a *vm, u64 addr); struct nvgpu_vm_area *nvgpu_vm_area_find(struct vm_gk20a *vm, u64 addr); int nvgpu_vm_area_validate_buffer(struct vm_gk20a *vm, - u64 map_offset, u64 map_size, int pgsz_idx, + u64 map_offset, u64 map_size, u32 pgsz_idx, struct nvgpu_vm_area **pvm_area); #endif diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_as.c b/drivers/gpu/nvgpu/os/linux/ioctl_as.c index 5eb9802f..7d1d618e 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_as.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_as.c @@ -230,7 +230,7 @@ static int gk20a_as_ioctl_get_va_regions( struct nvgpu_as_va_region __user *user_region_ptr; struct vm_gk20a *vm = as_share->vm; struct gk20a *g = gk20a_from_vm(vm); - unsigned int page_sizes = gmmu_page_size_kernel; + unsigned int page_sizes = GMMU_PAGE_SIZE_KERNEL; nvgpu_log_fn(g, " "); diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c index e7bd0a49..6017046f 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c @@ -53,7 +53,7 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, struct nvgpu_sgt *sgt, u64 buffer_offset, u64 size, - int pgsz_idx, + u32 pgsz_idx, u8 kind_v, u32 ctag_offset, u32 flags, @@ -147,12 +147,12 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, else prot = TEGRA_VGPU_MAP_PROT_NONE; - if (pgsz_idx == gmmu_page_size_kernel) { - if (page_size == vm->gmmu_page_sizes[gmmu_page_size_small]) { - pgsz_idx = gmmu_page_size_small; + if (pgsz_idx == GMMU_PAGE_SIZE_KERNEL) { + if (page_size == vm->gmmu_page_sizes[GMMU_PAGE_SIZE_SMALL]) { + pgsz_idx = GMMU_PAGE_SIZE_SMALL; } else if (page_size == - vm->gmmu_page_sizes[gmmu_page_size_big]) { - pgsz_idx = gmmu_page_size_big; + vm->gmmu_page_sizes[GMMU_PAGE_SIZE_BIG]) { + pgsz_idx = GMMU_PAGE_SIZE_BIG; } else { nvgpu_err(g, "invalid kernel page size %d", page_size); diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h index 9435b75f..704c400e 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h @@ -30,7 +30,7 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, struct nvgpu_sgt *sgt, u64 buffer_offset, u64 size, - int pgsz_idx, + u32 pgsz_idx, u8 kind_v, u32 ctag_offset, u32 flags, diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index 0077c537..fa64cb82 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c @@ -192,7 +192,7 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, /* Circular Buffer */ gpu_va = __nvgpu_vm_alloc_va(ch_vm, gr->global_ctx_buffer[CIRCULAR].mem.size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!gpu_va) goto clean_up; @@ -202,7 +202,7 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, /* Attribute Buffer */ gpu_va = __nvgpu_vm_alloc_va(ch_vm, gr->global_ctx_buffer[ATTRIBUTE].mem.size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!gpu_va) goto clean_up; @@ -212,7 +212,7 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, /* Page Pool */ gpu_va = __nvgpu_vm_alloc_va(ch_vm, gr->global_ctx_buffer[PAGEPOOL].mem.size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!gpu_va) goto clean_up; g_bfr_va[PAGEPOOL_VA] = gpu_va; @@ -221,7 +221,7 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, /* Priv register Access Map */ gpu_va = __nvgpu_vm_alloc_va(ch_vm, gr->global_ctx_buffer[PRIV_ACCESS_MAP].mem.size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!gpu_va) goto clean_up; g_bfr_va[PRIV_ACCESS_MAP_VA] = gpu_va; @@ -232,7 +232,7 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, #ifdef CONFIG_GK20A_CTXSW_TRACE gpu_va = __nvgpu_vm_alloc_va(ch_vm, gr->global_ctx_buffer[FECS_TRACE_BUFFER].mem.size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!gpu_va) goto clean_up; @@ -262,7 +262,7 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, for (i = 0; i < NR_GLOBAL_CTX_BUF_VA; i++) { if (g_bfr_va[i]) { __nvgpu_vm_free_va(ch_vm, g_bfr_va[i], - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); g_bfr_va[i] = 0; } } @@ -285,7 +285,7 @@ static void vgpu_gr_unmap_global_ctx_buffers(struct tsg_gk20a *tsg) for (i = 0; i < NR_GLOBAL_CTX_BUF_VA; i++) { if (g_bfr_va[i]) { __nvgpu_vm_free_va(ch_vm, g_bfr_va[i], - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); g_bfr_va[i] = 0; g_bfr_size[i] = 0; } @@ -317,7 +317,7 @@ int vgpu_gr_alloc_gr_ctx(struct gk20a *g, gr_ctx->mem.gpu_va = __nvgpu_vm_alloc_va(vm, gr->ctx_vars.buffer_total_size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!gr_ctx->mem.gpu_va) return -ENOMEM; @@ -336,7 +336,7 @@ int vgpu_gr_alloc_gr_ctx(struct gk20a *g, if (unlikely(err)) { nvgpu_err(g, "fail to alloc gr_ctx"); __nvgpu_vm_free_va(vm, gr_ctx->mem.gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); gr_ctx->mem.aperture = APERTURE_INVALID; } else { gr_ctx->virt_ctx = p->gr_ctx_handle; @@ -365,7 +365,7 @@ static int vgpu_gr_alloc_channel_patch_ctx(struct gk20a *g, patch_ctx->mem.size = 128 * sizeof(u32); patch_ctx->mem.gpu_va = __nvgpu_vm_alloc_va(ch_vm, patch_ctx->mem.size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!patch_ctx->mem.gpu_va) return -ENOMEM; @@ -376,7 +376,7 @@ static int vgpu_gr_alloc_channel_patch_ctx(struct gk20a *g, err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); if (err || msg.ret) { __nvgpu_vm_free_va(ch_vm, patch_ctx->mem.gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); err = -ENOMEM; } @@ -394,7 +394,7 @@ static void vgpu_gr_free_channel_patch_ctx(struct tsg_gk20a *tsg) /* server will free on channel close */ __nvgpu_vm_free_va(tsg->vm, patch_ctx->mem.gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); patch_ctx->mem.gpu_va = 0; } } @@ -414,7 +414,7 @@ static void vgpu_gr_free_channel_pm_ctx(struct tsg_gk20a *tsg) /* server will free on channel close */ __nvgpu_vm_free_va(tsg->vm, pm_ctx->mem.gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); pm_ctx->mem.gpu_va = 0; } @@ -437,7 +437,7 @@ void vgpu_gr_free_gr_ctx(struct gk20a *g, WARN_ON(err || msg.ret); __nvgpu_vm_free_va(vm, gr_ctx->mem.gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); tsg = &g->fifo.tsg[gr_ctx->tsgid]; vgpu_gr_unmap_global_ctx_buffers(tsg); @@ -1120,7 +1120,7 @@ int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g, if (pm_ctx->mem.gpu_va == 0) { pm_ctx->mem.gpu_va = __nvgpu_vm_alloc_va(ch->vm, g->gr.ctx_vars.pm_ctxsw_image_size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!pm_ctx->mem.gpu_va) return -ENOMEM; diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c index e718a30d..43cff1c0 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c @@ -43,7 +43,7 @@ static int set_syncpt_ro_map_gpu_va_locked(struct vm_gk20a *vm) vm->syncpt_ro_map_gpu_va = __nvgpu_vm_alloc_va(vm, g->syncpt_unit_size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!vm->syncpt_ro_map_gpu_va) { nvgpu_err(g, "allocating read-only va space failed"); return -ENOMEM; @@ -63,7 +63,7 @@ static int set_syncpt_ro_map_gpu_va_locked(struct vm_gk20a *vm) "mapping read-only va space failed err %d", err); __nvgpu_vm_free_va(vm, vm->syncpt_ro_map_gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); vm->syncpt_ro_map_gpu_va = 0; return err; } @@ -91,7 +91,7 @@ int vgpu_gv11b_fifo_alloc_syncpt_buf(struct channel_gk20a *c, return err; syncpt_buf->gpu_va = __nvgpu_vm_alloc_va(c->vm, g->syncpt_size, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!syncpt_buf->gpu_va) { nvgpu_err(g, "allocating syncpt va space failed"); return -ENOMEM; @@ -110,7 +110,7 @@ int vgpu_gv11b_fifo_alloc_syncpt_buf(struct channel_gk20a *c, if (err) { nvgpu_err(g, "mapping syncpt va space failed err %d", err); __nvgpu_vm_free_va(c->vm, syncpt_buf->gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); return err; } @@ -121,7 +121,7 @@ void vgpu_gv11b_fifo_free_syncpt_buf(struct channel_gk20a *c, struct nvgpu_mem *syncpt_buf) { nvgpu_gmmu_unmap(c->vm, syncpt_buf, syncpt_buf->gpu_va); - __nvgpu_vm_free_va(c->vm, syncpt_buf->gpu_va, gmmu_page_size_kernel); + __nvgpu_vm_free_va(c->vm, syncpt_buf->gpu_va, GMMU_PAGE_SIZE_KERNEL); nvgpu_dma_free(c->g, syncpt_buf); } diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c index 2372b9c4..b536d15e 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c @@ -40,7 +40,7 @@ int vgpu_gv11b_alloc_subctx_header(struct channel_gk20a *c) p->ch_handle = c->virt_ctx; p->ctx_header_va = __nvgpu_vm_alloc_va(c->vm, ctxsw_prog_fecs_header_v(), - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); if (!p->ctx_header_va) { nvgpu_err(c->g, "alloc va failed for ctx_header"); return -ENOMEM; @@ -50,7 +50,7 @@ int vgpu_gv11b_alloc_subctx_header(struct channel_gk20a *c) if (unlikely(err)) { nvgpu_err(c->g, "alloc ctx_header failed err %d", err); __nvgpu_vm_free_va(c->vm, p->ctx_header_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); return err; } ctx->mem.gpu_va = p->ctx_header_va; @@ -75,7 +75,7 @@ void vgpu_gv11b_free_subctx_header(struct channel_gk20a *c) if (unlikely(err)) nvgpu_err(c->g, "free ctx_header failed err %d", err); __nvgpu_vm_free_va(c->vm, ctx->mem.gpu_va, - gmmu_page_size_kernel); + GMMU_PAGE_SIZE_KERNEL); ctx->mem.gpu_va = 0; } } diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c index 54b1e7c2..229a9767 100644 --- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c @@ -84,7 +84,7 @@ int vgpu_init_mm_support(struct gk20a *g) void vgpu_locked_gmmu_unmap(struct vm_gk20a *vm, u64 vaddr, u64 size, - int pgsz_idx, + u32 pgsz_idx, bool va_allocated, enum gk20a_mem_rw_flag rw_flag, bool sparse, diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.h b/drivers/gpu/nvgpu/vgpu/mm_vgpu.h index e8f40d5c..41bae96d 100644 --- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.h +++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.h @@ -33,7 +33,7 @@ enum gk20a_mem_rw_flag; void vgpu_locked_gmmu_unmap(struct vm_gk20a *vm, u64 vaddr, u64 size, - int pgsz_idx, + u32 pgsz_idx, bool va_allocated, enum gk20a_mem_rw_flag rw_flag, bool sparse, -- cgit v1.2.2