From 1af9692e47f0f7c2a2f041d0075aa2651bd3995b Mon Sep 17 00:00:00 2001 From: Vaibhav Kachore Date: Wed, 14 Mar 2018 16:14:20 +0530 Subject: gpu: nvgpu: vgpu: add support for FECS VA Enable FECS trace support for t194 Linux + HV EVLR-2309 Change-Id: If22c931a54833eb995710b6e0dcad335e4ffbae6 Signed-off-by: Vaibhav Kachore Reviewed-on: https://git-master.nvidia.com/r/1674970 Reviewed-by: svc-mobile-coverity Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom GVS: Gerrit_Virtual_Submit Reviewed-by: Nirav Patel Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h | 1 + drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 36 ++++++++++++++++++++++- drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | 21 ++++++------- 3 files changed, 47 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h index 1e2f516f..3890249d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h @@ -210,6 +210,7 @@ struct tegra_vgpu_ch_ctx_params { u64 attr_va; u64 page_pool_va; u64 priv_access_map_va; + u64 fecs_trace_va; u32 class_num; }; diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index 2ae615bf..83d27f17 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c @@ -35,6 +35,7 @@ #include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/channel_gk20a.h" #include "gk20a/tsg_gk20a.h" +#include "gk20a/fecs_trace_gk20a.h" #include #include @@ -122,6 +123,9 @@ int vgpu_gr_init_ctx_state(struct gk20a *g) gr->ctx_vars.buffer_size = g->gr.ctx_vars.golden_image_size; g->gr.ctx_vars.priv_access_map_size = 512 * 1024; +#ifdef CONFIG_GK20A_CTXSW_TRACE + g->gr.ctx_vars.fecs_trace_buffer_size = gk20a_fecs_trace_buffer_size(g); +#endif return 0; } @@ -153,7 +157,12 @@ static int vgpu_gr_alloc_global_ctx_buffers(struct gk20a *g) gr->ctx_vars.priv_access_map_size); gr->global_ctx_buffer[PRIV_ACCESS_MAP].mem.size = gr->ctx_vars.priv_access_map_size; - +#ifdef CONFIG_GK20A_CTXSW_TRACE + nvgpu_log_info(g, "fecs_trace_buffer_size : %d", + gr->ctx_vars.fecs_trace_buffer_size); + gr->global_ctx_buffer[FECS_TRACE_BUFFER].mem.size = + gr->ctx_vars.fecs_trace_buffer_size; +#endif return 0; } @@ -219,6 +228,19 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, g_bfr_size[PRIV_ACCESS_MAP_VA] = gr->global_ctx_buffer[PRIV_ACCESS_MAP].mem.size; + /* FECS trace Buffer */ +#ifdef CONFIG_GK20A_CTXSW_TRACE + gpu_va = __nvgpu_vm_alloc_va(ch_vm, + gr->global_ctx_buffer[FECS_TRACE_BUFFER].mem.size, + gmmu_page_size_kernel); + + if (!gpu_va) + goto clean_up; + + g_bfr_va[FECS_TRACE_BUFFER_VA] = gpu_va; + g_bfr_size[FECS_TRACE_BUFFER_VA] = + gr->global_ctx_buffer[FECS_TRACE_BUFFER].mem.size; +#endif msg.cmd = TEGRA_VGPU_CMD_CHANNEL_MAP_GR_GLOBAL_CTX; msg.handle = vgpu_get_handle(g); p->handle = c->virt_ctx; @@ -226,6 +248,9 @@ static int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, p->attr_va = g_bfr_va[ATTRIBUTE_VA]; p->page_pool_va = g_bfr_va[PAGEPOOL_VA]; p->priv_access_map_va = g_bfr_va[PRIV_ACCESS_MAP_VA]; +#ifdef CONFIG_GK20A_CTXSW_TRACE + p->fecs_trace_va = g_bfr_va[FECS_TRACE_BUFFER_VA]; +#endif err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); if (err || msg.ret) goto clean_up; @@ -576,6 +601,15 @@ int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, u32 class_num, u32 flags) nvgpu_err(g, "fail to commit gr ctx buffer"); goto out; } +#ifdef CONFIG_GK20A_CTXSW_TRACE + /* for fecs bind channel */ + err = gr_gk20a_elpg_protected_call(g, + vgpu_gr_load_golden_ctx_image(g, c)); + if (err) { + nvgpu_err(g, "fail to load golden ctx image"); + goto out; + } +#endif } /* PM ctxt switch is off by default */ diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index f81e8503..c6a6eae9 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c @@ -439,20 +439,21 @@ static const struct gpu_ops vgpu_gv11b_ops = { }, #ifdef CONFIG_GK20A_CTXSW_TRACE .fecs_trace = { - .alloc_user_buffer = NULL, - .free_user_buffer = NULL, - .mmap_user_buffer = NULL, - .init = NULL, - .deinit = NULL, - .enable = NULL, - .disable = NULL, - .is_enabled = NULL, + .alloc_user_buffer = vgpu_alloc_user_buffer, + .free_user_buffer = vgpu_free_user_buffer, + .mmap_user_buffer = vgpu_mmap_user_buffer, + .init = vgpu_fecs_trace_init, + .deinit = vgpu_fecs_trace_deinit, + .enable = vgpu_fecs_trace_enable, + .disable = vgpu_fecs_trace_disable, + .is_enabled = vgpu_fecs_trace_is_enabled, .reset = NULL, .flush = NULL, - .poll = NULL, + .poll = vgpu_fecs_trace_poll, .bind_channel = NULL, .unbind_channel = NULL, - .max_entries = NULL, + .max_entries = vgpu_fecs_trace_max_entries, + .set_filter = vgpu_fecs_trace_set_filter, }, #endif /* CONFIG_GK20A_CTXSW_TRACE */ .mm = { -- cgit v1.2.2