From 182760476dbd1415ef9a6c0c33dba0adc4dde1ef Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Mon, 12 Mar 2018 15:44:12 -0700 Subject: gpu: nvgpu: De-linuxify pmgr code The pmgr code is in theory common code. However there were uses of Linux stuff within this code. This patch cleans that up by deleting the unnecessary os_linux.h includes, usage of kfree() and adds several platform fields to the gk20a struct. The platform data is copied to the gk20a struct in the platform initialization code so that this common code can access said data without requiring any knowledge of the OS platform data. JIRA NVGPU-525 Change-Id: Ic4bb6021f60b0a0778779ab5f3e15b7e5ca98306 Signed-off-by: Alex Waterman Reviewed-on: https://git-master.nvidia.com/r/1673825 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/linux/pci.c | 5 +++++ drivers/gpu/nvgpu/gk20a/gk20a.h | 9 +++++++++ drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 13 +++++-------- drivers/gpu/nvgpu/pmgr/pwrpolicy.c | 5 +---- 4 files changed, 20 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c index fe4c0f09..97c4c6bb 100644 --- a/drivers/gpu/nvgpu/common/linux/pci.c +++ b/drivers/gpu/nvgpu/common/linux/pci.c @@ -581,6 +581,11 @@ static int nvgpu_pci_probe(struct pci_dev *pdev, g->pci_class = (pdev->class >> 8) & 0xFFFFU; // we only want base/sub g->pci_revision = pdev->revision; + g->ina3221_dcb_index = platform->ina3221_dcb_index; + g->ina3221_i2c_address = platform->ina3221_i2c_address; + g->ina3221_i2c_port = platform->ina3221_i2c_port; + g->hardcode_sw_threshold = platform->hardcode_sw_threshold; + #if defined(CONFIG_PCI_MSI) err = pci_enable_msi(pdev); if (err) { diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 4a1c2f75..efb425c2 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1416,6 +1416,15 @@ struct gk20a { u16 pci_class; u8 pci_revision; + /* + * PCI power management: i2c device index, port and address for + * INA3221. + */ + u32 ina3221_dcb_index; + u32 ina3221_i2c_address; + u32 ina3221_i2c_port; + bool hardcode_sw_threshold; + /* PCIe power states. */ bool xve_l0s; bool xve_l1; diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index ed33c08c..3398e8df 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c @@ -26,8 +26,6 @@ #include "gk20a/gk20a.h" #include "gp106/bios_gp106.h" -#include "common/linux/os_linux.h" -#include "common/linux/platform_gk20a.h" #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" @@ -148,8 +146,7 @@ exit: static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) { struct nv_pmu_pmgr_i2c_device_desc_table i2c_desc_table; - struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g)); - u32 idx = platform->ina3221_dcb_index; + u32 idx = g->ina3221_dcb_index; u32 status = 0; /* INA3221 I2C device info */ @@ -159,9 +156,9 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) i2c_desc_table.devices[idx].super.type = 0x4E; i2c_desc_table.devices[idx].dcb_index = idx; - i2c_desc_table.devices[idx].i2c_address = platform->ina3221_i2c_address; + i2c_desc_table.devices[idx].i2c_address = g->ina3221_i2c_address; i2c_desc_table.devices[idx].i2c_flags = 0xC2F; - i2c_desc_table.devices[idx].i2c_port = platform->ina3221_i2c_port; + i2c_desc_table.devices[idx].i2c_port = g->ina3221_i2c_port; /* Pass the table down the PMU as an object */ status = pmgr_pmu_set_object( @@ -220,7 +217,7 @@ static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) status); exit: - kfree(pwr_desc_table); + nvgpu_kfree(g, pwr_desc_table); return status; } @@ -289,7 +286,7 @@ static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) status); exit: - kfree(pwr_monitor_pack); + nvgpu_kfree(g, pwr_monitor_pack); return status; } diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index 420eda4f..2942268f 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c @@ -28,8 +28,6 @@ #include "boardobj/boardobjgrp.h" #include "boardobj/boardobjgrp_e32.h" #include "gp106/bios_gp106.h" -#include "common/linux/os_linux.h" -#include "common/linux/platform_gk20a.h" #define _pwr_policy_limitarboutputget_helper(p_limit_arb) (p_limit_arb)->output #define _pwr_policy_limitdeltaapply(limit, delta) ((u32)max(((s32)limit) + (delta), 0)) @@ -517,7 +515,6 @@ static inline void devinit_unpack_pwr_policy_entry( static u32 devinit_get_pwr_policy_table(struct gk20a *g, struct pmgr_pwr_policy *ppwrpolicyobjs) { - struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g)); u32 status = 0; u8 *ptr = NULL; struct boardobj *boardobj; @@ -690,7 +687,7 @@ static u32 devinit_get_pwr_policy_table(struct gk20a *g, ++obj_index; } - if (platform->hardcode_sw_threshold) { + if (g->hardcode_sw_threshold) { status = _pwr_policy_construct_WAR_SW_Threshold_policy(g, ppwrpolicyobjs, &pwr_policy_data, -- cgit v1.2.2